cpu-o3: Fix handling of some mem. order violations
[gem5.git] / src / cpu / simple /
2019-10-25 Gabe Blackcpu: Get rid of the serviceInstCountEvents method.
2019-10-25 Gabe Blackcpu: Access inst events through ThreadContext instead...
2019-10-25 Gabe Blackcpu: Make accesses to comInstEventQueue indirect throug...
2019-10-25 Gabe Blackcpu,sim: Delegate PCEvent scheduling from Systems to...
2019-10-25 Gabe Blackcpu: Make the ThreadContext a PCEventScope.
2019-10-25 Gabe Blackcpu: Pass the address to check into the PCEventQueue...
2019-10-21 Gabe Blackcpu: Apply the ARM TLB rework to the checker CPU.
2019-10-17 Gabe Blackcpu: Get rid of load count based events.
2019-10-15 Gabe Blacksim,cpu: Get rid of the unused instEventQueue.
2019-09-23 Jordi Vaquerocpu, mem: Changing AtomicOpFunctor* for unique_ptr...
2019-09-04 Ciro Santillicpu: reset byte_enable across writeMem calls
2019-08-28 Gabe Blackcpu: Make get(Data|Inst)Port return a Port and not...
2019-07-16 Giacomo Travaglinicpu: isDrained renamed to isCpuDrained
2019-05-28 Giacomo Gabriellicpu: Remove assert causing issues with x86 Linux boot
2019-05-11 Giacomo Gabriellicpu,mem: Add support for partial loads/stores and wide...
2019-05-11 Giacomo Gabriellicpu: Add a memory access predicate
2019-04-30 Gabe Blackcpu: alpha: Delete all occurrances of the simPalCheck...
2019-04-30 Gabe Blackcpu: Remove hwrei from the generic interfaces.
2019-04-30 Gabe Blackarch: cpu: Track kernel stats using the base ISA agnost...
2019-04-29 Gabe Blackcpu: Get rid of the (read|set)RegOtherThread methods.
2019-04-28 Gabe Blackmem: Minimize the use of MemObject.
2019-04-05 Nikos Nikoleriscpu: Correctly account for executed instructions in...
2019-03-28 Javier Buenocpu: Added a probe to notify the address of retired...
2019-02-12 Andreas Sandbergpython: Don't assume SimObjects live in the global...
2019-02-08 Tuan Tacpu: support atomic memory request type with AtomicOpFu...
2019-02-01 Gabe Blackcpu, arch: Replace the CCReg type with RegVal.
2019-01-31 Gabe Blackarch: cpu: Rename *FloatRegBits* to *FloatReg*.
2019-01-30 Giacomo Gabrielliarch,cpu: Add vector predicate registers
2019-01-25 Giacomo Travaglinicpu: Fix VecElemClass bugs in cpu models
2019-01-22 Gabe Blackarch: cpu: Stop passing around misc registers by reference.
2019-01-16 Gabe Blackcpu: dev: sim: gpu-compute: Banish some ISA specific...
2018-12-20 Gabe Blackarch, cpu: Remove float type accessors.
2018-11-16 Rekai Gonzalez-Alb... cpu: Fix the usage of const DynInstPtr
2018-10-01 Giacomo Travaglinicpu: Fix typo in header guard for Noncaching cpu
2018-09-12 Andreas Sandbergcpu: Replace the fastmem with a new CPU model
2018-06-14 Tuan Tacpu: Prevent suspended TimingSimple CPUs from fetching...
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-06-11 Giacomo Travaglinimisc: Substitute pointer to Request with aliased RequestPtr
2018-05-29 Giacomo Travaglinicpu: Avoid unnecessary dynamic_pointer_cast in atomic...
2018-03-06 Gabe Blackscons: Switch from the print statement to the print...
2018-01-09 Gabe Blackcpu, power: Get rid of the remnants of the EA computati...
2017-12-22 Gabe Blackarch,cpu: "virtualize" the TLB interface.
2017-12-13 Gabe Blackarm,sparc,x86,base,cpu,sim: Replace the Twin(32|64...
2017-12-08 Matt Sinclairx86,misc: add additional info on faulting X86 instructi...
2017-12-05 Nikos Nikoleriscpu: Add support for CMOs in the cpu models
2017-12-04 Gabe Blackmisc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-11-21 Jose Marinhocpu, cpu, sim: move Cycle probe update
2017-11-20 Anouk Van Laerpwr: Adds logic to enter power gating for the cpu model
2017-07-12 Sean Wilsoncpu: Refactor some Event subclasses to lambdas
2017-07-05 Rekai Gonzalez-Alb... arch: ISA parser additions of vector registers
2017-07-05 Rekai Gonzalez-Alb... cpu: Added interface for vector reg file
2017-07-05 Rekai Gonzalez-Alb... cpu: Simplify the rename interface and use RegId
2017-07-05 Nathanael Premillieuarch, cpu: Architectural Register structural indexing
2017-06-20 Sean Wilsoncpu, gpu-compute: Replace EventWrapper use with EventFu...
2015-07-20 Brandon Pottersyscall_emul: [patch 13/22] add system call retry capab...
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2016-08-15 Nikos Nikoleriscpu, arch: fix the type used for the request flags
2016-06-06 David Guillen Fandospwr: Low-power idle power state for idle CPUs
2016-04-07 Mitch Hayengamem: Remove threadId from memory request class
2016-04-06 Andreas SandbergRevert power patch sets with unexpected interactions
2016-04-05 Mitch Hayengamem: Remove threadId from memory request class
2014-12-09 Akash Bagdiapower: Low-power idle power state for idle CPUs
2015-11-27 Andreas Sandbergbase: Add support for changing output directories
2015-07-19 Krishnendra Nathellacpu: Fix LLSC atomic CPU wakeup
2016-02-10 Andreas Hanssonmem: Deduce if cache should forward snoops
2016-02-07 Steve Reinhardtstyle: fix missing spaces in control statements
2016-02-07 Steve Reinhardtstyle: remove trailing whitespace
2016-01-18 Steve Reinhardtcpu. arch: add initiateMemRead() to ExecContext interface
2015-10-12 Andreas Hanssonmisc: Add explicit overrides and fix other clang >...
2015-10-12 Andreas Hanssonmisc: Remove redundant compiler-specific defines
2015-09-30 Mitch Hayengacpu,isa,mem: Add per-thread wakeup logic
2015-09-30 Mitch Hayengaisa,cpu: Add support for FS SMT Interrupts
2015-09-30 Mitch Hayengacpu: Add per-thread monitors
2015-09-30 Mitch Hayengaconfig,cpu: Add SMT support to Atomic and Timing CPUs
2015-07-28 Nilay Vaishrevert 5af8f40d8f2c
2015-07-26 Nilay Vaishcpu: implements vector registers
2015-07-07 Andreas Sandbergsim: Refactor and simplify the drain API
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class
2015-04-13 Dibakar Gopecpu: re-organizes the branch predictor structure.
2015-04-03 Nikos Nikoleriscpu: fix system total instructions accounting
2015-03-23 Steve Reinhardtmem: rename Locked/LOCKED to LockedRMW/LOCKED_RMW
2015-02-11 Steve Reinhardtmem: restructure Packet cmd initialization a bit more
2015-03-02 Andreas Hanssonmem: Split port retry for all different packet classes
2015-02-16 Andreas Hanssonarch: Make readMiscRegNoEffect const throughout
2015-02-03 Andreas Hanssoncpu: Ensure timing CPU sinks response before sending...
2015-01-25 Ali Saidisim: Clean up InstRecord
2015-01-25 Ali Saidicpu: Remove all notion that we know when the cpu is...
2015-01-22 Andreas Hanssonmem: Clean up Request initialisation
2015-01-20 Nikos Nikoleriscpu: commit probe notification on every microop or...
2014-12-05 Gabe Blackcpu: Only check for PC events on instruction boundaries.
2014-12-02 Andreas Hanssonmem: Assume all dynamic packet data is array allocated
2014-12-02 Andreas Hanssonmem: Add const getters for write packet data
2014-11-14 Andreas Hanssonarm: Fixes based on UBSan and static analysis
2014-11-12 Ali Saidiarm: Fix timing wakeup with LLSC
2014-11-06 Marc Orrx86 isa: This patch attempts an implementation at mwait.
2014-10-16 Andreas Sandbergcpu: Probe points for basic PMU stats
2014-09-27 Andreas Hanssonarch: Use const StaticInstPtr references where possible
2014-09-20 Mitch Hayengacpu: Remove unused deallocateContext calls
2014-09-20 Mitch Hayengaalpha,arm,mips,power,x86,cpu,sim: Cleanup activate...
2014-09-20 Dam Sunwoocpu: use probes infrastructure to do simpoint profiling
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