arch-arm,cpu: Introduce a getEMI virtual method on StaticInst.
[gem5.git] / src / cpu / testers /
2021-02-02 Gabe Blackext: Update pybind11 to version 2.6.2.
2021-01-23 Gabe Blackcpu: Stop "using namespace std"
2021-01-15 Daniel R. Carvalhomisc: Fix some includes
2021-01-13 Gabe Blackmisc: Fix missing includes.
2020-12-14 Yu-hsin Wangmem: Align the Substream naming in Request
2020-11-26 Bobby R. BruceMerge "misc: Merge branch hotfix v20.1.0.2 branch into...
2020-11-18 Bobby R. Brucearch-gcn3,misc: Added missing overrides to gpu_thread.hh
2020-11-17 Bobby R. Brucearch-gcn3, misc: Added missing override to protocol_tes...
2020-11-16 Bobby R. Brucemisc: Merge branch hotfix v20.1.0.2 branch into develop
2020-11-04 Kyle Roartyconfigs,tests: Add tokens to GPU VIPER tester
2020-11-04 Tuan Tagpu-compute,mem-ruby: Replace ACQUIRE and RELEASE reque...
2020-11-04 Matthew Porembatests,configs,mem-ruby: Adding Ruby tester for GPU_VIPER
2020-10-30 Gabe Blackmisc: Delete the now unnecessary create methods.
2020-10-14 Gabe Blackmisc: Standardize the way create() constructs SimObjects.
2020-10-01 Bobby R. Brucemisc: Merge branch 'release-staging-v20.1.0.0' into...
2020-09-28 Gabe Blackmisc: Update attribute syntax, and reorganize compiler.hh.
2020-09-10 Shivani Parekhmisc: Replaced master/slave terminology
2020-09-08 eavivicpu: convert memtest to new style stats
2020-09-08 Wendy Elsassermem: Add NVM interface
2020-08-26 Emily Brickeycpu: update port terminology
2020-07-04 Bobby R. Brucemisc: Merged m5ops_base hotfix into develop
2020-06-08 Bobby R. Brucemisc: Merge hotfix v20.0.0.2 into develop
2020-06-03 Gabe Blackmisc: Make many includes explicit.
2020-04-29 Ciro Santillimem: make MemTest panic on a packet error
2020-04-20 Gabe Blackdev,cpu: Make two very generic enums ScopedEnums.
2020-03-07 Gabe Blackarch,cpu,gpu-compute,mem: Remove asid from Request...
2020-03-05 Gabe Blackcpu: Switch away from some fringe Request constructors.
2020-02-26 Bobby R. Brucemisc: merge branch 'release-staging-v19.0.0.0' into...
2020-02-24 Bobby R. Brucemisc: Merged release-staging-v19.0.0.0 into develop
2020-02-17 Gabe Blackcpu: Delete authors lists from the cpu directory.
2019-09-30 Nikos Nikoleriscpu: Make use of DRAMCtrl::AddrMap in the traffic gener...
2019-08-29 Andreas Sandbergcpu: Convert traffic gen to use new stats
2019-08-23 Gabe Blackmem: Move ruby protocols into a directory called ruby_p...
2019-06-11 Tiago Muckcpu: Additional TrafficGen stats
2019-06-11 Tiago Muckcpu: Limit TrafficGen outstanding reqs
2019-06-11 Tiago Muckcpu: TrafficGen as BaseCPU
2019-05-30 Tiago Muckcpu: Fix rescheduling of progress check events
2019-04-28 Gabe Blackmem: Minimize the use of MemObject.
2019-03-23 Andrea Mondellimisc: missing override specifier
2019-03-19 Gabe Blackarch, cpu, dev, gpu, mem, sim, python: start using...
2019-02-12 Andreas Sandbergpython: Don't assume SimObjects live in the global...
2018-12-04 Nikos Nikolerisbase, sim: Add missing destructors
2018-08-24 Giacomo Travaglinicpu: Stream/SubstreamID support in TrafficGen
2018-08-24 Michiel W. van Tolcpu: Turn BaseTrafficGen numSuppressed into a stat
2018-08-21 Jason Lowe-Powermisc: Appease GCC 8
2018-08-17 Brandon Potterscons,ruby: do not generate unnecessary files
2018-07-25 Giacomo Travaglinicpu: Warn when (un)serializing a traffic generator
2018-07-25 Giacomo Travaglinicpu: Allow creation of traffic gen from generic SimObjects
2018-07-13 Andreas Sandbergcpu: Add a Python-enabled traffic generator
2018-07-13 Andreas Sandbergcpu: Support trace termination in BaseTrafficGen
2018-07-13 Andreas Sandbergcpu: Unify error handling for address generators
2018-07-13 Andreas Sandbergcpu: Split the traffic generator into two classes
2018-06-28 Andreas Sandbergcpu: Remove reduntant protobuf includes
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-06-11 Giacomo Travaglinimisc: Substitute pointer to Request with aliased RequestPtr
2018-04-27 Giacomo Travaglinisim,cpu,mem,arch: Introduced MasterInfo data structure
2018-03-23 Jason Lowe-Powerruby: Make sure addresses print in hex
2017-12-20 Gabe Blackcpu: Fix exit_gen.cc which used misc.hh instead of...
2017-12-19 Riken Gohilcpu-tester: Added ExitGen to TrafficGen
2017-12-19 Riken Gohilcpu-tester: Refactoring traffic generators into separat...
2017-12-04 Gabe Blackmisc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-07-12 Sean Wilsontesters: Refactor some Event subclasses to lambdas
2017-06-20 Sean Wilsoncpu, gpu-compute: Replace EventWrapper use with EventFu...
2016-11-09 Brandon Potterstyle: [patch 3/22] reduce include dependencies in...
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2016-12-05 Nikos Nikoleriscpu: Change traffic generators to use different values...
2016-10-06 Tushar Krishnaruby: rename networktest to garnet_synthetic_traffic.
2016-06-20 Andreas Sandbergmem: Resolve TrafficGen trace relative to the config
2016-06-06 David Guillen Fandosstats: Fixing regStats function for some SimObjects
2016-06-06 Stephan Diestelhorstsim: Call regStats of base-class as well
2016-05-26 Andreas Hanssoncpu: Add a basic progress check to the TrafficGen
2016-04-07 Mitch Hayengamem: Remove threadId from memory request class
2016-04-07 Andreas SandbergRevert to 74c1e6513bd0 (sim: Thermal support for Linux)
2016-04-06 Andreas SandbergRevert power patch sets with unexpected interactions
2016-04-05 Mitch Hayengamem: Remove threadId from memory request class
2014-11-18 Akash Bagdiapower: Add power states to ClockedObject
2016-03-20 Andreas Hanssoncpu: warn if TrafficGen is suppressing a large numer...
2016-02-24 Matteo Andreozzicpu: TraceGen fix for tick frequency check
2016-02-07 Steve Reinhardtstyle: remove trailing whitespace
2015-07-20 Brad Beckmannruby: more flexible ruby tester support
2015-11-22 Andreas Hanssoncpu: Fix memory leak in traffic generator
2015-10-12 Andreas Hanssonmisc: Add explicit overrides and fix other clang >...
2015-10-12 Andreas Hanssonmisc: Remove redundant compiler-specific defines
2015-08-29 Nilay Vaishruby: eliminate type uint64 and int64
2015-08-19 Nilay Vaishruby: reverts to changeset: bf82f1f7b040
2015-08-15 Nilay Vaishruby: eliminate type uint64 and int64
2015-08-14 Nilay Vaishruby: replace Address by Addr
2015-08-11 Nilay Vaishruby: drop some redundant includes
2015-07-10 Brandon Potterruby: replace global g_abs_controls with per-RubySystem var
2015-07-07 Andreas Sandbergsim: Refactor and simplify the drain API
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class
2015-03-19 Wendy Elsassercpu: Fix TrafficGen message format
2015-03-02 Andreas Hanssonmem: Split port retry for all different packet classes
2015-03-02 Stephan Diestelhorstcpu: Add a PC-value to the traffic generator requests
2015-02-16 Andreas Hanssoncpu: TrafficGen sinks snoops without complaining
2015-02-11 Andreas Hanssoncpu: Tidy up the MemTest and make false sharing more...
2015-01-22 Andreas Hanssonmem: Clean up Request initialisation
2014-12-02 Andreas Hanssonmem: Assume all dynamic packet data is array allocated
2014-12-02 Andreas Hanssonmem: Add const getters for write packet data
2014-12-02 Andreas Hanssonmem: Remove null-check bypassing in Packet::getPtr
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