2019-04-10 |
Giacomo Travaglini | cpu: O3 switchFreeList checking VecElems instead of... |
tree | commitdiff |
2019-04-05 |
Nikos Nikoleris | cpu: Correctly account for executed instructions in... |
tree | commitdiff |
2019-04-03 |
Andrea Mondelli | misc: Removed inconsistency in O3* debug msgs |
tree | commitdiff |
2019-04-03 |
Andrea Mondelli | arch-mips: added missing override specifier (o3) |
tree | commitdiff |
2019-03-28 |
Javier Bueno | cpu: Added a probe to notify the address of retired... |
tree | commitdiff |
2019-03-27 |
Pau Cabre | cpu: Fixed the indirect branch predictor GHR handling |
tree | commitdiff |
2019-03-23 |
Andrea Mondelli | misc: missing override specifier |
tree | commitdiff |
2019-03-21 |
Ryan Gambord | cpu-kvm: Added informative error message |
tree | commitdiff |
2019-03-19 |
Gabe Black | arch, cpu, dev, gpu, mem, sim, python: start using... |
tree | commitdiff |
2019-03-14 |
Andrea Mondelli | cpu: Refactor of Physical Register implementation |
tree | commitdiff |
2019-03-14 |
Giacomo Gabrielli | arch-arm,cpu: Add initial support for Arm SVE |
tree | commitdiff |
2019-03-01 |
Andrea Mondelli | mem-cache: alias to mem::getMasterPort in TLB class |
tree | commitdiff |
2019-02-27 |
Andrea Mondelli | misc: Segmentation Fault during O3PipeView execution |
tree | commitdiff |
2019-02-26 |
Srikant Bharadwaj | cpu: Fix indirect branch history updates |
tree | commitdiff |
2019-02-22 |
Andreas Sandberg | python: Fix param -> int conversion issues |
tree | commitdiff |
2019-02-22 |
Gabor Dozsa | cpu-o3: Add cache read ports limit to LSQ |
tree | commitdiff |
2019-02-22 |
Andreas Sandberg | python: Make iterator handling Python 3 compatible |
tree | commitdiff |
2019-02-19 |
Giacomo Gabrielli | cpu: Add ISA* getter in Thread interface |
tree | commitdiff |
2019-02-15 |
Giacomo Travaglini | cpu: Fix fast build broken due to unused variable |
tree | commitdiff |
2019-02-13 |
Javier Bueno | cpu: Added 8KB and 64KB TAGE-SC-L branch predictor |
tree | commitdiff |
2019-02-12 |
Andreas Sandberg | python: Don't assume SimObjects live in the global... |
tree | commitdiff |
2019-02-08 |
Jairo Balart | cpu: Proposal for changing the indirect branch predicto... |
tree | commitdiff |
2019-02-08 |
Tuan Ta | cpu: support atomic memory request type with AtomicOpFu... |
tree | commitdiff |
2019-02-08 |
Tuan Ta | cpu: fix how branching is handled when a thread is... |
tree | commitdiff |
2019-02-08 |
Tuan Ta | cpu: stop scheduling suspended threads in all stages... |
tree | commitdiff |
2019-02-08 |
Tuan Ta | sim,cpu: make exit_group halt all threads in a group |
tree | commitdiff |
2019-02-08 |
Tuan Ta | cpu: fixed how O3 CPU executes an exit system call |
tree | commitdiff |
2019-02-06 |
Tuan Ta | cpu: fix how a thread starts up in MinorCPU |
tree | commitdiff |
2019-02-05 |
Andrea Mondelli | misc: added missing override specifier |
tree | commitdiff |
2019-02-05 |
Javier Bueno | cpu: Made the Loop Predictor a SimObject |
tree | commitdiff |
2019-02-05 |
Jairo Balart | cpu: Made TAGE a SimObject that can be used by other... |
tree | commitdiff |
2019-02-01 |
Gabe Black | cpu, arch: Replace the CCReg type with RegVal. |
tree | commitdiff |
2019-01-31 |
Gabe Black | arch: cpu: Rename *FloatRegBits* to *FloatReg*. |
tree | commitdiff |
2019-01-30 |
Giacomo Gabrielli | arch,cpu: Add vector predicate registers |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu, arch, arch-arm: Wire unused VecElem code in the... |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu: O3 rename using the flatIndex instead of index |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu: Fix VecElemClass bugs in cpu models |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu: Add VecElem entries in MinorCPU Scoreboard |
tree | commitdiff |
2019-01-24 |
Rekai Gonzalez-Alb... | cpu-o3: O3 LSQ Generalisation |
tree | commitdiff |
2019-01-22 |
Gabe Black | arch: cpu: Stop passing around misc registers by reference. |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtCommitPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtROBPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtIQPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtLSQPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtFetchPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-16 |
Gabe Black | cpu: dev: sim: gpu-compute: Banish some ISA specific... |
tree | commitdiff |
2019-01-15 |
Giacomo Travaglini | cpu: Fix usage of setArchVecElem |
tree | commitdiff |
2018-12-22 |
Gabe Black | cpu: Stop using unions to store FP registers. |
tree | commitdiff |
2018-12-20 |
Gabe Black | arch, cpu: Remove float type accessors. |
tree | commitdiff |
2018-12-11 |
Pau Cabre | cpu: Fixed typos in parameter/stats descriptions |
tree | commitdiff |
2018-12-11 |
Pau Cabre | cpu: Added parameters to enable/disable features in... |
tree | commitdiff |
2018-12-11 |
Tony Gutierrez | cpu-o3: Fix bug in LSQUnit(uint32_t, uint32_t) ctor |
tree | commitdiff |
2018-12-04 |
Nikos Nikoleris | base, sim: Add missing destructors |
tree | commitdiff |
2018-12-03 |
Rekai Gonzalez-Alb... | cpu: Change raw pointers to STL Containers |
tree | commitdiff |
2018-11-28 |
Pau Cabre | cpu: Added new stats to TAGE and LTAGE branch predictors |
tree | commitdiff |
2018-11-28 |
Pau Cabre | cpu: split LTAGE implementation into a base TAGE and... |
tree | commitdiff |
2018-11-28 |
Rekai Gonzalez-Alb... | cpu,arch-arm: Initialise data members |
tree | commitdiff |
2018-11-27 |
Gabe Black | arch, base, cpu, gpu, mem: Replace assert(0 or false... |
tree | commitdiff |
2018-11-22 |
Pau Cabre | cpu: Made LTAGE parameters configurable |
tree | commitdiff |
2018-11-22 |
Pau Cabre | cpu: Fixed useful counter handling in LTAGE |
tree | commitdiff |
2018-11-22 |
Pau Cabre | cpu: Fixes on the loop predictor part of LTAGE |
tree | commitdiff |
2018-11-17 |
Pau Cabre | cpu: Fix LTAGE max number of allocations on update |
tree | commitdiff |
2018-11-17 |
Pau Cabre | configs: Added an option for choosing branch predictor... |
tree | commitdiff |
2018-11-16 |
Rekai Gonzalez-Alb... | cpu: Fix the usage of const DynInstPtr |
tree | commitdiff |
2018-11-14 |
Pau Cabre | cpu: Fixed ratio of pred to hyst bits for LTAGE Bimodal |
tree | commitdiff |
2018-11-13 |
Pau Cabre | cpu: Fixed PC shifting on LTAGE branch predictor |
tree | commitdiff |
2018-10-09 |
Giacomo Travaglini | cpu: Fix MinorCPU executing Crypto Instructions |
tree | commitdiff |
2018-10-09 |
Matt Horsnell | arch-arm: AArch32 Crypto AES |
tree | commitdiff |
2018-10-09 |
Matt Horsnell | arch-arm: AArch32 Crypto SHA |
tree | commitdiff |
2018-10-01 |
Giacomo Travaglini | cpu: Fix typo in header guard for Noncaching cpu |
tree | commitdiff |
2018-09-13 |
Earl Ou | Fix SConstruct for asan build |
tree | commitdiff |
2018-09-12 |
Andreas Sandberg | cpu: Replace the fastmem with a new CPU model |
tree | commitdiff |
2018-08-24 |
Giacomo Travaglini | cpu: Stream/SubstreamID support in TrafficGen |
tree | commitdiff |
2018-08-24 |
Michiel W. van Tol | cpu: Turn BaseTrafficGen numSuppressed into a stat |
tree | commitdiff |
2018-08-21 |
Jason Lowe-Power | misc: Appease GCC 8 |
tree | commitdiff |
2018-08-17 |
Brandon Potter | scons,ruby: do not generate unnecessary files |
tree | commitdiff |
2018-08-10 |
Bradley Wang | cpu: Add hash functionality for RegId class |
tree | commitdiff |
2018-08-10 |
Bradley Wang | cpu: Removed unnecessary file reg_class_impl.hh |
tree | commitdiff |
2018-07-25 |
Giacomo Travaglini | cpu: Warn when (un)serializing a traffic generator |
tree | commitdiff |
2018-07-25 |
Giacomo Travaglini | cpu: Allow creation of traffic gen from generic SimObjects |
tree | commitdiff |
2018-07-24 |
Hanhwi Jang | cpu-o3: Missing freeing the heads of DepGraph in IQ... |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Add a Python-enabled traffic generator |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Support trace termination in BaseTrafficGen |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Unify error handling for address generators |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Split the traffic generator into two classes |
tree | commitdiff |
2018-06-28 |
Andreas Sandberg | cpu: Remove reduntant protobuf includes |
tree | commitdiff |
2018-06-21 |
Giacomo Travaglini | cpu: Fix bug introduced by RequestPtr type change |
tree | commitdiff |
2018-06-14 |
Tuan Ta | cpu: Prevent suspended TimingSimple CPUs from fetching... |
tree | commitdiff |
2018-06-14 |
Tuan Ta | cpu: add a new instruction type 'Atomic' |
tree | commitdiff |
2018-06-14 |
Andreas Sandberg | cpu-minor: Remove redundant thread startup call |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Substitute pointer to Request with aliased RequestPtr |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | cpu: Avoid unnecessary dynamic_pointer_cast in atomic... |
tree | commitdiff |
2018-04-27 |
Giacomo Travaglini | sim,cpu,mem,arch: Introduced MasterInfo data structure |
tree | commitdiff |
2018-03-27 |
Gabe Black | cpu: Remove ExtMachInst typedefs from the O3 CPU model. |
tree | commitdiff |
2018-03-27 |
Gabe Black | arch: cpu: Make the ExtMachInst type a template argumen... |
tree | commitdiff |
2018-03-27 |
Gabe Black | cpu: Stop extracting inst_flags from the machInst. |
tree | commitdiff |
2018-03-26 |
Gabe Black | cpu: Use the new asBytes function in the protobuf inst... |
tree | commitdiff |
2018-03-26 |
Gabe Black | arch: Add a virtual asBytes function to the StaticInst... |
tree | commitdiff |
2018-03-23 |
Jason Lowe-Power | ruby: Make sure addresses print in hex |
tree | commitdiff |
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