mem-cache: virtual address support for prefetchers
[gem5.git] / src / cpu /
2019-01-15 Giacomo Travaglinicpu: Fix usage of setArchVecElem
2018-12-22 Gabe Blackcpu: Stop using unions to store FP registers.
2018-12-20 Gabe Blackarch, cpu: Remove float type accessors.
2018-12-11 Pau Cabrecpu: Fixed typos in parameter/stats descriptions
2018-12-11 Pau Cabrecpu: Added parameters to enable/disable features in...
2018-12-11 Tony Gutierrezcpu-o3: Fix bug in LSQUnit(uint32_t, uint32_t) ctor
2018-12-04 Nikos Nikolerisbase, sim: Add missing destructors
2018-12-03 Rekai Gonzalez-Alb... cpu: Change raw pointers to STL Containers
2018-11-28 Pau Cabrecpu: Added new stats to TAGE and LTAGE branch predictors
2018-11-28 Pau Cabrecpu: split LTAGE implementation into a base TAGE and...
2018-11-28 Rekai Gonzalez-Alb... cpu,arch-arm: Initialise data members
2018-11-27 Gabe Blackarch, base, cpu, gpu, mem: Replace assert(0 or false...
2018-11-22 Pau Cabrecpu: Made LTAGE parameters configurable
2018-11-22 Pau Cabrecpu: Fixed useful counter handling in LTAGE
2018-11-22 Pau Cabrecpu: Fixes on the loop predictor part of LTAGE
2018-11-17 Pau Cabrecpu: Fix LTAGE max number of allocations on update
2018-11-17 Pau Cabreconfigs: Added an option for choosing branch predictor...
2018-11-16 Rekai Gonzalez-Alb... cpu: Fix the usage of const DynInstPtr
2018-11-14 Pau Cabrecpu: Fixed ratio of pred to hyst bits for LTAGE Bimodal
2018-11-13 Pau Cabrecpu: Fixed PC shifting on LTAGE branch predictor
2018-10-09 Giacomo Travaglinicpu: Fix MinorCPU executing Crypto Instructions
2018-10-09 Matt Horsnellarch-arm: AArch32 Crypto AES
2018-10-09 Matt Horsnellarch-arm: AArch32 Crypto SHA
2018-10-01 Giacomo Travaglinicpu: Fix typo in header guard for Noncaching cpu
2018-09-13 Earl OuFix SConstruct for asan build
2018-09-12 Andreas Sandbergcpu: Replace the fastmem with a new CPU model
2018-08-24 Giacomo Travaglinicpu: Stream/SubstreamID support in TrafficGen
2018-08-24 Michiel W. van Tolcpu: Turn BaseTrafficGen numSuppressed into a stat
2018-08-21 Jason Lowe-Powermisc: Appease GCC 8
2018-08-17 Brandon Potterscons,ruby: do not generate unnecessary files
2018-08-10 Bradley Wangcpu: Add hash functionality for RegId class
2018-08-10 Bradley Wangcpu: Removed unnecessary file reg_class_impl.hh
2018-07-25 Giacomo Travaglinicpu: Warn when (un)serializing a traffic generator
2018-07-25 Giacomo Travaglinicpu: Allow creation of traffic gen from generic SimObjects
2018-07-24 Hanhwi Jangcpu-o3: Missing freeing the heads of DepGraph in IQ...
2018-07-13 Andreas Sandbergcpu: Add a Python-enabled traffic generator
2018-07-13 Andreas Sandbergcpu: Support trace termination in BaseTrafficGen
2018-07-13 Andreas Sandbergcpu: Unify error handling for address generators
2018-07-13 Andreas Sandbergcpu: Split the traffic generator into two classes
2018-06-28 Andreas Sandbergcpu: Remove reduntant protobuf includes
2018-06-21 Giacomo Travaglinicpu: Fix bug introduced by RequestPtr type change
2018-06-14 Tuan Tacpu: Prevent suspended TimingSimple CPUs from fetching...
2018-06-14 Tuan Tacpu: add a new instruction type 'Atomic'
2018-06-14 Andreas Sandbergcpu-minor: Remove redundant thread startup call
2018-06-11 Giacomo Travaglinimisc: Using smart pointers for memory Requests
2018-06-11 Giacomo Travaglinimisc: Substitute pointer to Request with aliased RequestPtr
2018-05-29 Giacomo Travaglinicpu: Avoid unnecessary dynamic_pointer_cast in atomic...
2018-04-27 Giacomo Travaglinisim,cpu,mem,arch: Introduced MasterInfo data structure
2018-03-27 Gabe Blackcpu: Remove ExtMachInst typedefs from the O3 CPU model.
2018-03-27 Gabe Blackarch: cpu: Make the ExtMachInst type a template argumen...
2018-03-27 Gabe Blackcpu: Stop extracting inst_flags from the machInst.
2018-03-26 Gabe Blackcpu: Use the new asBytes function in the protobuf inst...
2018-03-26 Gabe Blackarch: Add a virtual asBytes function to the StaticInst...
2018-03-23 Jason Lowe-Powerruby: Make sure addresses print in hex
2018-03-06 Gabe Blackscons: Switch from the print statement to the print...
2018-02-20 Andreas Sandbergcpu-o3: Don't add non-speculative mem barriers to the...
2018-02-05 Giacomo Travaglinicpu: MinorCPU handling IsSquashAfter flag
2018-01-29 Glenn Bergmansarm: DT autogeneration - Generate cpus node
2018-01-12 Xiaoyu Masim: Allow passing a user-defined L2XBar to addTwoLevel...
2018-01-11 Gabe Blackcpu: Make the CPU's TLB parameter a BaseTLB.
2018-01-10 BKPstyle: change C/C++ source permissions to noexec
2018-01-10 Gabe Blackalpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of...
2018-01-09 Gabe Blackcpu: Use the NotAnInst flag to avoid passing an inst...
2018-01-09 Gabe Blackcpu: Add a NotAnInst flag to the BaseDynInst class.
2018-01-09 Gabe Blackcpu, power: Get rid of the remnants of the EA computati...
2017-12-22 Gabe Blackarch,cpu: "virtualize" the TLB interface.
2017-12-22 Gabe Blackcpu: Use the generic nop static inst instead of decodin...
2017-12-22 Gabe Blackcpu: Add a pointer to a generic Nop StaticInst.
2017-12-20 Gabe Blackcpu: Fix exit_gen.cc which used misc.hh instead of...
2017-12-19 Riken Gohilcpu-tester: Added ExitGen to TrafficGen
2017-12-19 Riken Gohilcpu-tester: Refactoring traffic generators into separat...
2017-12-14 Jason Lowe-Powermisc: Updates for gcc7.2 for x86
2017-12-13 Gabe Blackarm,sparc,x86,base,cpu,sim: Replace the Twin(32|64...
2017-12-13 Gabe Blackcpu,alpha,mips,power,riscv,sparc: Get rid of eaComp...
2017-12-08 Matt Sinclairx86,misc: add additional info on faulting X86 instructi...
2017-12-05 Nikos Nikoleriscpu: Add support for CMOs in the cpu models
2017-12-04 Gabe Blackmisc: Rename misc.(hh|cc) to logging.(hh|cc)
2017-11-29 Andreas Sandbergcpu: Don't override ISA if provided by user
2017-11-29 David Guillen Fandoscpu-minor: Add missing instruction stats
2017-11-28 Andreas Sandbergcpu-o3: Add missing vector stat initializers
2017-11-21 Jose Marinhocpu, cpu, sim: move Cycle probe update
2017-11-21 Nikos Nikoleriscpu-o3: Prevent cpu from suspending if it is already...
2017-11-20 Jose Marinhocpu: Make automatic transition to OFF optional
2017-11-20 Anouk Van Laerpwr: Adds logic to enter power gating for the cpu model
2017-11-14 Radhika Jagtapcpu, probe: Fix elastic trace register dependency
2017-10-19 Jason Lowe-Powercpu-o3: Add M5_VAR_USED to variable
2017-10-13 Nikos Nikoleriscpu-o3: Check predication before the SQ size for a...
2017-10-13 Nikos Nikoleriscpu-o3: Avoid early checker verification for store...
2017-09-11 Gabe Blackstats: Get rid of some kernel stats related cruft.
2017-09-06 Rico Amslingercpu: Fix bi-mode branch predictor thresholds
2017-09-01 Pau Cabrecpu-minor: Fix for addr range coverage calculation
2017-08-30 Matthias Hillecpu-o3: fix data pkt initialization for split load
2017-08-01 Andreas Sandbergkvm: Add a helper method to access device event queues
2017-08-01 Andreas Sandbergcpu, kvm: Fix deadlock issue when resuming a drained...
2017-07-19 Rekai Gonzalez-Alb... cpu: Add missing rename of vector registers in the...
2017-07-17 Anouk Van Laercpu,o3: Fixed checkpointing bug occuring in the o3 CPU
2017-07-12 Sean Wilsontesters: Refactor some Event subclasses to lambdas
2017-07-12 Sean Wilsonkvm, mem: Refactor some Event subclasses into lambdas
2017-07-12 Sean Wilsoncpu: Refactor some Event subclasses to lambdas
2017-07-12 Jose Marinhocpu, sim: Add param to force CPUs to wait for GDB
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