2019-02-06 |
Tuan Ta | cpu: fix how a thread starts up in MinorCPU |
tree | commitdiff |
2019-02-05 |
Andrea Mondelli | misc: added missing override specifier |
tree | commitdiff |
2019-02-05 |
Javier Bueno | cpu: Made the Loop Predictor a SimObject |
tree | commitdiff |
2019-02-05 |
Jairo Balart | cpu: Made TAGE a SimObject that can be used by other... |
tree | commitdiff |
2019-02-01 |
Gabe Black | cpu, arch: Replace the CCReg type with RegVal. |
tree | commitdiff |
2019-01-31 |
Gabe Black | arch: cpu: Rename *FloatRegBits* to *FloatReg*. |
tree | commitdiff |
2019-01-30 |
Giacomo Gabrielli | arch,cpu: Add vector predicate registers |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu, arch, arch-arm: Wire unused VecElem code in the... |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu: O3 rename using the flatIndex instead of index |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu: Fix VecElemClass bugs in cpu models |
tree | commitdiff |
2019-01-25 |
Giacomo Travaglini | cpu: Add VecElem entries in MinorCPU Scoreboard |
tree | commitdiff |
2019-01-24 |
Rekai Gonzalez-Alb... | cpu-o3: O3 LSQ Generalisation |
tree | commitdiff |
2019-01-22 |
Gabe Black | arch: cpu: Stop passing around misc registers by reference. |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtCommitPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtROBPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtIQPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtLSQPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-17 |
Nikos Nikoleris | cpu-o3: Make the smtFetchPolicy a Param.ScopedEnum |
tree | commitdiff |
2019-01-16 |
Gabe Black | cpu: dev: sim: gpu-compute: Banish some ISA specific... |
tree | commitdiff |
2019-01-15 |
Giacomo Travaglini | cpu: Fix usage of setArchVecElem |
tree | commitdiff |
2018-12-22 |
Gabe Black | cpu: Stop using unions to store FP registers. |
tree | commitdiff |
2018-12-20 |
Gabe Black | arch, cpu: Remove float type accessors. |
tree | commitdiff |
2018-12-11 |
Pau Cabre | cpu: Fixed typos in parameter/stats descriptions |
tree | commitdiff |
2018-12-11 |
Pau Cabre | cpu: Added parameters to enable/disable features in... |
tree | commitdiff |
2018-12-11 |
Tony Gutierrez | cpu-o3: Fix bug in LSQUnit(uint32_t, uint32_t) ctor |
tree | commitdiff |
2018-12-04 |
Nikos Nikoleris | base, sim: Add missing destructors |
tree | commitdiff |
2018-12-03 |
Rekai Gonzalez-Alb... | cpu: Change raw pointers to STL Containers |
tree | commitdiff |
2018-11-28 |
Pau Cabre | cpu: Added new stats to TAGE and LTAGE branch predictors |
tree | commitdiff |
2018-11-28 |
Pau Cabre | cpu: split LTAGE implementation into a base TAGE and... |
tree | commitdiff |
2018-11-28 |
Rekai Gonzalez-Alb... | cpu,arch-arm: Initialise data members |
tree | commitdiff |
2018-11-27 |
Gabe Black | arch, base, cpu, gpu, mem: Replace assert(0 or false... |
tree | commitdiff |
2018-11-22 |
Pau Cabre | cpu: Made LTAGE parameters configurable |
tree | commitdiff |
2018-11-22 |
Pau Cabre | cpu: Fixed useful counter handling in LTAGE |
tree | commitdiff |
2018-11-22 |
Pau Cabre | cpu: Fixes on the loop predictor part of LTAGE |
tree | commitdiff |
2018-11-17 |
Pau Cabre | cpu: Fix LTAGE max number of allocations on update |
tree | commitdiff |
2018-11-17 |
Pau Cabre | configs: Added an option for choosing branch predictor... |
tree | commitdiff |
2018-11-16 |
Rekai Gonzalez-Alb... | cpu: Fix the usage of const DynInstPtr |
tree | commitdiff |
2018-11-14 |
Pau Cabre | cpu: Fixed ratio of pred to hyst bits for LTAGE Bimodal |
tree | commitdiff |
2018-11-13 |
Pau Cabre | cpu: Fixed PC shifting on LTAGE branch predictor |
tree | commitdiff |
2018-10-09 |
Giacomo Travaglini | cpu: Fix MinorCPU executing Crypto Instructions |
tree | commitdiff |
2018-10-09 |
Matt Horsnell | arch-arm: AArch32 Crypto AES |
tree | commitdiff |
2018-10-09 |
Matt Horsnell | arch-arm: AArch32 Crypto SHA |
tree | commitdiff |
2018-10-01 |
Giacomo Travaglini | cpu: Fix typo in header guard for Noncaching cpu |
tree | commitdiff |
2018-09-13 |
Earl Ou | Fix SConstruct for asan build |
tree | commitdiff |
2018-09-12 |
Andreas Sandberg | cpu: Replace the fastmem with a new CPU model |
tree | commitdiff |
2018-08-24 |
Giacomo Travaglini | cpu: Stream/SubstreamID support in TrafficGen |
tree | commitdiff |
2018-08-24 |
Michiel W. van Tol | cpu: Turn BaseTrafficGen numSuppressed into a stat |
tree | commitdiff |
2018-08-21 |
Jason Lowe-Power | misc: Appease GCC 8 |
tree | commitdiff |
2018-08-17 |
Brandon Potter | scons,ruby: do not generate unnecessary files |
tree | commitdiff |
2018-08-10 |
Bradley Wang | cpu: Add hash functionality for RegId class |
tree | commitdiff |
2018-08-10 |
Bradley Wang | cpu: Removed unnecessary file reg_class_impl.hh |
tree | commitdiff |
2018-07-25 |
Giacomo Travaglini | cpu: Warn when (un)serializing a traffic generator |
tree | commitdiff |
2018-07-25 |
Giacomo Travaglini | cpu: Allow creation of traffic gen from generic SimObjects |
tree | commitdiff |
2018-07-24 |
Hanhwi Jang | cpu-o3: Missing freeing the heads of DepGraph in IQ... |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Add a Python-enabled traffic generator |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Support trace termination in BaseTrafficGen |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Unify error handling for address generators |
tree | commitdiff |
2018-07-13 |
Andreas Sandberg | cpu: Split the traffic generator into two classes |
tree | commitdiff |
2018-06-28 |
Andreas Sandberg | cpu: Remove reduntant protobuf includes |
tree | commitdiff |
2018-06-21 |
Giacomo Travaglini | cpu: Fix bug introduced by RequestPtr type change |
tree | commitdiff |
2018-06-14 |
Tuan Ta | cpu: Prevent suspended TimingSimple CPUs from fetching... |
tree | commitdiff |
2018-06-14 |
Tuan Ta | cpu: add a new instruction type 'Atomic' |
tree | commitdiff |
2018-06-14 |
Andreas Sandberg | cpu-minor: Remove redundant thread startup call |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Using smart pointers for memory Requests |
tree | commitdiff |
2018-06-11 |
Giacomo Travaglini | misc: Substitute pointer to Request with aliased RequestPtr |
tree | commitdiff |
2018-05-29 |
Giacomo Travaglini | cpu: Avoid unnecessary dynamic_pointer_cast in atomic... |
tree | commitdiff |
2018-04-27 |
Giacomo Travaglini | sim,cpu,mem,arch: Introduced MasterInfo data structure |
tree | commitdiff |
2018-03-27 |
Gabe Black | cpu: Remove ExtMachInst typedefs from the O3 CPU model. |
tree | commitdiff |
2018-03-27 |
Gabe Black | arch: cpu: Make the ExtMachInst type a template argumen... |
tree | commitdiff |
2018-03-27 |
Gabe Black | cpu: Stop extracting inst_flags from the machInst. |
tree | commitdiff |
2018-03-26 |
Gabe Black | cpu: Use the new asBytes function in the protobuf inst... |
tree | commitdiff |
2018-03-26 |
Gabe Black | arch: Add a virtual asBytes function to the StaticInst... |
tree | commitdiff |
2018-03-23 |
Jason Lowe-Power | ruby: Make sure addresses print in hex |
tree | commitdiff |
2018-03-06 |
Gabe Black | scons: Switch from the print statement to the print... |
tree | commitdiff |
2018-02-20 |
Andreas Sandberg | cpu-o3: Don't add non-speculative mem barriers to the... |
tree | commitdiff |
2018-02-05 |
Giacomo Travaglini | cpu: MinorCPU handling IsSquashAfter flag |
tree | commitdiff |
2018-01-29 |
Glenn Bergmans | arm: DT autogeneration - Generate cpus node |
tree | commitdiff |
2018-01-12 |
Xiaoyu Ma | sim: Allow passing a user-defined L2XBar to addTwoLevel... |
tree | commitdiff |
2018-01-11 |
Gabe Black | cpu: Make the CPU's TLB parameter a BaseTLB. |
tree | commitdiff |
2018-01-10 |
BKP | style: change C/C++ source permissions to noexec |
tree | commitdiff |
2018-01-10 |
Gabe Black | alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of... |
tree | commitdiff |
2018-01-09 |
Gabe Black | cpu: Use the NotAnInst flag to avoid passing an inst... |
tree | commitdiff |
2018-01-09 |
Gabe Black | cpu: Add a NotAnInst flag to the BaseDynInst class. |
tree | commitdiff |
2018-01-09 |
Gabe Black | cpu, power: Get rid of the remnants of the EA computati... |
tree | commitdiff |
2017-12-22 |
Gabe Black | arch,cpu: "virtualize" the TLB interface. |
tree | commitdiff |
2017-12-22 |
Gabe Black | cpu: Use the generic nop static inst instead of decodin... |
tree | commitdiff |
2017-12-22 |
Gabe Black | cpu: Add a pointer to a generic Nop StaticInst. |
tree | commitdiff |
2017-12-20 |
Gabe Black | cpu: Fix exit_gen.cc which used misc.hh instead of... |
tree | commitdiff |
2017-12-19 |
Riken Gohil | cpu-tester: Added ExitGen to TrafficGen |
tree | commitdiff |
2017-12-19 |
Riken Gohil | cpu-tester: Refactoring traffic generators into separat... |
tree | commitdiff |
2017-12-14 |
Jason Lowe-Power | misc: Updates for gcc7.2 for x86 |
tree | commitdiff |
2017-12-13 |
Gabe Black | arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64... |
tree | commitdiff |
2017-12-13 |
Gabe Black | cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp... |
tree | commitdiff |
2017-12-08 |
Matt Sinclair | x86,misc: add additional info on faulting X86 instructi... |
tree | commitdiff |
2017-12-05 |
Nikos Nikoleris | cpu: Add support for CMOs in the cpu models |
tree | commitdiff |
2017-12-04 |
Gabe Black | misc: Rename misc.(hh|cc) to logging.(hh|cc) |
tree | commitdiff |
2017-11-29 |
Andreas Sandberg | cpu: Don't override ISA if provided by user |
tree | commitdiff |
2017-11-29 |
David Guillen Fandos | cpu-minor: Add missing instruction stats |
tree | commitdiff |
2017-11-28 |
Andreas Sandberg | cpu-o3: Add missing vector stat initializers |
tree | commitdiff |
2017-11-21 |
Jose Marinho | cpu, cpu, sim: move Cycle probe update |
tree | commitdiff |
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