config, arm: Add a high-performance in order timing model
[gem5.git] / src / cpu /
2017-07-19 Rekai Gonzalez-Alb... cpu: Add missing rename of vector registers in the...
2017-07-17 Anouk Van Laercpu,o3: Fixed checkpointing bug occuring in the o3 CPU
2017-07-12 Sean Wilsontesters: Refactor some Event subclasses to lambdas
2017-07-12 Sean Wilsonkvm, mem: Refactor some Event subclasses into lambdas
2017-07-12 Sean Wilsoncpu: Refactor some Event subclasses to lambdas
2017-07-12 Jose Marinhocpu, sim: Add param to force CPUs to wait for GDB
2017-07-07 Andreas Sandbergkvm, arm: Don't forward IRQ/FIQ when using the kernel...
2017-07-05 Rekai Gonzalez-Alb... arch: ISA parser additions of vector registers
2017-07-05 Rekai Gonzalez-Alb... cpu: Added interface for vector reg file
2017-07-05 Rekai Gonzalez-Alb... cpu: Result refactoring
2017-07-05 Rekai Gonzalez-Alb... cpu: Simplify the rename interface and use RegId
2017-07-05 Nathanael Premillieucpu: Physical register structural + flat indexing
2017-07-05 Nathanael Premillieuarch, cpu: Architectural Register structural indexing
2017-06-20 Sean Wilsoncpu, gpu-compute: Replace EventWrapper use with EventFu...
2017-05-15 Alec Roelkecpu: fix problem with forwarding and locked load
2017-05-02 Andreas Sandbergpython: Use PyBind11 instead of SWIG for Python wrappers
2017-04-03 Curtis Dunhamarm, kvm: implement GIC state transfer
2017-03-16 Radhika Jagtapcpu: Print progress messages in Trace CPU
2017-02-27 Brandon Pottersyscall_emul: [PATCH 15/22] add clone/execve for thread...
2015-07-20 Brandon Pottersyscall_emul: [patch 13/22] add system call retry capab...
2017-02-14 Curtis Dunhamsim, kvm: make KvmVM a System parameter
2016-11-09 Brandon Potterstyle: [patch 3/22] reduce include dependencies in...
2016-11-09 Brandon Potterstyle: [patch 1/22] use /r/3648/ to reorganize includes
2017-01-03 Andreas Sandbergsim: Remove redundant export_method_cxx_predecls
2016-12-21 Arthur Peraiscpu: implement an L-TAGE branch predictor
2016-12-21 Arthur Peraiscpu: disallow speculative update of branch predictor...
2016-12-21 Arthur Peraiscpu: correct comments in tournament branch predictor
2016-12-21 Arthur Peraiscpu: Resolve targets of predicted 'taken' decode for O3
2016-12-21 Arthur Peraiscpu: Clarify meaning of cachePorts variable in lsq_unit...
2016-12-05 Nikos Nikoleriscpu: Change traffic generators to use different values...
2016-11-30 Alec Roelkearch: [Patch 1/5] Added RISC-V base instruction set...
2016-11-30 Jason Lowe-Powercpu: Remove branch predictor function predictInOrder
2016-10-15 Fernando Endocpu, arm: Distinguish Float* and SimdFloat*, create...
2016-10-06 Tushar Krishnaruby: rename networktest to garnet_synthetic_traffic.
2016-09-22 Rekai Gonzalez-Alb... cpu: Fix the O3 CPU Drain
2016-09-15 Radhika Jagtapcpu: Support exit when any one Trace CPU completes...
2016-09-15 Radhika Jagtapcpu: Adjust for trace offset and fix stats
2016-09-15 Radhika Jagtapcpu: Add frequency scaling to the Trace CPU
2016-09-14 Michael LeBeanekvm: Support timing accesses for KVM cpu
2016-09-14 Michael LeBeanesim: Refactor quiesce and remove FS asserts
2016-08-22 David Hashecpu, mem, sim: Change how KVM maps memory
2016-08-15 Andreas Sandbergcpu: Add missing override in Minor's exec context
2016-08-15 Reiley Jeapaulcpu: Fixed clang errors. Added 'override' keyword for...
2016-08-15 Nikos Nikoleriscpu, arch: fix the type used for the request flags
2016-07-21 Mitch Hayengacpu: Fix Minor SMT WFI/drain interaction issues
2016-07-21 Mitch Hayengacpu: Add SMT support to MinorCPU
2016-06-20 Andreas Sandbergmem: Resolve TrafficGen trace relative to the config
2016-06-06 David Guillen Fandospwr: Low-power idle power state for idle CPUs
2016-06-06 David Guillen Fandosstats: Fixing regStats function for some SimObjects
2016-06-06 Stephan Diestelhorstsim: Call regStats of base-class as well
2016-05-27 Ilias Vougioukascpu: fix lastStopped unserialisation
2016-05-26 Andreas Hanssoncpu: Add a basic progress check to the TrafficGen
2016-04-07 Mitch Hayengamem: Remove threadId from memory request class
2016-04-05 Mitch Hayengacpu: Implement per-thread GHRs
2016-04-05 Mitch Hayengacpu: Add an indirect branch target predictor
2016-04-05 Mitch Hayengacpu: Fix BTB threading oversight
2016-04-07 Andreas SandbergRevert to 74c1e6513bd0 (sim: Thermal support for Linux)
2016-04-06 Andreas SandbergRevert power patch sets with unexpected interactions
2016-04-05 Mitch Hayengamem: Remove threadId from memory request class
2016-04-05 Curtis Dunhamcpu: Implement per-thread GHRs
2016-04-05 Mitch Hayengacpu: Add an indirect branch target predictor
2016-04-05 Mitch Hayengacpu: Fix BTB threading oversight
2014-12-09 Akash Bagdiapower: Low-power idle power state for idle CPUs
2014-11-18 Akash Bagdiapower: Add power states to ClockedObject
2016-04-05 Mitch Hayengacpu: Add instruction opclass histogram to minor
2016-04-05 Geoffrey Blakecpu: Query CPU for inst executed from Python
2016-03-30 Andreas Sandbergkvm: Add an option to force context sync on kvm entry...
2016-03-20 Andreas Hanssoncpu: warn if TrafficGen is suppressing a large numer...
2015-05-05 Rekai Gonzalez Alb... cpu: Change literal integer constants to meaningful...
2015-11-27 Andreas Sandbergkvm: Shutdown KVM and disconnect performance counters...
2015-11-27 Andreas Sandbergbase: Add support for changing output directories
2015-08-10 Stephan Diestelhorstmem, cpu: Add assertions to snoop invalidation logic
2015-07-19 Krishnendra Nathellacpu: Fix LLSC atomic CPU wakeup
2016-02-24 Matteo Andreozzicpu: TraceGen fix for tick frequency check
2016-02-23 Andreas Hanssonscons: Add missing override to appease clang
2016-02-15 Andreas Hanssonmisc: Add missing overrides to appease clang
2016-02-10 Andreas Hanssonmem: Deduce if cache should forward snoops
2016-02-07 Steve Reinhardtstyle: eliminate explicit boolean comparisons
2016-02-07 Steve Reinhardtstyle: fix missing spaces in control statements
2016-02-07 Steve Reinhardtstyle: remove trailing whitespace
2016-01-18 Steve Reinhardtcpu. arch: add initiateMemRead() to ExecContext interface
2016-01-18 Steve Reinhardtcpu: remove unnecessary data ptr from O3 internal read...
2016-01-11 Andreas Hanssonscons: Enable -Wextra by default
2015-12-31 Andreas Hanssonmem: Make cache terminology easier to understand
2015-07-20 Brad Beckmannruby: more flexible ruby tester support
2015-12-07 Radhika Jagtapcpu: Support virtual addr in elastic traces
2015-12-07 Radhika Jagtapcpu: Create record type enum for elastic traces
2015-12-07 Radhika Jagtapcpu: Add TraceCPU to playback elastic traces
2015-12-07 Radhika Jagtapproto, probe: Add elastic trace probe to o3 cpu
2015-12-07 Radhika Jagtapprobe: Add probe in Fetch, IEW, Rename and Commit
2015-12-04 Pau Cabrecpu: fix unitialized variable which may cause assertion...
2015-11-22 Nathanael Premillieucpu: Fix base FP and CC register index in o3 insertThread()
2015-11-22 Andreas Hanssoncpu: Fix memory leak in traffic generator
2015-11-20 Andreas Sandbergcpu: Enforce 1 interrupt controller per thread
2015-11-16 Nilay VaishMerged changesets: 47e2adf7fb1a and b65d4e878ed2
2015-11-16 Nilay Vaisho3: drop unused statistic wbPenalized and wbPenalizedRate
2015-10-12 Andreas Hanssonmisc: Add explicit overrides and fix other clang >...
2015-10-12 Andreas Hanssonmisc: Remove redundant compiler-specific defines
2015-10-09 Rekai Gonzalez Alb... isa: Add parameter to pick different decoder inside ISA
2015-10-07 Steve Reinhardtsim: add ExecMacro to Exec* compound debug flags
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