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broadcom/vc5: Align 1D texture miplevels to 64b.
[mesa.git]
/
src
/
gallium
/
drivers
/
radeonsi
/
si_shader_nir.c
2017-11-15
Timothy Arceri
radeonsi: copy some nir gs info
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2017-11-15
Timothy Arceri
radeonsi: gather stream info in nir path
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2017-11-03
Timothy Arceri
ac/radeonsi: add support for tex instr without a derefence
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2017-10-31
Timothy Arceri
radeonsi: fix culldist_writemask in nir path
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2017-10-23
Bas Nieuwenhuizen
ac/nir: Only clamp shadow reference on radeonsi.
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2017-10-20
Jason Ekstrand
nir: Get rid of nir_shader::stage
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2017-07-31
Nicolai Hähnle
radeonsi/nir: lower uniforms to UBO loads
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2017-07-31
Nicolai Hähnle
radeonsi/nir: lower txp instructions
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2017-07-31
Nicolai Hähnle
radeonsi/nir: perform radeonsi-specific lowering and...
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2017-07-31
Nicolai Hähnle
radeonsi/nir: perform lowering of input/output driver...
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2017-07-31
Nicolai Hähnle
radeonsi/nir: add image descriptor loading
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2017-07-31
Nicolai Hähnle
ac/nir: add image and write parameter to ac_shader_abi...
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2017-07-31
Nicolai Hähnle
radeonsi/nir: set si_shader_context::num_{sampler,images}
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2017-07-31
Nicolai Hähnle
radeonsi/nir: implement ac_shader_abi::load_sampler_desc
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2017-07-31
Nicolai Hähnle
radeonsi/nir: load FS inputs
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2017-07-31
Nicolai Hähnle
radeonsi/nir: load VS inputs
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2017-07-31
Nicolai Hähnle
radeonsi: translate NIR to LLVM
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2017-07-31
Nicolai Hähnle
radeonsi: scan NIR shaders to obtain required info
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