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mem: Adjust cache queue reserve to more conservative values
[gem5.git]
/
src
/
mem
/
cache
/
base.cc
2016-03-17
Andreas Hansson
mem: Adjust cache queue reserve to more conservative...
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2016-03-17
Andreas Hansson
mem: Create a separate class for the cache write buffer
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2016-02-10
Andreas Hansson
mem: Deduce if cache should forward snoops
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2015-08-21
Andreas Hansson
mem: Add explicit Cache subclass and make BaseCache...
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2015-07-07
Andreas Sandberg
sim: Decouple draining from the SimObject hierarchy
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2015-07-07
Andreas Sandberg
sim: Make the drain state a global typed enum
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2015-07-03
Andreas Hansson
mem: Remove redundant is_top_level cache parameter
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2015-07-03
Andreas Hansson
mem: Add ReadCleanReq and ReadSharedReq packets
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2015-07-03
Andreas Hansson
mem: Allow read-only caches and check compliance
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2015-05-05
Andreas Hansson
mem: Snoop into caches on uncacheable accesses
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2015-05-05
David Guillen
mem: Remove templates in cache model
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2015-03-02
Andreas Hansson
mem: Tidy up the cache debug messages
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2015-03-02
Andreas Hansson
mem: Split port retry for all different packet classes
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2015-02-11
Marco Balboni
mem: Clarify usage of latency in the cache
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2014-12-23
Mitch Hayenga
mem: Add parameter to reserve MSHR entries for demand...
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2014-09-09
Andreas Hansson
misc: Fix a number of unitialised variables and members
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2014-06-27
Curtis Dunham
mem: write streaming support via WriteInvalidate promotion
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2014-09-03
Andreas Hansson
mem: Fix a bug in the cache port flow control
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2014-07-28
Anthony Gutierrez
mem: refactor LRU cache tags and add random replacement...
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2013-09-04
Andreas Hansson
arch: Resurrect the NOISA build target and rename it...
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2013-07-18
Andreas Hansson
mem: Set the cache line size on a system level
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2013-06-27
Prakash Ramrakhyani
mem: Reorganize cache tags and make them a SimObject
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2013-06-27
Andreas Hansson
mem: Remove the cache builder
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2013-03-26
Rene de Jong
mem: Cancel cache retry event when blocking port
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2013-01-29
Anthony Gutierrez
cache: remove drainManager because it's not used
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2013-01-07
Andreas Hansson
sim: Fatal if a clocked object is set to have a clock...
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2012-11-02
Andreas Sandberg
mem: Add support for writing back and flushing caches
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2012-11-02
Andreas Sandberg
sim: Move the draining interface into a separate base...
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2012-10-15
Andreas Hansson
Port: Add protocol-agnostic ports in the port hierarchy
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2012-10-15
Andreas Hansson
Mem: Use cycles to express cache-related latencies
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2012-09-25
Mrinmoy Ghosh
Cache: add a response latency to the caches
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2012-08-15
Anthony Gutierrez
O3,ARM: fix some problems with drain/switchout function...
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2012-03-30
William Wang
MEM: Introduce the master/slave port sub-classes in C++
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2012-03-22
Andreas Hansson
MEM: Split SimpleTimingPort into PacketQueue and ports
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2012-03-09
Ali Saidi
cache: Allow main memory to be at disjoint address...
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2012-02-24
Andreas Hansson
MEM: Simplify cache ports preparing for master/slave...
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2012-02-12
Dam Sunwoo
mem: fix cache stats to use request ids correctly
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2012-02-01
Gabe Black
Merge ... head, hopefully the last time for this batch.
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2012-01-31
Andreas Hansson
MEM: Remove the otherPort from the cache ports
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2012-01-31
Gabe Black
Merge with main repository.
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2012-01-29
Gabe Black
Yet another merge with the main repository.
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2012-01-28
Gabe Black
Merge with the main repo.
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2012-01-16
Gabe Black
Merge yet again with the main repository.
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2012-01-17
Andreas Hansson
MEM: Separate queries for snooping and address ranges
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2012-01-17
Andreas Hansson
MEM: Simplify ports by removing EventManager
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2012-01-07
Gabe Black
Another merge with the main repository.
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2012-01-07
Gabe Black
Merge with the main repository again.
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2012-01-07
Gabe Black
Merge with main repository.
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2011-11-07
Gabe Black
SE/FS: Get rid of FULL_SYSTEM in mem.
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2011-04-15
Nathan Binkert
trace: reimplement the DTRACE function so it doesn...
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2011-03-18
Ali Saidi
Automated merge with ssh://hg@repo.m5sim.org/m5
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2011-03-18
Ali Saidi
Mem: Fix issue with dirty block being lost when entire...
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2011-01-08
Steve Reinhardt
Replace curTick global variable with accessor functions.
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2010-02-23
Lisa Hsu
cache: Make caches sharing aware and add occupancy...
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2009-06-05
Nathan Binkert
types: clean up types, especially signed vs unsigned
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2008-07-16
Steve Reinhardt
mem: use single BadAddr responder per system.
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2009-04-06
Gabe Black
Merge ARM into the head. ARM will compile but may not...
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2008-10-09
Nathan Binkert
eventq: convert all usage of events to use the new...
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2008-02-11
Steve Reinhardt
Automated merge with file:/home/stever/hg/m5-orig
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2008-02-10
Steve Reinhardt
Fix #include lines for renamed cache files.
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2008-02-10
Steve Reinhardt
Rename cache files for brevity and consistency with...
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