X86: Fix a comment and adjust the stack base address.
[gem5.git] / src / mem /
2007-07-24 Gabe BlackMerge with head.
2007-07-24 Nathan BinkertMajor changes to how SimObjects are created and initial...
2007-07-22 Steve ReinhardtMerge Gabe's changes with mine.
2007-07-14 Steve ReinhardtFix & tweak DPRINTFs for tracediff w/new cache code.
2007-06-21 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-21 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-21 Ali SaidiUse FastAlloc for Packet, Request, CoherenceState,...
2007-06-20 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-20 Vincentius RobbyMinor error.
2007-06-20 Vincentius RobbyRemoved "adding instead of dividing" trick.
2007-06-20 Nathan BinkertMake sure all parameters have default values if they're
2007-06-20 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-12 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-10 Nathan BinkertAdd a startup function that will fast forward to the...
2007-06-10 Nathan BinkertMore realistic parameters
2007-06-08 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-06-05 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-06-05 Ali SaidiClean up some of vincent's code and commit it
2007-05-31 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-05-30 Steve Reinhardttport.cc:
2007-05-30 Steve ReinhardtA little more cleanup & refactoring of SimpleTimingPort.
2007-05-28 Steve ReinhardtMerge zizzer.eecs.umich.edu:/bk/newmem
2007-05-28 Steve ReinhardtRestructure SimpleTimingPort a bit:
2007-05-28 Steve ReinhardtReformat comments to meet line length restriction.
2007-05-28 Nathan BinkertMove SimObject python files alongside the C++ and fix
2007-05-26 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-05-22 Steve ReinhardtChange getDeviceAddressRanges to use bool for snoop...
2007-05-21 Steve ReinhardtInsist that PhysicalMemory object have at least one...
2007-05-19 Steve ReinhardtOops... some places in C++ explicitly ask for a "functi...
2007-05-19 Steve ReinhardtPhysicalMemory has vector of uniform ports instead...
2007-05-18 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-05-15 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-05-15 Ali SaidiMerge zizzer:/bk/newmem
2007-05-15 Ali Saidihopefully the final hacky change to make the bus bridge...
2007-05-14 Steve ReinhardtMerge vm1.(none):/home/stever/bk/newmem-head
2007-05-14 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-05-14 Ali SaidiMerge zizzer:/bk/newmem
2007-05-14 Ali Saidiadd uglyiness to fix dmas
2007-05-14 Steve ReinhardtEliminate unused PacketPtr from BaseCache's
2007-05-14 Steve ReinhardtSplit BaseCache::CacheEvent into RequestEvent and Respo...
2007-05-13 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-05-13 Ali Saidifix handling of atomic packets
2007-05-10 Ali Saidiremove hit_latency and make latency do the right thing
2007-05-10 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-05-10 Ali SaidiMerge zizzer:/bk/newmem
2007-05-10 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-05-10 Ali Saidiundo my previous bus change, it can make the bus deadlo...
2007-05-09 Ali SaidiMerge zeep:/z/saidi/work/m5.newmem
2007-05-09 Ali Saidiadd a backoff algorithm when nacks are received by...
2007-05-09 Ali Saidifix the translating ports so it can add a page on a...
2007-05-09 Ali SaidiMerge zizzer:/bk/newmem
2007-05-07 Ali Saidithe bridge never returns false when recvTiming() is...
2007-05-07 Ali Saidifix partial writes with a functional memory hack
2007-04-13 Ali SaidiMerge zizzer:/bk/newmem
2007-04-05 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-04-04 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-04-04 Kevin LimMerge ktlim@zizzer:/bk/newmem
2007-04-04 Ali SaidiMerge zizzer:/bk/newmem
2007-04-04 Ali SaidiThe MemoryObject tha owns a port should delete it if...
2007-04-03 Ali SaidiMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2007-03-30 Ali SaidiMerge zizzer:/bk/newmem
2007-03-29 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-28 Ron DreslinskiCall compare and Swap on the target, not the response.
2007-03-27 Ron DreslinskiMerge zizzer:/bk/newmem
2007-03-27 Ron DreslinskiFirst Pass At Cmp/Swap in caches
2007-03-26 Ali SaidiMerge zizzer:/bk/newmem
2007-03-24 Kevin LimMerge ktlim@zizzer:/bk/newmem
2007-03-23 Kevin LimMerge ktlim@zizzer:/bk/newmem
2007-03-23 Kevin Lim3 memory system fixes:
2007-03-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-13 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-13 Ali SaidiMerge zizzer:/bk/newmem
2007-03-12 Ron DreslinskiMerge zizzer:/bk/newmem
2007-03-12 Ron DreslinskiClean up more memory leaks
2007-03-12 Ron DreslinskiMerge zizzer:/bk/newmem
2007-03-12 Ron DreslinskiFix some of the memory leaks related to writebacks
2007-03-12 Ali SaidiMerge zizzer:/bk/newmem
2007-03-11 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-11 Nathan BinkertRework the way SCons recurses into subdirectories,...
2007-03-09 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-09 Ali SaidiMerge zizzer:/bk/newmem
2007-03-09 Kevin LimTwo fixes:
2007-03-08 Ali Saidistop m5 from leaking like a sieve
2007-03-08 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-07 Gabe BlackMove the magic m5 PageTableFault into sim/faults.[hh...
2007-03-07 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-07 Gabe BlackMake byteswap work correctly on Twin??_t types.
2007-03-07 Ali SaidiMerge zizzer:/bk/newmem
2007-03-06 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-06 Ali SaidiMerge zizzer:/bk/newmem
2007-03-06 Nathan BinkertMove all of the parameters of the Root SimObject so...
2007-03-04 Ali SaidiMerge zizzer:/bk/newmem
2007-03-03 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-03-03 Ali Saidimake ldtw(a) -- Twin 32 bit load work correctly --...
2007-02-21 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2007-02-19 Ali SaidiMerge zizzer:/bk/newmem
2007-02-19 Ali Saidiimplement vtophys and 32bit gdb support
2007-02-12 Ali Saidisome forgotten commits
2007-02-12 Ali SaidiMerge zizzer:/bk/newmem
2007-02-12 Ali Saidirename store conditional stuff as extra data so it...
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