x86: Expose the raw hash map of MSRs
[gem5.git] / src / mem /
2013-09-11 Joel Hestnessruby: Fix Topology throttle connections
2013-09-11 Joel Hestnessruby: Statically allocate stats in SimpleNetwork, Switc...
2013-09-06 Nilay Vaishruby: network: convert to gem5 style stats
2013-09-06 Nilay Vaishruby: profiler: removes function resourceUsage()
2013-09-06 Nilay Vaishruby: remove undefined message size type
2013-09-06 Nilay Vaishruby: network: removes reset functionality
2013-09-06 Nilay Vaishruby: network: shorten variable names
2013-09-06 Nilay Vaishruby: converts sparse memory stats to gem5 style
2013-09-04 Andreas Hanssonarch: Resurrect the NOISA build target and rename it...
2013-08-19 Andreas Hanssonstats: Cumulative stats update
2013-08-19 Andreas Hanssonconfig: Command line support for multi-channel memory
2013-08-19 Andreas Hanssonmem: Change AbstractMemory defaults to match the common...
2013-08-19 Andreas Hanssonmem: Use STL deque in favour of list for DRAM queues
2013-08-19 Andreas Hanssonmem: Perform write merging in the DRAM write queue
2013-08-19 Amin Farmahinimem: Replacing bytesPerCacheLine with DRAM burstLength...
2013-08-19 Andreas Hanssonmem: Warn instead of panic for tXAW violation
2013-08-19 Andreas Hanssonmem: Allow disabling of tXAW through a 0 activation...
2013-08-19 Andreas Hanssonmem: Add an internal packet queue in SimpleMemory
2013-08-07 Nilay Vaishruby: slicc: remove double trigger, continueProcessing
2013-08-07 Nilay Vaishruby: slicc: move some code to AbstractController
2013-07-18 Andreas Hanssonmem: Set the cache line size on a system level
2013-07-18 Xiangyu Dongmem: Add cache class destructor to avoid memory leaks
2013-07-11 Brad Beckmannruby: removed the very old double trigger hack stable_2013_10_14
2013-06-29 Nilay Vaishruby: append transition comment only when in opt/debug
2013-06-29 Nilay Vaishruby: network: remove reconfiguration code
2013-06-27 Prakash Ramrakhyanimem: Reorganize cache tags and make them a SimObject
2013-06-27 Andreas Hanssonmem: Remove the cache builder
2013-06-27 Akash Bagdiasim: Add the notion of clock domains to all ClockedObjects
2013-06-27 Akash Bagdiaconfig: Remove redundant explicit setting of default...
2013-06-27 Andreas Hanssonmem: Tidy up the bridge with const and additional checks
2013-06-27 Andreas Hanssonmem: Fix CommMonitor style and response check
2013-06-27 Andreas Hanssonmem: Align cache timing to clock edges
2013-06-27 Andreas Hanssonmem: Cycles converted to Ticks in atomic cache accesses
2013-06-27 Andreas Hanssonmem: Remove a redundant heap allocation for a snoop...
2013-06-27 Andreas Hanssonmem: Remove CoherentBus snoop port unused private member
2013-06-25 Nilay Vaishruby: moesi cmp directory: separate actions for externa...
2013-06-25 Nilay Vaishruby: mesi cmp directory: separate actions for external...
2013-06-25 Nilay Vaishruby: profiler: lots of inter-related changes
2013-06-24 Nilay Vaishruby: remove the three files related to profiling
2013-06-24 Joel Hestness ext... ruby: MessageBuffer: Remove unused m_size variable
2013-06-20 Lena Olsonruby: fix typo in MOESI_CMP_token protocol
2013-06-18 Lena Olsonruby: Fix prefetching for MESI_CMP_Directory
2013-06-18 Lena Olsonruby: fix slicc compiler to complain about duplicate...
2013-06-18 Lena Olsonruby: restrict Address to being a type and not a variab...
2013-06-18 Andreas Sandbergkvm: Use the address finalization code in the TLB
2013-06-09 Nilay Vaishruby: remove several unused variables in Profiler
2013-06-09 Nilay Vaishruby: remove periodic event from Profiler
2013-06-09 Nilay Vaishruby: stats: use gem5's stats for cache and memory...
2013-06-09 Nilay Vaishruby: remove undefined functions in Address class
2013-05-30 Andreas Hanssonmem: More descriptive DRAM config names
2013-05-30 Andreas Hanssonmem: Add bytes per activate DRAM controller stat
2013-05-30 Andreas Hanssonmem: Add static latency to the DRAM controller
2013-05-30 Andreas Hanssonmem: Spring cleaning of MSHR and MSHRQueue
2013-05-30 Andreas Hanssonmem: Fix MSHR print format
2013-05-30 Andreas Hanssonmem: Make returning snoop responses occupy response...
2013-05-30 Andreas Hanssonmem: Make the buses multi layered
2013-05-30 Andreas Hanssonmem: Separate the two snoop response cases in the bus
2013-05-30 Andreas Hanssonmem: Tidy up a few variables in the bus
2013-05-30 Uri Wienermem: Add basic stats to the buses
2013-05-30 Andreas Hanssonmem: Use unordered set in bus request tracking
2013-05-30 Andreas Hanssonmem: Check for waiting state in bus draining
2013-05-30 Andreas Hanssonmem: Add a LPDDR3-1600 configuration
2013-05-30 Andreas Hanssonmem: Adapt the LPDDR2 to match a single x32 channel
2013-05-30 Andreas Hanssonmem: Avoid explicitly zeroing the memory backing store
2013-05-21 Malek Muslehruby: slicc: fix error msg in TypeFieldMemberAST.py
2013-05-21 Nilay Vaishruby: moesi hammer: cosmetic changes
2013-05-21 Nilay Vaishruby: mesi cmp directory: cosmetic changes
2013-05-21 Nilay Vaishruby: moesi cmp token: cosmetic changes
2013-05-21 Nilay Vaishruby: moesi cmp directory: cosmetic changes
2013-05-21 Nilay Vaish ext... ruby: add stats to .sm files, remove cache profiler
2013-04-23 Mitch Hayengasim: Fix two bugs relating to software caching of PageT...
2013-04-23 Nilay Vaishruby: mesi coherence protocol: remove unused state...
2013-04-23 Nilay Vaishruby: patch checkpoint restore with garnet
2013-04-22 Andreas Hanssonmem: Address mapping with fine-grained channel interleaving
2013-04-22 Andreas Hanssonmem: More descriptive enum names for address mapping
2013-04-22 Andreas Hanssonmem: Add a WideIO DRAM configuration
2013-04-22 Uri Wienermem: Adding verbose debug output in the memory system
2013-04-22 Andreas Hanssonmem: Replace check with panic where inhibited should...
2013-04-22 Dam Sunwoosim: separate nextCycle() and clockEdge() in clockedObjects
2013-04-17 Nilay VaishMerged c22628fa2564 and 2285b98847d7
2013-04-17 Nilay Vaishruby: moesi cmp directory: add copyright notice
2013-04-09 Joel HestnessRuby: Fix RubyPort evict packet memory leak
2013-04-09 Joel HestnessRuby: Delete packet requests during warmup
2013-04-09 Joel HestnessRuby: Add field to slicc machine for generic type
2013-04-09 Joel HestnessRuby: Order profilers based on version
2013-04-09 Jason PowerRuby: More descriptive message buffer connection fatal
2013-04-09 Jason PowerRuby: Fix typo in Slicc if-statement AST error
2013-04-08 Joel HestnessRuby System, Cache Recorder: Use delete [] for trace...
2013-03-27 Mitch Hayengamem: Fix cache latency bug
2013-03-26 Rene de Jongmem: Cancel cache retry event when blocking port
2013-03-26 Andreas Hanssonmem: Separate waiting for the bus and waiting for a...
2013-03-26 Andreas Hanssonmem: Introduce a variable for the retrying port
2013-03-26 Andreas Hanssonmem: Add optional request flags to the packet trace
2013-03-22 Nilay Vaishruby: slicc: set sender, receiver clock objs for option...
2013-03-22 Nilay Vaishruby: message buffer: correct previous errors
2013-03-22 Nilay Vaishruby: message buffer: remove _ptr from some variables
2013-03-22 Nilay Vaishruby: message buffer node: used Tick in place of Cycles
2013-03-22 Nilay Vaishruby: consumer: avoid using receiver side clock
2013-03-22 Nilay Vaishruby: remove unsued profile functions
2013-03-22 Nilay Vaishruby: keep histogram of outstanding requests in seq
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