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i965/fs: Switch opt_cse() to the fs_builder constructor from instruction.
[mesa.git]
/
src
/
mesa
/
drivers
/
dri
/
i965
/
brw_misc_state.c
2015-06-24
Chris Wilson
i965: Rename intel_emit* to reflect their new location...
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2015-06-17
Kevin Rogovin
i965: Use _mesa_geometric_ functions appropriately
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2015-05-02
Jordan Justen
i965/state: Emit pipeline select when changing pipelines
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2015-03-31
Jordan Justen
i965/state: Don't use brw->state.dirty.brw
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2015-03-10
Jordan Justen
i965/hiz: Start to separate miptree out from hiz buffers
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2015-02-17
Kenneth Graunke
i965: Do Sandybridge workaround flushes before each...
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2014-12-03
Kenneth Graunke
i965: Delete brw_state_flags::cache and related code.
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2014-12-03
Kenneth Graunke
i965: Move BRW_NEW_*_PROG_DATA flags to .brw (not ...
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2014-12-03
Kenneth Graunke
i965: Rename CACHE_NEW_*_PROG to BRW_NEW_*_PROG_DATA.
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2014-11-29
Kenneth Graunke
i965: Combine CACHE_NEW_*_UNIT into BRW_NEW_GEN4_UNIT_S...
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2014-11-29
Kenneth Graunke
i965: Alphabetize brw_tracked_state flags and use a...
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2014-11-13
Ben Widawsky
i965: Always enable VF statistics
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2014-11-03
Kenneth Graunke
i965/skl: Set mask bits in PIPELINE_SELECT on Skylake.
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2014-09-05
Jordan Justen
Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be...
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2014-09-02
Paul Berry
i965: Create a macro for setting a dirty bit.
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2014-08-16
Jordan Justen
i965/gen6 depth surface: program 3DSTATE_DEPTH_BUFFER...
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2014-05-12
Eric Anholt
i965: Move has_hiz from the slice to the level.
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2014-05-01
Eric Anholt
i965: Delete the intel_regions.c code.
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2014-05-01
Eric Anholt
i965: Drop use of intel_region from miptrees.
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2014-05-01
Eric Anholt
i965: Move intel_region_get_aligned_offset() to be...
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2014-05-01
Eric Anholt
i965: Move intel_region_get_tile_masks() to be a miptre...
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2014-05-01
Kenneth Graunke
i965: Actually emit PIPELINE_SELECT and 3DSTATE_VF_STAT...
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2014-03-06
Eric Anholt
i965: Fix render-to-texture in non-FinishRenderTexture...
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2014-02-19
Kenneth Graunke
i965: Pull format conversion logic out of brw_depthbuff...
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2014-02-10
Kenneth Graunke
mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT...
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2014-01-27
Mark Mueller
mesa: Change many Type P MESA_FORMATs to meet naming...
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2014-01-27
Mark Mueller
mesa: Change many Type A MESA_FORMATs to meet naming...
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2014-01-19
Kenneth Graunke
i965: Update invariant state for Broadwell.
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2014-01-17
Kenneth Graunke
i965: Remove CACHED_BATCH support altogether.
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2014-01-17
José Fonseca
s/Tungsten Graphics/VMware/
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2013-12-05
Kenneth Graunke
i965: Drop trailing whitespace from the rest of the...
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2013-11-07
Kenneth Graunke
i965: Use has_surface_tile_offset in depth/stencil...
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2013-10-28
Kenneth Graunke
i965: Emit post-sync non-zero flush before 3DSTATE_DRAW...
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2013-10-13
Kenneth Graunke
i965: Remove has_aa_line_parameters.
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2013-09-19
Kenneth Graunke
i965: Move binding table code to a new file, brw_bindin...
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2013-09-13
Kenneth Graunke
i965: Use brw_stage_state for WM data as well.
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2013-09-01
Paul Berry
i965: Move data from brw->vs into a base class if gs...
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2013-09-01
Paul Berry
i965: rename legacy gs structs and functions to ff_gs.
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2013-08-21
Ville Syrjälä
i965/gen7: Set MOCS L3 cacheability for IVB/BYT (v2)
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2013-08-21
Ville Syrjälä
i965/hsw: Populate MOCS for STATE_BASE_ADDRESS (v2)
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2013-08-04
Jordan Justen
gen7 depth surface: program 3DSTATE_DEPTH_BUFFER to...
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2013-08-04
Jordan Justen
i965: init global state first in brw_workaround_depthst...
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2013-07-09
Kenneth Graunke
i965: Delete intel_context entirely.
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2013-07-09
Kenneth Graunke
i965: Move intel_context::gen and gt fields to brw_context.
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2013-07-09
Kenneth Graunke
i965: Move intel_context::is_<platform> flags to brw_co...
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2013-07-09
Kenneth Graunke
i965: Move must_use/has_separate_stencil fields to...
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2013-07-09
Kenneth Graunke
i965: Shorten context base class dereference chains.
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2013-07-09
Kenneth Graunke
i965: Move intel_context::batch to brw_context.
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2013-07-09
Kenneth Graunke
i965: Move intel_context::vtbl to brw_context.
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2013-07-09
Kenneth Graunke
i965: Pass brw_context to functions rather than intel_c...
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2013-06-29
Matt Turner
i965: NULL check depth_mt to quiet static analysis.
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2013-06-10
Kenneth Graunke
i965: Emit invariant state once at startup on Gen6+.
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2013-05-21
Kenneth Graunke
i965: Kill software primitive counting entirely.
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2013-04-24
Chia-I Wu
i965/gen7: fix 3DSTATE_LINE_STIPPLE_PATTERN
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2013-04-12
Eric Anholt
i965: Fix an unused variable warning in the release...
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2013-04-10
Chad Versace
i965: Remove brw_context::depthstencil::hiz_mt
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2013-04-10
Chad Versace
intel: Replace checks for hiz_mt with intel_has*hiz()
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2013-04-10
Chad Versace
i965: Change signature of brw_get_depthstencil_tile_masks()
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2013-04-02
Paul Berry
i965: Reduce code duplication in handling of depth...
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2013-03-19
Paul Berry
i965: Avoid unnecessary copy when depthstencil workarou...
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2013-01-18
Eric Anholt
intel: Make intel_region's pitch be bytes instead of...
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2012-12-22
Eric Anholt
i965: Add perf debug for depth/stencil alignment workar...
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2012-11-28
Eric Anholt
i965/gen4-5: Fix segfaults with stencil-only depth...
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2012-11-19
Eric Anholt
i965: Use the separate stencil buffer's offsets for...
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2012-11-19
Eric Anholt
i965: Move all the depth/stencil/hiz offset logic into...
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2012-11-19
Eric Anholt
i965: When rebasing depth or stencil, update x/y before...
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2012-11-01
Eric Anholt
i965/gen4: Fix assertion failures in depthstencil pigli...
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2012-10-16
Eric Anholt
i965: Fix rendering to small mipmaps of depth/stencil...
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2012-10-16
Eric Anholt
i965: Share the draw x/y offset masking code between...
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2012-09-12
Paul Berry
intel: Add map_stencil_as_y_tiled to intel_region_get_a...
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2012-09-12
Paul Berry
intel: Add map_stencil_as_y_tiled to intel_region_get_t...
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2012-05-23
Eric Anholt
i965/gen6+: Add support for fast depth clears.
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2012-05-15
Paul Berry
i965/gen6: Initial implementation of MSAA.
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2012-05-11
Marek Olšák
Merge branch 'gallium-userbuf'
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2012-05-07
Paul Berry
i965/Gen6: Work around GPU hangs due to misaligned...
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2012-05-07
Paul Berry
i965: Fix mipmap offsets for HiZ and separate stencil...
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2012-05-01
Brian Paul
intel: use _mesa_is_winsys/user_fbo() helpers
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2012-04-10
Paul Berry
i965: Stop lying about cpp and height of a stencil...
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2012-02-29
Kenneth Graunke
i965: Fix Gen6+ dynamic state upper bound on older...
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2012-02-21
Eric Anholt
i965: Rename the original binding table to mention...
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2012-02-21
Eric Anholt
i965: Split the gen6 GS binding table to a separate...
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2012-02-21
Eric Anholt
i965: Split the VS binding table to a separate table.
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2012-02-11
Kenneth Graunke
i965: Fix border color on Ironlake.
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2012-01-24
Brian Paul
intel: derive intel_renderbuffer from swrast_renderbuffer
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2012-01-24
Brian Paul
intel: use intel_rb_format() to get renderbuffer format
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2012-01-23
Kenneth Graunke
i965: Fix border color on Sandybridge and Ivybridge.
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2012-01-18
Chad Versace
i965/gen5: Fix rendering of depth buffers without stenc...
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2012-01-12
Eric Anholt
i965/gen7: Fix depth buffer rendering to tile offsets.
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2012-01-11
Eric Anholt
i965: Fix compiler warnings from hiz changes.
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2012-01-10
Chad Versace
i965: Replace references to stencil region size with...
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2012-01-08
Kenneth Graunke
i965: Correct misspellings of "invariant".
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2011-12-23
Kenneth Graunke
i965: Don't use BRW_DEPTHFORMAT_D24_UNORM_X8_UINT on...
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2011-12-20
Paul Berry
i965 gen6: Initial implementation of transform feedback.
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2011-12-19
Eric Anholt
i965: Add support for GL_ARB_depth_buffer_float under...
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2011-12-19
Eric Anholt
i965: Add separate stencil/HiZ setup for MESA_FORMAT_Z3...
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2011-12-19
Eric Anholt
intel: Stop creating the wrapped stencil irb.
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2011-12-07
Kenneth Graunke
i965: Return BRW_DEPTHBUFFER_D32_FLOAT as the null...
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2011-11-30
Eric Anholt
i965: Base HW depth format setup based on MESA_FORMAT...
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2011-11-23
Chad Versace
i965/gen6: Fix GPU hang when using stencil buffer witho...
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2011-11-22
Chad Versace
Merge branch 'hiz' of ssh://people.freedesktop.org...
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