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ruby: removed Write_Only AccessPermission
[gem5.git] / src / python /
2016-01-18 Steve Reinhardtsim: fix redundant --debug-start help string tree | commitdiff
2016-01-18 Steve Reinhardtsim: don't ignore SIG_TRAP tree | commitdiff
2015-12-10 Andreas Sandbergdev: Move network devices to src/dev/net/ tree | commitdiff
2015-12-01 Andreas Sandbergconfig: Fix broken SimObject listing tree | commitdiff
2015-11-22 Andrew Bardsleyconfig: Added missing types to JSON/INI Python reader tree | commitdiff
2015-10-07 Steve Reinhardtsim: print pid in output header tree | commitdiff
2015-09-30 Curtis Dunhambase: remove Trace::enabled flag tree | commitdiff
2015-08-14 Joel Hestnessruby: Expose MessageBuffers as SimObjects tree | commitdiff
2015-07-07 Andreas Sandbergsim: Decouple draining from the SimObject hierarchy tree | commitdiff
2015-07-07 Andreas Sandbergsim: Move mem(Writeback|Invalidate) to SimObject tree | commitdiff
2015-07-07 Andreas Sandbergpython: Remove redundant drain when changing memory... tree | commitdiff
2015-07-07 Andreas Sandbergsim: Refactor the serialization base class tree | commitdiff
2015-03-23 Steve Reinhardtmisc: quote args in echoed command line tree | commitdiff
2015-02-03 Andreas Hanssonbase: Add XOR-based hashed address interleaving tree | commitdiff
2015-02-03 Geoffrey Blakeconfig: Fix typo in Float param tree | commitdiff
2014-12-23 Curtis Dunhamsim: fix reference counting of PythonEvent tree | commitdiff
2014-12-02 Andreas Hanssonscons: Ensure dictionary iteration is sorted by key tree | commitdiff
2014-11-12 Andreas Hanssonsim: Sort SimObject descendants and ports tree | commitdiff
2014-11-06 Nilay Vaishruby: interface with classic memory controller tree | commitdiff
2014-10-16 Andreas Hanssonsim: EventQueue wakeup on events scheduled outside... tree | commitdiff
2014-10-16 Andrew Bardsleybase: Reimplement the DPRINTF mechanism in a Logger... tree | commitdiff
2014-10-16 Andreas Hanssonconfig: Add the ability to read a config file using... tree | commitdiff
2014-10-16 Andrew Bardsleyconfig: Add a --without-python option to build process tree | commitdiff
2014-10-11 Andrew Lukefahrsim: draining bug for fast-forwaring multiple cores stable_2014_12_14 tree | commitdiff
2014-10-09 Andreas Hanssonconfig: Add Current as a parameter type tree | commitdiff
2014-09-20 Andreas Hanssonmem: Rename Bus to XBar to better reflect its behaviour tree | commitdiff
2014-09-20 Andrew Bardsleyconfig: Cleanup .json config file generation tree | commitdiff
2014-09-09 Geoffrey Blakeconfig: Fix vectorparam command line parsing tree | commitdiff
2014-09-03 Geoffrey Blakeconfig: Add port splicing capability to PortRef class tree | commitdiff
2014-09-03 Mitch Hayengaconfig: Change parsing of Addr so hex values work from... tree | commitdiff
2014-09-01 Nilay Vaishruby: message buffers: significant changes tree | commitdiff
2014-08-10 Geoffrey Blakeconfig: Add hooks to enable new config sys tree | commitdiff
2014-05-09 Andrew Bardsleycpu: Add flag name printing to StaticInst tree | commitdiff
2014-05-09 Geoffrey Blakeconfig: Avoid generating a reference to myself for... tree | commitdiff
2014-05-09 Curtis Dunhamscons: Require SWIG >= 2.0.4 and remove vector typemaps tree | commitdiff
2014-04-23 Sascha Bischoffmisc: Proper type check and import for PortRef tree | commitdiff
2014-02-11 Curtis Dunhamstats: better error message for uninitialized statistic tree | commitdiff
2014-03-23 Stan Czerniawskimisc: Fix -q (quiet) flag tree | commitdiff
2014-01-24 Matt Horsnellbase: add support for probe points and common probes tree | commitdiff
2014-01-24 Andreas Hanssonconfig: Make the Clock a Tick parameter like Latency... tree | commitdiff
2014-01-04 Steve Reinhardtpython: provide better error message for wrapped C... tree | commitdiff
2014-01-04 Steve Reinhardtpython: don't die on assignment to cloned object tree | commitdiff
2013-12-03 Nilay Vaishsim: reset stats after startup tree | commitdiff
2013-11-25 Steve Reinhardt... sim: simulate with multiple threads and event queues tree | commitdiff
2013-11-14 Steve Reinhardttests: suppress output on switcheroo tests tree | commitdiff
2013-11-01 Andreas Hanssonsim: Clarify the difference between tracing and debugging tree | commitdiff
2013-10-31 Geoffrey Blakeconfig: Fix handling of parents for simobject vectors tree | commitdiff
2013-10-17 Geoffrey Blakeconfig: Fix ommission of number base in ethernet addres... tree | commitdiff
2013-10-17 Geoffrey Blakeconfig: Fix for port references generated multiple... tree | commitdiff
2013-09-18 Andreas Hanssonswig: Fix issue with circular import in 2.0.9/2.0.10 tree | commitdiff
2013-09-04 Andreas Hanssonutil: Add ini string as tooltip info in dot output tree | commitdiff
2013-09-04 Andreas Hanssonutil: Add colours to the dot output tree | commitdiff
2013-09-04 Andreas Hanssonutil: Add class name to dot graph and output to svg tree | commitdiff
2013-09-04 Andreas Hanssonarch: Resurrect the NOISA build target and rename it... tree | commitdiff
2013-08-19 Akash Bagdiapower: Add voltage domains to the clock domains tree | commitdiff
2013-07-18 Andreas Hanssonsim: Make MaxTick in Python match the one in C++ tree | commitdiff
2013-06-27 Andreas Hanssonconfig: Remove Clock parameter multiplication tree | commitdiff
2013-06-03 Andreas Sandbergbase: Make the Python module loader PEP302 compliant tree | commitdiff
2013-02-19 Andreas Hanssonscons: Add warning for missing declarations tree | commitdiff
2013-02-19 Andreas Hanssonx86: Move APIC clock divider to Python tree | commitdiff
2013-02-15 Sascha Bischoffbase: Add warn() and inform() to m5.utils for use from... tree | commitdiff
2013-02-15 Andreas Sandbergsim: Add a system-global option to bypass caches tree | commitdiff
2013-02-15 Andreas Sandbergconfig: Move CPU handover logic to m5.switchCpus() tree | commitdiff
2013-02-10 Andreas Sandbergbase: Add support for newer versions of IPython tree | commitdiff
2013-02-10 Andreas Sandbergbase: Fix broken IPython argument handling tree | commitdiff
2013-01-07 Sascha Bischoffstats: Fix swig wrapping for Tick in stats tree | commitdiff
2013-01-07 Andreas Sandbergcpu: Introduce sanity checks when switching between... tree | commitdiff
2013-01-07 Andreas Hanssonmem: Add interleaving bits to the address ranges tree | commitdiff
2013-01-07 Andreas Hanssonconfig: Traverse lists when visiting children in all... tree | commitdiff
2012-11-16 Nilay Vaishsim: have a curTick per eventq tree | commitdiff
2012-11-02 Andreas Sandbergsim: Add drain methods to request additional cleanup... tree | commitdiff
2012-11-02 Andreas Sandbergsim: Add SWIG interface for Serializable tree | commitdiff
2012-11-02 Andreas Sandbergpython: Rename doDrain()->drain() and make it do the... tree | commitdiff
2012-11-02 Andreas Sandbergsim: Reuse the code to change memory mode. tree | commitdiff
2012-11-02 Andreas Sandbergsim: Move the draining interface into a separate base... tree | commitdiff
2012-11-02 Andreas Sandbergsim: Include object header files in SWIG interfaces tree | commitdiff
2012-11-02 Andreas SandbergPartly revert [4f54b0f229b5] and move draining to m5... tree | commitdiff
2012-10-15 Andreas HanssonPort: Add protocol-agnostic ports in the port hierarchy tree | commitdiff
2012-10-15 Andreas HanssonParam: Fix proxy traversal to support chained proxies tree | commitdiff
2012-09-25 Sascha BischoffStatistics: Add a function to configure periodic stats... tree | commitdiff
2012-09-25 Andreas Sandbergsim: Move CPU-specific methods from SimObject to the... tree | commitdiff
2012-09-25 Andreas Sandbergsim: Remove SimObject::setMemoryMode tree | commitdiff
2012-09-19 Andreas HanssonAddrRange: Transition from Range<T> to AddrRange tree | commitdiff
2012-09-19 Andreas HanssonAddrRange: Simplify AddrRange params Python hierarchy tree | commitdiff
2012-09-13 Joel HestnessStandard Switch: Drain the system before switching... tree | commitdiff
2012-09-07 Andreas Sandbergsim: Remove the unused SimObject::regFormulas method tree | commitdiff
2012-09-07 Andreas HanssonParam: Transition to Cycles for relevant parameters tree | commitdiff
2012-08-28 Andreas HanssonClock: Add a Cycles wrapper class and use where applicable tree | commitdiff
2012-07-11 Brad Beckmannruby: changes how Topologies are created tree | commitdiff
2012-06-05 Ali Saidisim: Remove FastAlloc tree | commitdiff
2012-06-05 Mitchell Hayengastats: Provide a mechanism to get a callback when stats... tree | commitdiff
2012-05-23 Andreas HanssonConfig: Use the attribute naming and include ports... tree | commitdiff
2012-05-23 Andreas HanssonConfig: Exit with fatal if a port is already connected tree | commitdiff
2012-05-10 Uri WienerDOT: improved dot-based system visualization tree | commitdiff
2012-05-10 Uri WienerDOT: fixed broken code for visualizing configuration... tree | commitdiff
2012-05-10 Ali Saidistats: track if the stats have been enabled and prevent... tree | commitdiff
2012-04-14 Andreas HanssonRegression: Add ANSI colours to highlight test status tree | commitdiff
2012-04-06 Brad Beckmannpython: added __nonzero__ function to SimObject Bool... tree | commitdiff
2012-04-05 Andreas HanssonPython: Make the All proxy traverse SimObject children... tree | commitdiff
2012-03-30 William WangMEM: Introduce the master/slave port sub-classes in C++ tree | commitdiff
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