radeonsi: fix tess offchip offset for per-patch attributes

We need 4 more bits there. I don't know what is fixed by this.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: pass tessellation ring addresses via user SGPRs

This removes s_load_dword latency for tess rings.

We need just 1 SGPR for the address if we use 64K alignment. The final asm
for recreating the descriptor is:

    // s2 is (address >> 16)
    s_mov_b32 s3, 0
    s_lshl_b64 s[4:5], s[2:3], 16
    s_mov_b32 s6, -1
    s_mov_b32 s7, 0x27fac

v2: bitcast the descriptor type from v2i64 to v4i32

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use si_insert_input_ret in si_llvm_emit_tcs_epilogue

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove VS epilog code, compile VS with PrimID export on demand

The use of PrimID in the pixel shader is too rare to deserve such
a sizable support code.

The initial idea of the VS epilog was to move the clipping code there and
remove it based on states, but optimized variants are now used to do that
and are easier to support, so the VS epilog has turned out to be not so
useful.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3

VGPR1 = InstanceID / StepRate0; // StepRate0 can be set to 1

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: don't load PrimID in TES if it's not used

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: explain (non-)monolithic shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: enable OpenGL 4.5

Tentatively enable it, expecting the scratch buffer support to be done before
the next Mesa release.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: 2nd shader of merged shaders should hold a reference of the 1st

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add reference counting for shader selectors

The 2nd shader of merged shaders should take a reference of the 1st shader.
The next commit will do that.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: set VGT_VERTEX_REUSE for ES in ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: set TES registers for merged ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: disallow scratch buffer for LS-HS and ES-GS

not implemented yet

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: always compile monolithic ES-GS (asynchronously)

In addition to the non-monolithic variant.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add support for monolithic ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: make sure the 1st shader's main part exists for merged shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: select shader parts for non-monolithic ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add GS prolog support for merged ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add VS prolog support for merged ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: pass GS input SGPRs and VGPRs from the ES part to GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: store ES outputs to LDS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: load GS inputs from LDS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: get GS wave ID from the correct input

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add the function signature of merged ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: set registers and shader key for merged ES-GS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add GS user SGPRs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: rename declare_tess_lds -> declare_lds_as_pointer

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: simplify some shader type conditions

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: rename the swizzle parameter of lds_store

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: add si_shader::prolog2

For a GS prolog in merged ES-GS.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: move RW_BUFFERS to s[0:1] for merged shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add support for monolithic merged LS-HS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: set EXEC for non-mono merged shaders, add a barrier between them

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: don't store the HS control word

GFX9 doesn't have it.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: pass inputs from LS to TCS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add TCS epilog support for merged LS-HS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add VS prolog support for merged LS-HS

HS input VGPRs must be reserved.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: merged shaders have scratch offset at the beginning

also, screen wasn't initialized for compute shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: define LS-HS main shader function prototype

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: assign VS/TCS/TES/GS shader input parameter locations dynamically

They will vary with merged stages.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: define and set LS-HS user SGPRs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: set up shader registers for merged LS-HS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add initial code generation for non-monolithic merged LS-HS

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: separate out code for selecting the VS prolog

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: add si_shader::previous_stage for merged shaders

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: enlarge num_input_sgprs in shader keys due to higher hw limit

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi/gfx9: update the summary of shader stage configs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: adjust the signature of si_get_vs_prolog_key

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: separate out VS prolog key generation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: separate out VS prolog key printing

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: code shuffling in si_emit_derived_tess_state

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: separate out TGSI initialization of si_shader_context

so that we can put multiple different TGSI shaders into one module.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: use min_index and max_index directly from vbo

also remove the incorrect comment about primitive restart.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

vbo: set min_index = 0 so gallium can use the value directly

We could also remove index_bounds_valid and use max_index != ~0 instead.
Opinions on that are welcome.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

Revert "glsl: reject image qualifiers with non-image types inside uniform blocks"

This reverts commit 24011ead71ea9980e6b34e40d9dbd64e6560f5a4.

This causes lots of ES 3.1 CTS tests to fail to compile a bit of code
like:

   layout(binding = 0) buffer InOut
   {
        highp uint inputValues[384];
        highp uint outputValues[384];
        coherent highp uint groupValues[64];      <-----
   } sb_inout;

   error: memory qualifiers may only be applied to images

st/mesa: add more fallback gallium formats for GL integer formats

The VMware driver has a limited set of integer texture formats.  We
often have to fall back to 4-component formats when 1- or 2-component
formats are missing.

This fixes about 8 integer texture Piglit tests with the VMware driver
on Linux.  We've had this code in-house for a long time but I guess it
was never up-streamed to Mesa master.

This shouldn't regress any other drivers since we're either choosing
an earlier format in the list, or failing anyway.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: optimize color_buffer_writes_enabled()

Return as soon as we find an existing color channel that's enabled for
writing.  Typically, this allows us to return true on the first loop
iteration intead of doing four iterations.

No piglit regressions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: whitespace clean-ups in st_manager.c

Trivial.

Revert "glsl: set vector_elements to 1 for samplers"

This reverts commit 75a31a20af269c047661af33e28f793269537b79.

This breaks thousands of tests on i965 with malloc corruption.

anv: Drop 'x11' prefix from non-X11 WSI funcs

Drop it from x11_anv_wsi_image_create and x11_anv_wsi_image_free. The
functions are used by Wayland WSI too.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

anv: Alphabetize KHR extensions

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

ac: automake: sort sources list alphabetically

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

ac: include all sources in the tarball

Fixes: e2659176cef ("radeonsi/ac: move vertex export remove to common code.")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

st/mesa: remove redundant stfb->iface checks

stfb->iface is always non-NULL for an st_framebuffer. These checks
were incorrect, relying on out-of-bounds memory access in the
surface-less case of EGL_KHR_surfaceless_context.

v2: remove redundant stread check (Marek)

Reviewed-by: Marek Olšák <marek@olsak@amd.com> (v2)

st/mesa: don't cast the incomplete framebufer to st_framebuffer

The incomplete framebuffer is set for a surfaceless context. This leads to
the following error in piglit spec@egl_khr_surfaceless_context@viewport:

==26703==ERROR: AddressSanitizer: global-buffer-overflow on address 0x7f6886e43240 at pc 0x7f68854db0fd bp 0x7ffca404b3b0 sp 0x7ffca404b3a0
READ of size 8 at 0x7f6886e43240 thread T0
    #0 0x7f68854db0fc in st_viewport ../../../mesa-src/src/mesa/state_tracker/st_cb_viewport.c:57
    #1 0x556840176cdb in main tests/egl/spec/egl_khr_surfaceless_context/viewport.c:101
    #2 0x7f688edcf3f0 in __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x203f0)
    #3 0x556840176e19 in _start (/home/nha/amd/piglit/bin/egl-surfaceless-context-viewport+0xe19)

0x7f6886e43240 is located 32 bytes to the left of global variable 'DummyRenderbuffer' defined in '../../../mesa-src/src/mesa/main/fbobject.c:69:31' (0x7f6886e43260) of size 112
0x7f6886e43240 is located 8 bytes to the right of global variable 'IncompleteFramebuffer' defined in '../../../mesa-src/src/mesa/main/fbobject.c:73:30' (0x7f6886e42de0) of size 1112
SUMMARY: AddressSanitizer: global-buffer-overflow ../../../mesa-src/src/mesa/state_tracker/st_cb_viewport.c:57 in st_viewport

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek@olsak@amd.com>

st/glsl_to_tgsi: make undef_src and undef_dst const

st/glsl_to_tgsi: cleanup using visit_generic_intrinsic

It turns out that explicitly setting the writemask isn't actually
needed; emit_asm does the right thing based on looking at the types.

glsl: remove the shader_group_vote and shader_ballot expression ops

They are now no longer used.

glsl: implement arb_shader_ballot builtins using intrinsics

glsl: implement arb_shader_group_vote builtins via intrinsics

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/glsl_to_tgsi: implement shader_group_vote and shader_ballot intrinsics

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: add intrinsics for ARB_shader_group_vote and ARB_shader_ballot

These operations are currently implemented as IR expressions. However,
they cannot be transformed and moved in the way that other IR
expressions can because they have non-trivial interactions with
control-flow.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: reject image qualifiers with non-image types inside uniform blocks

Fixes the following ARB_shader_image_load_store tests:

format-layout-with-non-image-type.frag
memory-qualifier-with-non-image-type.frag

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: introduce validate_image_qualifier_for_type() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl: fix error when using format qualifiers with non-image types

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

util/disk_cache: remove percentage based max cache limit

The more I think about it the more this seems like a bad idea.
When we were deleting old cache dirs this wasn't so bad as it
was unlikely we would ever hit the actual limit before things
were cleaned up. Now that we only start cleaning up old cache
items once the limit is reached the a percentage based max
cache limit is more risky.

For the inital release of shader cache I think its better to
stick to a more conservative cache limit, at least until we
have some way of cleaning up the cache more aggressively.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

anv: Move queues, events, and semaphores to their own file

Things are about to get more complicated, especially as far as
semaphores are concerned.

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv: Implement VK_KHX_external_memory_fd

This commit just exposes the memory handle type.  There's interesting we
need to do here for images.  So long as the user doesn't set any crazy
environment variables such as INTEL_DEBUG=nohiz, all of the compression
formats etc. should "just work" at least for opaque handle types.

v2 (chadv):
  - Rebase.
  - Fix vkGetPhysicalDeviceImageFormatProperties2KHR when
    handleType == 0.
  - Move handleType-independency comments out of handleType-switch, in
    vkGetPhysicalDeviceExternalBufferPropertiesKHX.  Reduces diff in
    future dma_buf patches.

Co-authored-with: Chad Versace <chadversary@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>

anv: Use the BO cache for DeviceMemory allocations

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv/allocator: Add a BO cache

This cache allows us to easily ensure that we have a unique anv_bo for
each gem handle.  We'll need this in order to support multiple-import of
memory objects and semaphores.

v2 (Jason Ekstrand):
 - Reject BO imports if the size doesn't match the prime fd size as
   reported by lseek().

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv: Implement VK_KHX_external_memory

This is the trivial implementation that just exposes the extension
string but exposes zero external handle types.

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv: Implement VK_KHX_external_memory_capabilities

This is a complete but trivial implementation. It's trivial becasue We
support no external memory capabilities yet.  Most of the real work in
this commit is in reworking the UUIDs advertised by the driver.

v2 (chadv):
  - Fix chain traversal in vkGetPhysicalDeviceImageFormatProperties2KHR.
    Extract VkPhysicalDeviceExternalImageFormatInfoKHX from the chain of
    input structs, not the chain of output structs.
  - In vkGetPhysicalDeviceImageFormatProperties2KHR, iterate over the
    input chain and the output chain separately. Reduces diff in future
    dma_buf patches.

Co-authored-with: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv/physical_device: Rename uuid to pipeline_cache_uuid

We're about to have more UUIDs for different things so this one really
needs to be properly labeled.

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv: Refactor device_get_cache_uuid into physical_device_init_uuids

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv: Set EXEC_OBJECT_ASYNC when available

Reviewed-by: Chad Versace <chadversary@chromium.org>

anv/cmd_buffer: Use the device allocator for QueueSubmit

The command is really operating on a Queue not a command buffer and the
nearest object to that with an allocator is VkDevice.

Reviewed-by: Chad Versace <chadversary@chromium.org>
Cc: "17.0 17.1" <mesa-dev@lists.freedesktop.org>

mesa: remove wip framebuffer code

This was added in 34b3b40af97d back in 2006. Seems it wasn't
needed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

glsl: set vector_elements to 1 for samplers

I don't see any reasons why vector_elements is 1 for images and
0 for samplers. This increases consistency and allows to clean
up some code a bit.

This will also help for ARB_bindless_texture.

No piglit regressions with RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

clover: Fix build since clang r301442

v2: rename default_ik -> ik_opencl

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

disk_cache: use block size rather than file size

The majority of cache files are less than 1kb this resulted in us
greatly miscalculating the amount of disk space used by the cache.

Using the number of blocks allocated to the file is more
conservative and less likely to cause issues.

This change will result in cache sizes being miscalculated further
until old items added with the previous calculation have all been
removed. However I don't see anyway around that, the previous
patch should help limit that problem.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>

disk_cache: reduce default cache size to 5% of filesystem

Modern disks are extremely large and are only going to get bigger.
Usage has shown frequent Mesa upgrades can result in the cache
growing very fast i.e. wasting a lot of disk space unnecessarily.

5% seems like a more reasonable default.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>

radeon/ac: remove assert causing regression

This assert wasn't in the original radeonsi code but I added
it without totally understanding the original code, it caused
some regressions in variable-indexing tessellation shaders.

Fixes: e2659176 radeonsi/ac: move vertex export remove to common code.
Reported-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeon/ac: fix build on llvm 3.8.1

Add missing include to fix build.

Signed-off-by: Dave Airlie <airlied@redhat.com>

nvc0: Enable compute support for Pascal

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

nvc0: Add new launch descriptor format for GP100

v2:
Also handle the the new format in indirect dispatch
Use compute class check instead of chipset check

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

nvc0: Fix index of unk fields in nve4_cp_launch_desc

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

nouveau: Fix indentation of maxwell compute class definitions

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

anv: Don't place scratch buffers above the 32-bit boundary

This fixes rendering corruptions in DOOM.  Hopefully, it will also make
Jenkins a bit more stable as we've been seeing some random failures and
GPU hangs ever since turning on 48bit.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100620
Fixes: 651ec926fc1 "anv: Add support for 48-bit addresses"
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>

radv/ac: eliminate unused vertex shader outputs. (v2)

This is ported from radeonsi, and I can see at least one
Talos shader drops an export due to this, and saves some
VGPR usage.

v2: use shared code.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeonsi/ac: move vertex export remove to common code.

This code can be shared by radv, we bump the max to
VARYING_SLOT_MAX here, but that shouldn't have too
much fallout.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>