mesa.git
7 years agoi965: Round copy size to the nearest block in intel_miptree_copy
Jason Ekstrand [Sat, 13 May 2017 18:02:22 +0000 (11:02 -0700)]
i965: Round copy size to the nearest block in intel_miptree_copy

The width and height of the copy don't have to be aligned to the block
size if they specify the right or bottom edges of the image.  (See also
the comment and asserts right above).  We need to round them up when we
do the division in order to get it 100% right.

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
7 years agoi965: Use BLORP for color clears on gen4-5
Jason Ekstrand [Sat, 13 May 2017 00:14:18 +0000 (17:14 -0700)]
i965: Use BLORP for color clears on gen4-5

We don't support replicated data clears yet.  Those take a bit more work
and enabling replicated data clears in its own commit is probably better
for bisectibility anyway.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965: Use blorp for color blits on gen4-5
Jason Ekstrand [Fri, 12 May 2017 23:32:17 +0000 (16:32 -0700)]
i965: Use blorp for color blits on gen4-5

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Assert that no one tries to blit combined depth stencil
Jason Ekstrand [Sat, 13 May 2017 05:52:55 +0000 (22:52 -0700)]
intel/blorp: Assert that no one tries to blit combined depth stencil

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965: Add blorp support for gen4-5
Jason Ekstrand [Fri, 9 Sep 2016 23:30:24 +0000 (16:30 -0700)]
i965: Add blorp support for gen4-5

Due to complications with things such as URB setup on gen4-5, it's
easier to keep gen4 support in blorp completely internal to i965.  This
makes things a bit awkward because that means there's a file in i965
that includes blorp_priv.h but it's either that or have a file in blorp
that includes brw_context.h.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Set additional brw_wm_prog_key fields on gen4-5
Jason Ekstrand [Fri, 12 May 2017 19:03:47 +0000 (12:03 -0700)]
intel/blorp: Set additional brw_wm_prog_key fields on gen4-5

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965/gen4: Expose the guts of URB recalculation as a helper
Jason Ekstrand [Fri, 12 May 2017 05:23:36 +0000 (22:23 -0700)]
i965/gen4: Expose the guts of URB recalculation as a helper

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Add support for gen4-5 SF programs
Jason Ekstrand [Sat, 13 May 2017 03:24:46 +0000 (20:24 -0700)]
intel/blorp: Add support for gen4-5 SF programs

As part of enabling support for SF programs, we plumb the SF URB size
through to emit_urb_config.  For now, it's always zero but, on gen4, it
may be something larger.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Make convert_to_single_slice available outside blorp_blit
Jason Ekstrand [Tue, 16 May 2017 16:28:31 +0000 (09:28 -0700)]
intel/blorp: Make convert_to_single_slice available outside blorp_blit

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Use designated initializers to set up VERTEX_ELEMENTS
Jason Ekstrand [Fri, 12 May 2017 23:22:58 +0000 (16:22 -0700)]
intel/blorp: Use designated initializers to set up VERTEX_ELEMENTS

We also add a slot variable and use it as an iterator.  This will make
it much easier to conditionally put something between the header and the
vertex position.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Rename emit_viewport_state to emit_cc_viewport
Jason Ekstrand [Fri, 12 May 2017 04:56:05 +0000 (21:56 -0700)]
intel/blorp: Rename emit_viewport_state to emit_cc_viewport

The real point of this packet is that it sets up CC_VIEWPORT so that
name is a bit better.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Make the common genX_blorp_exec code gen4-safe
Jason Ekstrand [Sat, 18 Mar 2017 17:33:25 +0000 (10:33 -0700)]
intel/blorp: Make the common genX_blorp_exec code gen4-safe

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Re-arrange blorp_genX_exec.h
Jason Ekstrand [Fri, 12 May 2017 04:05:49 +0000 (21:05 -0700)]
intel/blorp: Re-arrange blorp_genX_exec.h

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Don't use ffma directly
Jason Ekstrand [Fri, 12 May 2017 18:55:51 +0000 (11:55 -0700)]
intel/blorp: Don't use ffma directly

It isn't supported prior to gen6 and, on gen6+, NIR will fuse the fmul
and fadd into an ffma automatically for us anyway.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Delete isl_to_gen_ds_surfype
Jason Ekstrand [Fri, 12 May 2017 04:01:18 +0000 (21:01 -0700)]
intel/blorp: Delete isl_to_gen_ds_surfype

It's no longer used.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Pull the pipeline bits of blorp_exec into a helper
Jason Ekstrand [Fri, 12 May 2017 02:12:46 +0000 (19:12 -0700)]
intel/blorp: Pull the pipeline bits of blorp_exec into a helper

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp/blit: Add support for normalized coordinates
Jason Ekstrand [Sat, 13 May 2017 05:16:05 +0000 (22:16 -0700)]
intel/blorp/blit: Add support for normalized coordinates

Gen5 and earlier can't do non-normalized coordinates so we need to
compensate in the shader.  Fortunately, it's pretty easy plumb through.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965: Move clip program compilation to the compiler
Jason Ekstrand [Sat, 18 Mar 2017 19:02:45 +0000 (12:02 -0700)]
i965: Move clip program compilation to the compiler

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965: Move SF compilation to the compiler
Jason Ekstrand [Sat, 18 Mar 2017 18:23:39 +0000 (11:23 -0700)]
i965: Move SF compilation to the compiler

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965/clip: Make brw_clip_prog_key::interp_mode an array
Jason Ekstrand [Mon, 20 Mar 2017 04:20:28 +0000 (21:20 -0700)]
i965/clip: Make brw_clip_prog_key::interp_mode an array

Having it be a pointer means that we end up caching clip programs based
on a pointer to wm_prog_data rather than the actual interpolation modes.
We've been caching one clip program per FS ever since 91d61fbf7cb61a44a
where Timothy rewrote brw_setup_vue_interpolation().

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965/sf: make brw_sf_prog_key::interp_mode an array
Jason Ekstrand [Mon, 20 Mar 2017 22:25:21 +0000 (15:25 -0700)]
i965/sf: make brw_sf_prog_key::interp_mode an array

Having it be a pointer means that we end up caching clip programs based
on a pointer to wm_prog_data rather than the actual interpolation modes.
We've been caching one clip program per FS ever since 91d61fbf7cb61a44a
where Timothy rewrote brw_setup_vue_interpolation().

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/compiler: Make brw_disasm take const assembly
Jason Ekstrand [Sat, 18 Mar 2017 18:23:34 +0000 (11:23 -0700)]
intel/compiler: Make brw_disasm take const assembly

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/decoder: Handle the BLT ring in gen_group_get_length
Jason Ekstrand [Tue, 16 May 2017 22:00:49 +0000 (15:00 -0700)]
intel/decoder: Handle the BLT ring in gen_group_get_length

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agointel/decoder: Handle gen4 VF_STATISTICS and PIPELINE_SELECT
Jason Ekstrand [Tue, 16 May 2017 03:40:40 +0000 (20:40 -0700)]
intel/decoder: Handle gen4 VF_STATISTICS and PIPELINE_SELECT

These need special handling because they have no "DWord Length"
parameter and they have an unusual bias of 1.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
7 years agointel/genxml: Rename 3DSTATE_AA_LINE_PARAMS on gen5
Jason Ekstrand [Tue, 16 May 2017 05:08:18 +0000 (22:08 -0700)]
intel/genxml: Rename 3DSTATE_AA_LINE_PARAMS on gen5

All of the other gens use "PARAMETERS".

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml: Use the right subtype for VF_STATISTICS on gen4
Jason Ekstrand [Tue, 16 May 2017 05:07:45 +0000 (22:07 -0700)]
intel/genxml: Use the right subtype for VF_STATISTICS on gen4

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml: Iron Lake doesn't support non-normalized sampler coordinates
Jason Ekstrand [Fri, 12 May 2017 03:49:30 +0000 (20:49 -0700)]
intel/genxml: Iron Lake doesn't support non-normalized sampler coordinates

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml: Add SAMPLER_STATE to gen 4.5
Jason Ekstrand [Fri, 12 May 2017 02:01:39 +0000 (19:01 -0700)]
intel/genxml: Add SAMPLER_STATE to gen 4.5

Somehow this got missed.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml: Rename the CC_VIEWPORT pointer on gen4-5
Jason Ekstrand [Fri, 12 May 2017 02:00:45 +0000 (19:00 -0700)]
intel/genxml: Rename the CC_VIEWPORT pointer on gen4-5

It isn't a pointer to "color calc state", that's the packet it's in.
It's a pointer to the CC viewport state.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml: Sampler state is a pointer on gen4-5
Jason Ekstrand [Fri, 12 May 2017 01:59:11 +0000 (18:59 -0700)]
intel/genxml: Sampler state is a pointer on gen4-5

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml: Suffix KSP0 fields on Iron Lake
Jason Ekstrand [Fri, 12 May 2017 20:33:10 +0000 (13:33 -0700)]
intel/genxml: Suffix KSP0 fields on Iron Lake

Iron Lake introduced the multiple KSP thing and so you have KSP0-3.
However, the genxml didn't have an index on the first "Kernel Start
Pointer" or "GRF Register Count".  Add one to match gen6+.  While we're
here, we drop the brackets from the other "GRF Register Count" fields.

Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agointel/genxml: Make a bunch of things offsets on gen4-5
Jason Ekstrand [Fri, 12 May 2017 01:58:05 +0000 (18:58 -0700)]
intel/genxml: Make a bunch of things offsets on gen4-5

Most things on gen4-5 are addresses because we don't have dynamic state
base address and we don't have instruction state base on gen4.  However,
whoever converted things to addresses got a little over-excited and
converted too much.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/isl: Add gen4_filter_tiling
Jason Ekstrand [Sat, 13 May 2017 20:01:06 +0000 (13:01 -0700)]
intel/isl: Add gen4_filter_tiling

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/isl: Add support for setting component write disables
Jason Ekstrand [Sat, 13 May 2017 06:12:12 +0000 (23:12 -0700)]
intel/isl: Add support for setting component write disables

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/isl: Add support for gen4 cube maps to get_image_offset_sa
Jason Ekstrand [Tue, 16 May 2017 16:27:16 +0000 (09:27 -0700)]
intel/isl: Add support for gen4 cube maps to get_image_offset_sa

Gen4 cube maps are a 2-D surface with ISL_DIM_LAYOUT_GEN4_3D which is a
bit weird but accurate none the less.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/isl: Don't request space for stencil/hiz packets unless needed
Jason Ekstrand [Fri, 12 May 2017 20:31:05 +0000 (13:31 -0700)]
intel/isl: Don't request space for stencil/hiz packets unless needed

On Iron Lake, the packets exist but we never emit them so there's no
need for us to ask the driver to make batch space for them.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965/blorp: Properly handle mt->first_level
Jason Ekstrand [Tue, 16 May 2017 21:58:00 +0000 (14:58 -0700)]
i965/blorp: Properly handle mt->first_level

The guts of blorp and ISL don't understand i965's partial miptrees.
Instead, we need to subtract off first_level before we hand anything off
to blorp.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965/miptree: Take first_level into account when converting to ISL
Jason Ekstrand [Tue, 16 May 2017 21:59:41 +0000 (14:59 -0700)]
i965/miptree: Take first_level into account when converting to ISL

ISL doesn't have a concept of a partial miptree.  Instead, we need to
subtract off first_level.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Move the gen7 stencil format workaround to blorp_blit
Jason Ekstrand [Sun, 14 May 2017 00:00:39 +0000 (17:00 -0700)]
intel/blorp: Move the gen7 stencil format workaround to blorp_blit

It's not needed for blorp_copy because it already overrides formats.
It's also not needed for blorp_clear because it clears stencil as
stencil.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965: Use blorp_copy for doing r8 stencil updates on HSW
Jason Ekstrand [Mon, 15 May 2017 20:27:16 +0000 (13:27 -0700)]
i965: Use blorp_copy for doing r8 stencil updates on HSW

The blorp_copy entrypoint is designed for doing memcpy like operations
which is what we need to do here while blorp_blit is for handling format
conversion and scaling.  Using blorp_copy is much simpler and prevents
us from getting formats wrong.  While we're here, we get rid of the
layers_per_blit thing since stencil always uses interleaved MSAA.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoi965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops
Jason Ekstrand [Sat, 13 May 2017 17:30:19 +0000 (10:30 -0700)]
i965/blorp: Do and end-of-pipe sync on both sides of fast-clear ops

We've discovered in the Vulkan driver that simply doing the end-of-pipe
sync afterwards is insufficient.  The specific requirement stated in the
PRM is that you have to do one every time you transition between the
tree modes of "clear", "render", and "resolve".  This is GL, so we could
track it but any attempt to do so would most likely get it wrong.  For
now, it's easier to just assume that every fast-clear op is an island
and do the sync both before and after.

This also removes the unneeded flush and stall after slow-clear
operations.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: "17.0 17.1" <mesa-stable@lists.freedesktop.org>
7 years agoamd/common: add missing libdrm include path
Eric Engestrom [Fri, 26 May 2017 10:59:20 +0000 (11:59 +0100)]
amd/common: add missing libdrm include path

Fixes: de9dd4f9f1bb5984c554 ("ac/radeonsi: move struct radeon_info to ac_gpu_info.h")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
7 years agodocs: small release calendar fixes
Andres Gomez [Thu, 25 May 2017 09:26:18 +0000 (11:26 +0200)]
docs: small release calendar fixes

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
7 years agoRevert "amd/common: add vcn dec ip info query"
Dave Airlie [Fri, 26 May 2017 06:34:31 +0000 (16:34 +1000)]
Revert "amd/common: add vcn dec ip info query"

This reverts commit 524d4fff9e0e58e812e71bc5ba2c92ffa73bee16.

This commit breaks amdgpu on kernels with no DEC IP support.

Caught by the airlied CI system.

7 years agoRevert "amd/common: set vcn dec as hw decode as well"
Dave Airlie [Fri, 26 May 2017 06:34:51 +0000 (16:34 +1000)]
Revert "amd/common: set vcn dec as hw decode as well"

This reverts commit 50d322be2f30bb935ee52b3b3649785975771110.

A previous patch breaks amdgpu on non-vcn decode systems,
but have to revert this first.

7 years agoutil: remove unneeded Android ifdef from ralloc.c
Rob Herring [Tue, 23 May 2017 19:00:02 +0000 (14:00 -0500)]
util: remove unneeded Android ifdef from ralloc.c

SIZE_MAX has been defined in stdint.h on Android since 2013, so this ifdef
is no longer needed.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
7 years agonouveau: drop Android 4.4 and earlier support
Rob Herring [Tue, 23 May 2017 18:58:24 +0000 (13:58 -0500)]
nouveau: drop Android 4.4 and earlier support

Support for Android 4.4 and earlier has already been removed from mesa.
Remove this remaining piece from nouveau, too.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
7 years agoi965: use mmap64 for Android
Rob Herring [Tue, 23 May 2017 19:43:30 +0000 (14:43 -0500)]
i965: use mmap64 for Android

Simplify the handling of mmap for Android by using mmap64 instead. mmap64
may have not existed for Android when this was written, but it's been
around since 2013.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
7 years agogallium/os: use mmap64 for Android
Rob Herring [Tue, 23 May 2017 18:54:19 +0000 (13:54 -0500)]
gallium/os: use mmap64 for Android

Simplify the handling of mmap for Android by using mmap64 instead. mmap64
may have not existed for Android when this was written, but it's been
around since 2013.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
7 years agoAndroid: generate an error if building on Android 4.4 or earlier
Rob Herring [Tue, 23 May 2017 19:41:22 +0000 (14:41 -0500)]
Android: generate an error if building on Android 4.4 or earlier

Since commit 7a5b5f52260 ("Android: drop Android 4.4 (KitKat) support"),
Android 4.4 or earlier is no longer supported, so exit with an error if we
try building on it.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
7 years agost/wgl: whitespace, formatting fixes in stw_device.c
Brian Paul [Sat, 29 Apr 2017 03:57:56 +0000 (21:57 -0600)]
st/wgl: whitespace, formatting fixes in stw_device.c

Trivial.

7 years agoglsl: Fix g++ initializer order warning
Brian Paul [Mon, 22 May 2017 12:52:45 +0000 (06:52 -0600)]
glsl: Fix g++ initializer order warning

Fixes this warning:
In file included from ../../../src/compiler/glsl/ir.cpp:25:0:
../../../src/compiler/glsl/ir.h: In constructor 'ir_swizzle::ir_swizzle(ir_rvalue*, ir_swizzle_mask)':
../../../src/compiler/glsl/ir.h:1955:20: warning: 'ir_swizzle::mask' will be initialized after [-Wreorder]
    ir_swizzle_mask mask;
                    ^
../../../src/compiler/glsl/ir.h:1954:15: warning:   'ir_rvalue* ir_swizzle::val' [-Wreorder]
    ir_rvalue *val;
               ^
../../../src/compiler/glsl/ir.cpp:1592:1: warning:   when initialized here [-Wreorder]
 ir_swizzle::ir_swizzle(ir_rvalue *val, ir_swizzle_mask mask)
 ^

Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agoradeonsi: enable vcn decode
Leo Liu [Mon, 17 Apr 2017 16:37:44 +0000 (12:37 -0400)]
radeonsi: enable vcn decode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agowinsys/amdgpu: add vcn dec cs support
Leo Liu [Mon, 17 Apr 2017 16:24:30 +0000 (12:24 -0400)]
winsys/amdgpu: add vcn dec cs support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoamd/common: set vcn dec as hw decode as well
Leo Liu [Fri, 5 May 2017 14:54:01 +0000 (10:54 -0400)]
amd/common: set vcn dec as hw decode as well

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoamd/common: add vcn dec ip info query
Leo Liu [Wed, 3 May 2017 18:06:35 +0000 (14:06 -0400)]
amd/common: add vcn dec ip info query

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon: rename has_uvd info to has_hw_decode
Leo Liu [Mon, 17 Apr 2017 16:14:00 +0000 (12:14 -0400)]
radeon: rename has_uvd info to has_hw_decode

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message for mpeg4 codec
Leo Liu [Wed, 3 May 2017 13:54:28 +0000 (09:54 -0400)]
radeon/vcn: add decode message for mpeg4 codec

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message for mpeg2 codec
Leo Liu [Wed, 3 May 2017 13:52:03 +0000 (09:52 -0400)]
radeon/vcn: add decode message for mpeg2 codec

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message for vc1 codec
Leo Liu [Wed, 3 May 2017 13:48:55 +0000 (09:48 -0400)]
radeon/vcn: add decode message for vc1 codec

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message for hevc codec
Leo Liu [Wed, 3 May 2017 13:40:44 +0000 (09:40 -0400)]
radeon/vcn: add decode message for hevc codec

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message decode for avc codec
Leo Liu [Tue, 2 May 2017 20:39:51 +0000 (16:39 -0400)]
radeon/vcn: add decode message decode for avc codec

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message feedback
Leo Liu [Tue, 2 May 2017 20:26:23 +0000 (16:26 -0400)]
radeon/vcn: add decode message feedback

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message destroy
Leo Liu [Tue, 2 May 2017 20:22:26 +0000 (16:22 -0400)]
radeon/vcn: add decode message destroy

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add decode message create
Leo Liu [Tue, 2 May 2017 20:20:46 +0000 (16:20 -0400)]
radeon/vcn: add decode message create

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add common decode part
Leo Liu [Tue, 2 May 2017 20:15:15 +0000 (16:15 -0400)]
radeon/vcn: add common decode part

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/winsys: add vcn dec ring type
Leo Liu [Mon, 17 Apr 2017 15:49:50 +0000 (11:49 -0400)]
radeon/winsys: add vcn dec ring type

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/winsys: add uvd enc ring type
Leo Liu [Mon, 17 Apr 2017 15:49:10 +0000 (11:49 -0400)]
radeon/winsys: add uvd enc ring type

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoradeon/vcn: add vcn decode interface
Leo Liu [Tue, 2 May 2017 19:48:21 +0000 (15:48 -0400)]
radeon/vcn: add vcn decode interface

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoconfigure.ac: update libdrm amdgpu version requirement to 2.4.81
Leo Liu [Wed, 24 May 2017 15:57:28 +0000 (11:57 -0400)]
configure.ac: update libdrm amdgpu version requirement to 2.4.81

VCN decode has a new interface, and that depends on the latest libdrm

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodocs: update calendar, add news item and link release notes for 17.1.1
Emil Velikov [Thu, 25 May 2017 07:52:14 +0000 (08:52 +0100)]
docs: update calendar, add news item and link release notes for 17.1.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
7 years agodocs: add sha256 checksums for 17.1.1
Emil Velikov [Thu, 25 May 2017 07:18:59 +0000 (08:18 +0100)]
docs: add sha256 checksums for 17.1.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 092c485b8ed127a15f52434857c37e8021775775)

7 years agodocs: add release notes for 17.1.1
Emil Velikov [Thu, 25 May 2017 07:11:42 +0000 (08:11 +0100)]
docs: add release notes for 17.1.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit ca0a148a4d09d850f63c82011ac49a311e43e502)

7 years agomesa: remove unrequired double calc
Timothy Arceri [Tue, 23 May 2017 12:01:53 +0000 (22:01 +1000)]
mesa: remove unrequired double calc

type_size() will already handle this correctly for us.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: remove redundant modulus operation
Timothy Arceri [Tue, 23 May 2017 12:01:52 +0000 (22:01 +1000)]
mesa: remove redundant modulus operation

The if check above means we can only get here if size is less than 4.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agosvga: init svga_screen::swc_mutex with mtx_recursive
Brian Paul [Tue, 23 May 2017 19:16:56 +0000 (13:16 -0600)]
svga: init svga_screen::swc_mutex with mtx_recursive

If the SVGA3D_BindGBSurface() call in svga_buffer_hw_storage_unmap()
fails, we'll flush and that might involve unmapping other buffers.
That leads to a recursive lock on svga_screen::swc_mutex and causes
a deadlock.  Fix this by initializing the mutex with mtx_recursive.

Note that this only happened on Linux, not Windows.  On Windows, the
mutex functions are implemented with Win32 critical sections which
support recursive locking.

Also add a comment about this.

Fixes VMware bug 1831549 (Unigine Tropics demo freeze on Linux).

Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Neha Bhende<bhenden@vmware.com>
7 years agosvga: move logging initialization code into new function
Brian Paul [Tue, 23 May 2017 14:21:57 +0000 (08:21 -0600)]
svga: move logging initialization code into new function

Plus a few other minor clean-ups.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
7 years agosvga: init local vars to silence uninitialized use warnings
Brian Paul [Tue, 23 May 2017 14:16:38 +0000 (08:16 -0600)]
svga: init local vars to silence uninitialized use warnings

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
7 years agosvga: log the process command line to the vmware.log file
Brian Paul [Tue, 23 May 2017 13:45:12 +0000 (07:45 -0600)]
svga: log the process command line to the vmware.log file

This is useful for Piglit when thousands of tests are run and we want
to determine which test triggered a device error.

v2: only log command line info if the new SVGA_EXTRA_LOGGING env var is set

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
7 years agosvga: Limit svga message capability to newer compilers
Sinclair Yeh [Thu, 4 Aug 2016 19:57:06 +0000 (12:57 -0700)]
svga: Limit svga message capability to newer compilers

The assembly code used by the SVGA message feature doesn't
build properly with older compilers, so limit it to only
gcc 5.3.0 and newer.

Also modified the stubs to avoid "unused variable" warnings.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agosvga: Fix MSVC build.
Brian Paul [Thu, 19 May 2016 10:11:51 +0000 (11:11 +0100)]
svga: Fix MSVC build.

This let us compile the code with MSVC, but it no-ops the log function.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
7 years agosvga: Add the ability to log messages to vmware.log on the host.
Sinclair Yeh [Tue, 23 May 2017 13:42:08 +0000 (07:42 -0600)]
svga: Add the ability to log messages to vmware.log on the host.

For now this capability only exists in the SVGA driver but
can be exported later if other modules, e.g. winsys, wants
to use it for logging.

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agoRevert "gallium: remove unused PIPE_CC_GCC_VERSION"
Brian Paul [Mon, 22 May 2017 16:30:16 +0000 (10:30 -0600)]
Revert "gallium: remove unused PIPE_CC_GCC_VERSION"

This reverts commit e60928f4c4bd4484821d83f2b16a910ea9f5f9d9.

PIPE_CC_GCC_VERSION is used by some of our in-house code which hasn't
been upstreamed yet.

7 years agoaubinator: report error on unknown device id
Lionel Landwerlin [Wed, 24 May 2017 01:04:34 +0000 (02:04 +0100)]
aubinator: report error on unknown device id

Since we're going to stop aubinator without a valid device id, better
report an error. This also silences a Coverity warning.

CID: 1405004
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
7 years agoaubinator: be consistent on exit code
Lionel Landwerlin [Wed, 24 May 2017 01:02:30 +0000 (02:02 +0100)]
aubinator: be consistent on exit code

We're using both exit(1) & exit(EXIT_FAILURE), settle for one, same
for success.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
7 years agoaubinator: fix double free
Lionel Landwerlin [Wed, 24 May 2017 00:48:36 +0000 (01:48 +0100)]
aubinator: fix double free
1;4601;0c
Free previously allocated filename outside the for loop.

CID: 1405014
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
7 years agowinsys/amdgpu: align VA allocations to fragment size v2
Christian König [Tue, 23 May 2017 16:40:18 +0000 (18:40 +0200)]
winsys/amdgpu: align VA allocations to fragment size v2

BOs larger than the minimum fragment size should have their VA
alignet to at least the fragment size for optimal performance.

v2: drop unused leftover from initial implementation

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agotgsi: remove unused tgsi_is_passthrough_shader()
Samuel Pitoiset [Tue, 23 May 2017 13:31:35 +0000 (15:31 +0200)]
tgsi: remove unused tgsi_is_passthrough_shader()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
7 years agoconfigure.ac: rephrase 'GLX w/o X11' error message
Eric Engestrom [Wed, 24 May 2017 07:30:59 +0000 (08:30 +0100)]
configure.ac: rephrase 'GLX w/o X11' error message

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
7 years agoanv: Require vertex buffers to come from a 32-bit heap
Jason Ekstrand [Wed, 17 May 2017 18:54:24 +0000 (11:54 -0700)]
anv: Require vertex buffers to come from a 32-bit heap

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Advertise both 32-bit and 48-bit heaps when we have enough memory
Jason Ekstrand [Wed, 17 May 2017 18:54:12 +0000 (11:54 -0700)]
anv: Advertise both 32-bit and 48-bit heaps when we have enough memory

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Refactor memory type setup
Jason Ekstrand [Wed, 17 May 2017 18:42:36 +0000 (11:42 -0700)]
anv: Refactor memory type setup

This makes us walk over the heaps one at a time and add the types for
LLC and !LLC to each heap.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Make supports_48bit_addresses a heap property
Jason Ekstrand [Wed, 17 May 2017 18:38:16 +0000 (11:38 -0700)]
anv: Make supports_48bit_addresses a heap property

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Stop setting BO flags in bo_init_new
Jason Ekstrand [Wed, 17 May 2017 18:31:02 +0000 (11:31 -0700)]
anv: Stop setting BO flags in bo_init_new

The idea behind doing this was to make it easier to set various flags.
However, we have enough custom flag settings floating around the driver
that this is more of a nuisance than a help.  This commit has the
following functional changes:

 1) The workaround_bo created in anv_CreateDevice loses both flags.
    This shouldn't matter because it's very small and entirely internal
    to the driver.

 2) The bo created in anv_CreateDmaBufImageINTEL loses the
    EXEC_OBJECT_ASYNC flag.  In retrospect, it never should have gotten
    EXEC_OBJECT_ASYNC in the first place.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Set image memory types based on the type count
Jason Ekstrand [Wed, 17 May 2017 18:16:57 +0000 (11:16 -0700)]
anv: Set image memory types based on the type count

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Add valid_bufer_usage to the memory type metadata
Jason Ekstrand [Wed, 17 May 2017 18:14:06 +0000 (11:14 -0700)]
anv: Add valid_bufer_usage to the memory type metadata

Instead of returning valid types as just a number, we now walk the list
and check the buffer's usage against the usage flags we store in the new
anv_memory_type structure.  Currently, valid_buffer_usage == ~0.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Determine the type of mapping based on type metadata
Jason Ekstrand [Wed, 17 May 2017 18:13:01 +0000 (11:13 -0700)]
anv: Determine the type of mapping based on type metadata

Before, we were just comparing the type index to 0.  Now we actually
look the type up in the table and check its properties to determine what
kind of mapping we want to do.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Set up memory types and heaps during physical device init
Jason Ekstrand [Wed, 17 May 2017 17:55:41 +0000 (10:55 -0700)]
anv: Set up memory types and heaps during physical device init

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv: Predicate 48bit support on gen >= 8
Jason Ekstrand [Thu, 18 May 2017 17:57:42 +0000 (10:57 -0700)]
anv: Predicate 48bit support on gen >= 8

This doesn't matter right now since it only affects whether or not we
set the kernel bit but, if we ever do anything else based on it, we'll
want it to be correct per-gen.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
7 years agoanv/image: Get rid of the memset(aux, 0, sizeof(aux)) hack
Jason Ekstrand [Thu, 18 May 2017 18:31:48 +0000 (11:31 -0700)]
anv/image: Get rid of the memset(aux, 0, sizeof(aux)) hack

Up until now, we've been memsetting the auxiliary surface to 0 at
BindImageMemory time to ensure that it is properly initialized.
However, this isn't correct because apps are allowed to freely alias
memory between different images and buffers so long as they properly
track whether or not a particular image is valid and, if it isn't,
transition from UNINITIALIZED to something else before using it.  We
now implement those transitions so we can drop the hack.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>