radv: add radv_image_has_{cmask,fmask,dcc,htile}() helpers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_get_cmask_fast_clear_value() helper

DCC for MSAA textures are currently unsupported but that will
be used later on.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: add radv_clear_{cmask,dcc} helpers

They will help for DCC MSAA textures and if we support mipmaps
in the future.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

st/nine: Do not use scratch for face register

Scratch registers are reused every instructions.
Since vFace is reused, a new temporary register
should be used.

Fixes: https://github.com/iXit/Mesa-3D/issues/311
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>

etnaviv: expose perfmon query groups

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: add query_group_info for perfmon counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: assign group_ids to perfmon queries

Prep work for AMD_performance_monitor support.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support MC performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support TX performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support RA performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support SE performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support PA performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support SH performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support PE performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: support HI performance counters

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: add perfmon query implementation

Add needed infrastructure to use performance monitor
requests for queries.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Chris Healy <cphealy@gmail.com>

etnaviv: sw queries: return correct number of groups

Fixes: 3d912bd742ed ("etnaviv: add query_group_info for sw counters")
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: advertise YUV formats as external only

We only support importing YUV as OES external resources.
This will change in the future, but for now this fixes the
advertised capabilities in eglQueryDmaBufModifiersEXT.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

gallium/util: implement util_format_is_yuv

This adds a helper to check if a pipe format is in YUV color space.
Drivers want to know about this, as YUV mostly needs special handling.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

nvc0: finish implementation of PIPE_QUERY_SO_OVERFLOW_PREDICATE

This also removes some useless code leftover from old changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: change ACQUIRE_EQUAL to ACQUIRE_GEQUAL in nvc0_hw_query_fifo_wait

If a fence is created in between nvc0_hw_end_query and
nvc0_hw_query_fifo_wait, the sequence number in nvc0->screen->fence.bo can
be larger than hq->fence->sequence before the semaphore is created,
resulting in the semaphore never being triggered.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: ensure the query's fence has been emitted in nvc0_hw_query_fifo_wait

If the fence has not been emitted, hq->fence->sequence would be zero. This
would result in the semaphore never being triggered, blocking all later
commands in the pushbuf.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
[imirkin: use nouveau_fence_emit instead]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

st/mesa: tex offsets can't be in a const or 2d-indexed

All consts are now implicitly 2d (they set .Dimension), so trigger
asserts. Also, the texture offset can't handle any sort of 2d indexing.
While this could be tacked on, this seems unnecessary, just move it off
into a separate temp.

Fixes assertion failure in
tests/spec/arb_gpu_shader5/compiler/builtin-functions/fs-gatherOffset-uniform-offset.frag

Note that this was an issue even before the const-always-2d thing, since
there was no detection of when even a proper second dimension was used,
e.g. for UBO or geom/tess inputs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

nvc0: restore image binding on RGB10A2, remove from BGR10A2

Fixes a bunch of new CTS pbo tests that use those as an output format,
which the state tracker converts into buffer image writes.

No part of the driver is ready for BGR10A2. It could probably be enabled
on Maxwell+, but seems unnecessary. This error was introduced when
flipping the displayable bit on those formats, which accidentally also
moved the image bit.

Fixes: e1a70aed10d (nv50,nvc0: mark ABGR format as displayable instead of ARGB format)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/ir3: use lower_global_vars_to_local in cmdline compiler

tgsi_to_nir emits things with arrays as global vars.. and nir->ir3 does
lower_locals_to_regs.  But nothing was lowering global to local, which
breaks compiling tgsi shaders

Signed-off-by: Rob Clark <robdclark@gmail.com>

i965: Use %x instead of %u in debug print.

I mistakenly printed out the address as 0x<decimal number> instead of
printing a proper hex number.  This was...surprising.

meson: fix warnings about comparing unlike types

In the old days (0.42.x), when mesa's meson system was written the
recommendation for handling conditional dependencies was to define them
as empty lists. When meson would evaluate the dependencies of a target
it would recursively flatten all of the arguments, and empty lists would
be removed. There are some problems with this, among them that lists and
dependencies have different methods (namely .found()), so the
recommendation changed to use `dependency('', required : false)` for
such cases.  This has the advantage of providing a .found() method, so
there is no need to do things like `dep_foo != [] and dep_foo.found()`,
such a dependency should never exist.

I've tested this with 0.42 (the minimum we claim to support) and 0.45.
On 0.45 this removes warnings about comparing unlike types, such as:

meson.build:1337: WARNING: Trying to compare values of different types
(DependencyHolder, list) using !=.

v2: - Use dependency('', required : false) instead of
      declare_dependency(), the later will always report that it is
      found, which is not what we want.

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>

intel/compiler: Explicitly cast register type in switch

brw_reg::type is "enum brw_reg_type type:4".  For whatever reason, GCC
is treating this as an int instead of an enum.  As a result, it doesn't
detect missing switch cases and it doesn't detect that flow can get out
of the switch.

This silences the warning:

src/intel/compiler/brw_reg.h: In function ‘bool brw_regs_negative_equal(const brw_reg*, const brw_reg*)’:
src/intel/compiler/brw_reg.h:305:1: warning: control reaches end of non-void function [-Wreturn-type]
 }
 ^

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/nine: Declare lighting consts for ff shaders

The lighting constants were not declared previously,
but were accessed with indirect addressing, which is
illegal.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105442
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
CC: "17.3 18.0" <mesa-stable@lists.freedesktop.org>

nir: rename variables in nir_lower_io_to_temporaries for clarity

In the emit_copies() function, the use of "newv" and "temp" names made
sense when only copies from temporaries to the new variables were
being done. But now there are other calls to copy with other pairings,
and "temp" doesn't always refer to a temporary created in this
pass. Use the names "dest" and "src" instead.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

radv: don't pass the pipeline to radv_flush_constants()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: rename radv_cmd_buffer_update_vertex_descriptors()

... to radv_flush_vertex_descriptors().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: do not try to skip draw calls when VBOs upload failed

This is unnecessary because we record an error which should
be returned by vkEndCommandBuffer(), and the app shouldn't
submit a command buffer when this happens.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: fix prefetching compute shaders on CIK and older chips

Because the check was moved to radv_emit_prefetch_L2().

Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2()")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: only enable PERFECT_ZPASS_COUNTS for precision occlusion queries

This unnecessary when the precision bit flag is not set, and this
might hurt performance. The Vulkan explains that not setting
VK_QUERY_CONTROL_PRECISE_BIT might be more efficient on some
implementations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: enable the Polaris small primitive filter control

Enable it directly in the preamble, but do not enable line
on Polaris10/11/12 because there is a hw bug.

There is possibly an issue when MSAA is off, but this doesn't
regress any CTS and AMDVLK doesn't have a workaround as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

anv: Add WSI support for the I915_FORMAT_MOD_Y_TILED_CCS

v2 (Jason Ekstrand):
 - Return the correct enum values from anv_layout_to_fast_clear_type

v3 (Jason Ekstrand):
 - Always return ANV_FAST_CLEAR_NONE and leave doing the right thing for
   the patch which adds a modifier which supports fast-clears.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Tested-by: Daniel Stone <daniels@collabora.com>
Acked-by: Nanley Chery <nanley.g.chery@intel.com>

Add more Coffee Lake brand strings

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

radeonsi: Reorder checks in si_check_render_feedback

si_get_total_colormask accesses NULL pointer on compute shaders
Fixes crashes on clover
Fixes: 0669dca9c00261849cee14d69fdea0a5e323c7f7 ("radeonsi: skip DCC render feedback checking if color writes are disabled")
CC: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

intel/tools: new intel_sanitize_gpu tool

Adds a new debug tool to pad each GEM BO allocated with (weak)
pseudo-random noise values which are then checked after each
batchbuffer dispatch to the kernel. This can be quite valuable to
find diffucult to track down heisenberg style bugs.

[scott.d.phillips@intel.com: split to separate tool]

v2: (by Scott D Phillips)
    - track gem handles per fd (Kevin)
    - remove handles on GEM_CLOSE (Kevin)
    - ignore prime handles
    - meson & shell script

v3: (by Scott D Phillips)
    - don't track prime bos at all (Kevin)
    - protect the hash table with a mutex (Kevin)
    - hook fds by drm_version.name, not path (Chris Wilson)

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
Reviewed-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

prog/nir: Simplify some load/store operations

Reviewed-by: Eric Anholt <eric@anholt.net>

radeonsi: fix a crash if ps_shader.cso is NULL in si_get_total_colormask

radeonsi: remove more R600 references

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: try to fix android

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: try to fix meson

This is not fully tested. Meson can't link LLVM even though automake can.

PATH=/usr/llvm/x86_64-linux-gnu/bin:$PATH meson build/ -Dgallium-va=false \
    -Dplatforms=x11,drm -Dgallium-drivers=radeonsi -Ddri-drivers= \
    -Dgallium-omx=disabled -Dgallium-xvmc=false -Dgles1=false \
    -Dtexture-float=true -Dvulkan-drivers=

src/gallium/auxiliary/libgallium.a(gallivm_lp_bld_misc.cpp.o):
(.data.rel.ro._ZTI26DelegatingJITMemoryManager[_ZTI26DelegatingJITMemoryManager]+0x10):
undefined reference to `typeinfo for llvm::RTDyldMemoryManager'

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: don't build libradeon.la separately

for better parallelism

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: clean up GET_MAX_VIEWPORT_RANGE definition

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_common_context

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::screen

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move r600_buffer_common.c and r600_texture.c into radeonsi

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move r600_gpu_load.c to si_gpu_load.c

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move r600_query.c/h files to si_query.c/h

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move r600_cs.h contents into si_pipe.h, si_build_pm4.h

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: rename query definitions R600_ -> SI_

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move and rename R600_ERR out of r600_pipe_common.h

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: rename a few R600/r600_ -> SI_/si_

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move definitions out of r600_pipe_common.h

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move functions out of and remove r600_pipe_common.c

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: rename r600 -> si in some places

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use si_context instead of pipe_context in parameters pt3

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use si_context instead of pipe_context in parameters pt2

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use si_context instead of pipe_context in parameters pt1

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: pass sctx to si_rebind_buffer and clean up

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use r600_common_context less pt7

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use r600_common_context less pt6

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: update copyrights

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: switch radeon_add_to_buffer_list parameter to si_context

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use r600_common_context less pt5

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use r600_common_context less pt4

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use r600_common_context less pt3

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use r600_common_context less pt2

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use r600_common_context less pt1

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: don't use r600_common_context in si_emit_cache_flush

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: switch r600_atom::emit parameter to si_context

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: flatten / remove struct r600_ring

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_ring::flush callback

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: make radeon_add_to_buffer_list_check_mem be gfx-only

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: add_to_buffer_list functions can return void

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move saved_cs functions from r600_pipe_common.c to si_debug.c

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move DMA CS functions from r600_pipe_common.c to si_dma_cs.c

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move EOP event code from r600_pipe_common.c to si_fence.c

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: rename si_hw_context.c -> si_gfx_cs.c

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: move si_destroy_saved_cs to si_debug.c

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: rename si_begin_new_cs -> si_begin_new_gfx_cs

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: rename si_need_cs_space -> si_need_gfx_cs_space

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::blit_decompress_depth

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::decompress_dcc

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::invalidate_buffer

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::rebind_buffer

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_common_context::set_occlusion_query_state

and remove unused old_enable parameter.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::save_qbo_state

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove unused query code

The get_size perf counter callback is also inlined and removed.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: use num_cs_dw_queries_suspend

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::need_gfx_cs_space

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::set_atom_dirty

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: remove r600_pipe_common::check_vm_faults

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: call CS flush functions directly whenever possible

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>

radeonsi: skip DCC render feedback checking if color writes are disabled

meson: fix megadriver symlinking

Which should be relative instead of absolute.

Fixes: f7f1b30f81e842db6057591470ce3cb6d4fb2795
       ("meson: extend install_megadrivers script to handle symmlinking")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105567
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-and-Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

meson: Set .so version for xa like autotools does

Fixes: 0ba909f0f111824223bc38563d1a6bc73e69c2cc
       ("meson: build gallium xa state tracker")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>