soc.git
5 years agoadd first conversion of ariane miss handler, WIP
Luke Kenneth Casson Leighton [Thu, 6 Jun 2019 19:25:16 +0000 (20:25 +0100)]
add first conversion of ariane miss handler, WIP

5 years agorename load_i and stor_i to ld_pend_i / st_pend_i, match names in MemFUDepMatrix
Luke Kenneth Casson Leighton [Wed, 5 Jun 2019 07:58:26 +0000 (08:58 +0100)]
rename load_i and stor_i to ld_pend_i / st_pend_i, match names in MemFUDepMatrix

5 years agoadd mirror copy of FU_Regs Dep Matrix, names changed, adapted to LD/ST
Luke Kenneth Casson Leighton [Wed, 5 Jun 2019 05:43:14 +0000 (06:43 +0100)]
add mirror copy of FU_Regs Dep Matrix, names changed, adapted to LD/ST

wr -> ld
dest -> ld
rd -> st
src1 -> st

global search and replace.

5 years agoadd addrgen comment
Luke Kenneth Casson Leighton [Wed, 5 Jun 2019 05:22:55 +0000 (06:22 +0100)]
add addrgen comment

5 years agoadd docstring for address match comparator
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 14:03:30 +0000 (15:03 +0100)]
add docstring for address match comparator

5 years agoadd to docstring
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 09:36:27 +0000 (10:36 +0100)]
add to docstring

5 years agoconnect up LD/ST matrix properly
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 08:13:14 +0000 (09:13 +0100)]
connect up LD/ST matrix properly

5 years agoadd ldst_matrix.py back in, needs some work though
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 07:41:34 +0000 (08:41 +0100)]
add ldst_matrix.py back in, needs some work though

5 years agowhoops connect vector by y not x in FUFU matrix
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 04:53:42 +0000 (05:53 +0100)]
whoops connect vector by y not x in FUFU matrix

5 years agoallow branch immediate
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 00:38:38 +0000 (01:38 +0100)]
allow branch immediate

5 years agoreasonably sure that the pipelined ALU will work...
Luke Kenneth Casson Leighton [Mon, 3 Jun 2019 00:32:58 +0000 (01:32 +0100)]
reasonably sure that the pipelined ALU will work...

5 years agotry random instructions test with immediates, works ok
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 14:07:56 +0000 (15:07 +0100)]
try random instructions test with immediates, works ok

5 years agoadd immediate to ALU instructions
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 14:03:55 +0000 (15:03 +0100)]
add immediate to ALU instructions

5 years agoadd immediate arg to instr
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:47:24 +0000 (14:47 +0100)]
add immediate arg to instr

5 years agoremove unneeded code
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:29:25 +0000 (14:29 +0100)]
remove unneeded code

5 years agoadd operand-is-immediate to sim and instructions
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:28:24 +0000 (14:28 +0100)]
add operand-is-immediate to sim and instructions

5 years agoadd op is immediate to instruction q
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:24:10 +0000 (14:24 +0100)]
add op is immediate to instruction q

5 years agostart adding in immediates into CompUnit ALU
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 13:04:08 +0000 (14:04 +0100)]
start adding in immediates into CompUnit ALU

5 years agoremove unneeded code
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:43:31 +0000 (13:43 +0100)]
remove unneeded code

5 years agowhoops forgot to make CU decisions based on latched opcode
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:43:11 +0000 (13:43 +0100)]
whoops forgot to make CU decisions based on latched opcode

5 years agowhoops search/replace error
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:37:08 +0000 (13:37 +0100)]
whoops search/replace error

5 years agoadd MemSim, remove redundant signal
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 12:24:46 +0000 (13:24 +0100)]
add MemSim, remove redundant signal

5 years agoLDSTDepCell can act as a matrix
Luke Kenneth Casson Leighton [Sun, 2 Jun 2019 00:47:01 +0000 (01:47 +0100)]
LDSTDepCell can act as a matrix

5 years agoshorten by adding temp comb = m.d.comb
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 14:29:43 +0000 (15:29 +0100)]
shorten by adding temp comb = m.d.comb

5 years agoaddr release only on op_ldst
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 14:28:12 +0000 (15:28 +0100)]
addr release only on op_ldst

5 years agodebug comp_ldst
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 14:18:50 +0000 (15:18 +0100)]
debug comp_ldst

5 years agomake use of busy_o clearer
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 13:14:29 +0000 (14:14 +0100)]
make use of busy_o clearer

5 years agoadd LDST Computation Unit (in progress)
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 13:09:53 +0000 (14:09 +0100)]
add LDST Computation Unit (in progress)

5 years agomulti-bit LD?ST and add go_die
Luke Kenneth Casson Leighton [Sat, 1 Jun 2019 13:08:53 +0000 (14:08 +0100)]
multi-bit LD?ST and add go_die

5 years agoissue from q is combinatorial so do not need set to zer0
Luke Kenneth Casson Leighton [Fri, 31 May 2019 21:05:25 +0000 (22:05 +0100)]
issue from q is combinatorial so do not need set to zer0

5 years agouse instruction issue queue to get instructions into engine
Luke Kenneth Casson Leighton [Fri, 31 May 2019 20:37:52 +0000 (21:37 +0100)]
use instruction issue queue to get instructions into engine

5 years agogot instruction queue working
Luke Kenneth Casson Leighton [Fri, 31 May 2019 07:10:07 +0000 (08:10 +0100)]
got instruction queue working

5 years agoleave off number being subtracted from "ready_o" calculation
Luke Kenneth Casson Leighton [Thu, 30 May 2019 21:31:53 +0000 (22:31 +0100)]
leave off number being subtracted from "ready_o" calculation

5 years agoadd instruction queue test
Luke Kenneth Casson Leighton [Thu, 30 May 2019 21:19:40 +0000 (22:19 +0100)]
add instruction queue test

5 years agodo instruction q as array of (flat) Signals, add in and out data
Luke Kenneth Casson Leighton [Thu, 30 May 2019 03:08:35 +0000 (04:08 +0100)]
do instruction q as array of (flat) Signals, add in and out data

5 years agoflatten instruction queue using a shift register
Luke Kenneth Casson Leighton [Thu, 30 May 2019 01:01:17 +0000 (02:01 +0100)]
flatten instruction queue using a shift register

5 years agoremove unneeded imports
Luke Kenneth Casson Leighton [Wed, 29 May 2019 23:41:04 +0000 (00:41 +0100)]
remove unneeded imports

5 years agoremove Shadow class, replace with ShadowFn, use multi-bit SRLatch
Luke Kenneth Casson Leighton [Wed, 29 May 2019 23:39:51 +0000 (00:39 +0100)]
remove Shadow class, replace with ShadowFn, use multi-bit SRLatch

5 years agoreturn to SRLatches for DependencyRow, simplifies (speeds up)
Luke Kenneth Casson Leighton [Wed, 29 May 2019 23:23:36 +0000 (00:23 +0100)]
return to SRLatches for DependencyRow, simplifies (speeds up)

5 years agoremove FU Dep Cell, go back to SRLatch direct
Luke Kenneth Casson Leighton [Wed, 29 May 2019 22:57:19 +0000 (23:57 +0100)]
remove FU Dep Cell, go back to SRLatch direct

5 years agowire up FU-FU matrix using inverted row/col
Luke Kenneth Casson Leighton [Wed, 29 May 2019 21:35:34 +0000 (22:35 +0100)]
wire up FU-FU matrix using inverted row/col

5 years agomake FU-FU DepCell a row
Luke Kenneth Casson Leighton [Wed, 29 May 2019 21:28:09 +0000 (22:28 +0100)]
make FU-FU DepCell a row

5 years agodo dependency row as multi-bit SRLatch
Luke Kenneth Casson Leighton [Wed, 29 May 2019 20:46:40 +0000 (21:46 +0100)]
do dependency row as multi-bit SRLatch

5 years agoadd start of instruction queue
Luke Kenneth Casson Leighton [Wed, 29 May 2019 15:11:32 +0000 (16:11 +0100)]
add start of instruction queue

5 years agowait for individual batch-units rather than the global signal
Luke Kenneth Casson Leighton [Wed, 29 May 2019 12:02:51 +0000 (13:02 +0100)]
wait for individual batch-units rather than the global signal

5 years agowhoops wrong mask for branch instruction decode
Luke Kenneth Casson Leighton [Wed, 29 May 2019 10:13:35 +0000 (11:13 +0100)]
whoops wrong mask for branch instruction decode

5 years agoget issue logic working for issue unit array
Luke Kenneth Casson Leighton [Wed, 29 May 2019 10:10:22 +0000 (11:10 +0100)]
get issue logic working for issue unit array

5 years agolatch opcode on instruction issue
Luke Kenneth Casson Leighton [Wed, 29 May 2019 09:41:25 +0000 (10:41 +0100)]
latch opcode on instruction issue

5 years agouse opcode-base issue units, parallel units
Luke Kenneth Casson Leighton [Wed, 29 May 2019 03:21:04 +0000 (04:21 +0100)]
use opcode-base issue units, parallel units

5 years agoadd docstring
Luke Kenneth Casson Leighton [Wed, 29 May 2019 00:24:01 +0000 (01:24 +0100)]
add docstring

5 years agogroup computation units together
Luke Kenneth Casson Leighton [Wed, 29 May 2019 00:10:49 +0000 (01:10 +0100)]
group computation units together

5 years agoremove waw stall from issue unit
Luke Kenneth Casson Leighton [Mon, 27 May 2019 12:02:23 +0000 (13:02 +0100)]
remove waw stall from issue unit

5 years agoadd an IssueUnitGroup which has a priority picker
Luke Kenneth Casson Leighton [Mon, 27 May 2019 10:58:09 +0000 (11:58 +0100)]
add an IssueUnitGroup which has a priority picker

5 years agostop on shadow for the moment
Luke Kenneth Casson Leighton [Mon, 27 May 2019 09:51:17 +0000 (10:51 +0100)]
stop on shadow for the moment

5 years agohave to bring in a reset signal into the shadow units to get them to go to
Luke Kenneth Casson Leighton [Sun, 26 May 2019 01:03:07 +0000 (02:03 +0100)]
have to bring in a reset signal into the shadow units to get them to go to
a known state, after a branch result is known

5 years agoseparate out go_die from go_rd/go_wr to stop reg read/write triggering
Luke Kenneth Casson Leighton [Sat, 25 May 2019 22:48:40 +0000 (23:48 +0100)]
separate out go_die from go_rd/go_wr to stop reg read/write triggering

5 years agoget fake branch delay time working
Luke Kenneth Casson Leighton [Sat, 25 May 2019 22:21:14 +0000 (23:21 +0100)]
get fake branch delay time working

5 years agowhoops, operation supposed to be tested, not counter
Luke Kenneth Casson Leighton [Sat, 25 May 2019 22:16:49 +0000 (23:16 +0100)]
whoops, operation supposed to be tested, not counter

5 years agobranch success/fail nearly there
Luke Kenneth Casson Leighton [Sat, 25 May 2019 17:21:20 +0000 (18:21 +0100)]
branch success/fail nearly there

5 years agoexperimenting with branch shadowing
Luke Kenneth Casson Leighton [Sat, 25 May 2019 12:34:11 +0000 (13:34 +0100)]
experimenting with branch shadowing

5 years agoadd branch speculation using shadows
Luke Kenneth Casson Leighton [Sat, 25 May 2019 07:55:47 +0000 (08:55 +0100)]
add branch speculation using shadows

5 years agouse internal latch qlq value instead of creating a separate sync register
Luke Kenneth Casson Leighton [Fri, 24 May 2019 16:54:43 +0000 (17:54 +0100)]
use internal latch qlq value instead of creating a separate sync register

5 years agoremove dummy values for branch setup
Luke Kenneth Casson Leighton [Fri, 24 May 2019 16:38:58 +0000 (17:38 +0100)]
remove dummy values for branch setup

5 years agoreplace m.d.comb += with comb += etc. increases readability
Luke Kenneth Casson Leighton [Fri, 24 May 2019 16:37:32 +0000 (17:37 +0100)]
replace m.d.comb += with comb += etc. increases readability

5 years agoremove unneeded import
Luke Kenneth Casson Leighton [Fri, 24 May 2019 16:09:54 +0000 (17:09 +0100)]
remove unneeded import

5 years agouse create_random_ops function
Luke Kenneth Casson Leighton [Fri, 24 May 2019 14:44:01 +0000 (15:44 +0100)]
use create_random_ops function

5 years agoadd in branch speculation recorder, link to branch
Luke Kenneth Casson Leighton [Fri, 24 May 2019 14:41:39 +0000 (15:41 +0100)]
add in branch speculation recorder, link to branch

5 years agoadd branch speculation record
Luke Kenneth Casson Leighton [Fri, 24 May 2019 14:17:01 +0000 (15:17 +0100)]
add branch speculation record

5 years agomake bgt accessible outside of CU
Luke Kenneth Casson Leighton [Fri, 24 May 2019 13:30:19 +0000 (14:30 +0100)]
make bgt accessible outside of CU
increase shadow width (make room for branch shadow)

5 years agocheck that bgt test ALU works
Luke Kenneth Casson Leighton [Fri, 24 May 2019 13:15:15 +0000 (14:15 +0100)]
check that bgt test ALU works

5 years agoadd delay on branches
Luke Kenneth Casson Leighton [Fri, 24 May 2019 13:01:23 +0000 (14:01 +0100)]
add delay on branches

5 years agoremove unneeded code
Luke Kenneth Casson Leighton [Fri, 24 May 2019 13:00:44 +0000 (14:00 +0100)]
remove unneeded code

5 years agoadd delay on branches
Luke Kenneth Casson Leighton [Fri, 24 May 2019 13:00:00 +0000 (14:00 +0100)]
add delay on branches

5 years agowork on branch simulation logic
Luke Kenneth Casson Leighton [Fri, 24 May 2019 11:41:08 +0000 (12:41 +0100)]
work on branch simulation logic

5 years agoreset shadow latches if neither success nor fail are applied
Luke Kenneth Casson Leighton [Fri, 24 May 2019 11:40:28 +0000 (12:40 +0100)]
reset shadow latches if neither success nor fail are applied

5 years agosplit out shared wait for issue and wait for busy clear functions
Luke Kenneth Casson Leighton [Fri, 24 May 2019 09:06:39 +0000 (10:06 +0100)]
split out shared wait for issue and wait for busy clear functions

5 years agomake a start on a branch simulator
Luke Kenneth Casson Leighton [Fri, 24 May 2019 08:49:48 +0000 (09:49 +0100)]
make a start on a branch simulator

5 years agoadd simple branch-compare example ALU
Luke Kenneth Casson Leighton [Fri, 24 May 2019 07:56:59 +0000 (08:56 +0100)]
add simple branch-compare example ALU

5 years agoadd priority picker docstring
Luke Kenneth Casson Leighton [Fri, 24 May 2019 07:12:03 +0000 (08:12 +0100)]
add priority picker docstring

5 years agocleanup, docstrings
Luke Kenneth Casson Leighton [Fri, 24 May 2019 06:55:06 +0000 (07:55 +0100)]
cleanup, docstrings

5 years agoshadow seems to do the job of guaranteeing write-after-write
Luke Kenneth Casson Leighton [Thu, 23 May 2019 20:57:56 +0000 (21:57 +0100)]
shadow seems to do the job of guaranteeing write-after-write

5 years agoset up the shadow grid
Luke Kenneth Casson Leighton [Thu, 23 May 2019 14:19:49 +0000 (15:19 +0100)]
set up the shadow grid

5 years agoonly want a single-bit transition
Luke Kenneth Casson Leighton [Thu, 23 May 2019 13:27:10 +0000 (14:27 +0100)]
only want a single-bit transition

5 years agoadd in busy_prev/next signal to work out which unit was activated
Luke Kenneth Casson Leighton [Thu, 23 May 2019 13:23:32 +0000 (14:23 +0100)]
add in busy_prev/next signal to work out which unit was activated

5 years agoshadow fail/good signals need to be amalgamated (shadow enable is the matrix)
Luke Kenneth Casson Leighton [Thu, 23 May 2019 12:55:38 +0000 (13:55 +0100)]
shadow fail/good signals need to be amalgamated (shadow enable is the matrix)

5 years agomake shadow inputs/good/fail arrays (actual matrix now)
Luke Kenneth Casson Leighton [Thu, 23 May 2019 11:07:03 +0000 (12:07 +0100)]
make shadow inputs/good/fail arrays (actual matrix now)

5 years agodecide to do write-after-write shadows
Luke Kenneth Casson Leighton [Thu, 23 May 2019 10:58:19 +0000 (11:58 +0100)]
decide to do write-after-write shadows

5 years agoconnect FUFU/FURegs Matrices to resettable go_rd/go_wr (include go_die)
Luke Kenneth Casson Leighton [Thu, 23 May 2019 09:28:40 +0000 (10:28 +0100)]
connect FUFU/FURegs Matrices to resettable go_rd/go_wr (include go_die)

5 years agostart wiring up shadow matrix
Luke Kenneth Casson Leighton [Thu, 23 May 2019 09:12:10 +0000 (10:12 +0100)]
start wiring up shadow matrix

5 years agore-enable shadow/go_die
Luke Kenneth Casson Leighton [Thu, 23 May 2019 08:58:14 +0000 (09:58 +0100)]
re-enable shadow/go_die

5 years agowhoops disconnected go_wr from CUs by mistake
Luke Kenneth Casson Leighton [Thu, 23 May 2019 08:52:14 +0000 (09:52 +0100)]
whoops disconnected go_wr from CUs by mistake

5 years agoadd shadow matrix (unconnected)
Luke Kenneth Casson Leighton [Thu, 23 May 2019 08:44:42 +0000 (09:44 +0100)]
add shadow matrix (unconnected)

5 years agoadd shadow matrix, array of shadow functions
Luke Kenneth Casson Leighton [Thu, 23 May 2019 07:51:15 +0000 (08:51 +0100)]
add shadow matrix, array of shadow functions

5 years agoadd in shadown and go_die into comp unit
Luke Kenneth Casson Leighton [Thu, 23 May 2019 07:50:49 +0000 (08:50 +0100)]
add in shadown and go_die into comp unit

5 years agosplit out shadow into separate module
Luke Kenneth Casson Leighton [Thu, 23 May 2019 06:51:13 +0000 (07:51 +0100)]
split out shadow into separate module

5 years agosort out counter, rename data_o to data_r (register), document CompUnit
Luke Kenneth Casson Leighton [Wed, 22 May 2019 23:20:46 +0000 (00:20 +0100)]
sort out counter, rename data_o to data_r (register), document CompUnit

5 years agoinvert write pending before use
Luke Kenneth Casson Leighton [Wed, 22 May 2019 19:43:35 +0000 (20:43 +0100)]
invert write pending before use

5 years agotesting if hazard can be done in current cycle
Luke Kenneth Casson Leighton [Wed, 22 May 2019 19:18:08 +0000 (20:18 +0100)]
testing if hazard can be done in current cycle

5 years agouse global pending vectors for read/write pending accumulation
Luke Kenneth Casson Leighton [Wed, 22 May 2019 13:22:18 +0000 (14:22 +0100)]
use global pending vectors for read/write pending accumulation

5 years agoclean up names, also note that readable is true if no writes are pending
Luke Kenneth Casson Leighton [Wed, 22 May 2019 13:05:44 +0000 (14:05 +0100)]
clean up names, also note that readable is true if no writes are pending
and writable is true if no reads are pending