Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 17:09:13 +0000 (18:09 +0100)]
tidyup comments
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 17:09:03 +0000 (18:09 +0100)]
content must be comb not sync
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 16:58:14 +0000 (17:58 +0100)]
comment spelling
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 16:50:12 +0000 (17:50 +0100)]
clarify output, use Cat on list
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 16:38:26 +0000 (17:38 +0100)]
rename _i and _o, for clarity: replace_en comb not sync
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 16:18:35 +0000 (17:18 +0100)]
redundant argument lu_hit
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 16:13:11 +0000 (17:13 +0100)]
split out into modules
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 15:36:13 +0000 (16:36 +0100)]
split into separate module instead of array
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 14:07:28 +0000 (15:07 +0100)]
update comment block
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 14:07:13 +0000 (15:07 +0100)]
update comment block
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 14:01:58 +0000 (15:01 +0100)]
create flatten and use in eq
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 12:51:58 +0000 (13:51 +0100)]
temporary signals, efforts to simplify graph
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 12:32:56 +0000 (13:32 +0100)]
add in temporaries, get graphviz down in size
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 12:18:16 +0000 (13:18 +0100)]
work towards getting PTW translation working
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 11:57:49 +0000 (12:57 +0100)]
correct python syntax errors
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 11:40:04 +0000 (12:40 +0100)]
update comments
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 11:34:56 +0000 (12:34 +0100)]
experimental conversion of ariane TLB to nmigen, see what it looks like
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 07:01:29 +0000 (08:01 +0100)]
tidyup
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 06:53:29 +0000 (07:53 +0100)]
remove _n and _q
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 06:34:38 +0000 (07:34 +0100)]
experimental conversion of ptw.sv
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 06:25:41 +0000 (07:25 +0100)]
experimental conversion of ptw.sv
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 06:24:26 +0000 (07:24 +0100)]
experimental conversion of ptw.sv
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 06:17:24 +0000 (07:17 +0100)]
experimental conversion of ptw.sv
Luke Kenneth Casson Leighton [Sun, 14 Apr 2019 05:59:41 +0000 (06:59 +0100)]
experimental conversion of ptw.sv
Luke Kenneth Casson Leighton [Sat, 13 Apr 2019 21:15:32 +0000 (22:15 +0100)]
experimental conversion of ptw.sv
Luke Kenneth Casson Leighton [Sat, 13 Apr 2019 21:11:23 +0000 (22:11 +0100)]
experimental conversion of ptw.sv
Luke Kenneth Casson Leighton [Sat, 13 Apr 2019 11:54:34 +0000 (12:54 +0100)]
add conversion of ptw.sv from ariane, to see what it looks like
Luke Kenneth Casson Leighton [Wed, 10 Apr 2019 17:45:15 +0000 (18:45 +0100)]
check_tags is a member of the class
Luke Kenneth Casson Leighton [Wed, 10 Apr 2019 17:40:57 +0000 (18:40 +0100)]
set is a python keyword, renamed to "cset" - short for "cache set"
Daniel Benusovich [Wed, 10 Apr 2019 07:24:28 +0000 (00:24 -0700)]
Add a comment
Daniel Benusovich [Wed, 10 Apr 2019 06:43:17 +0000 (23:43 -0700)]
Add LRU logic for read portion. Still missing write. Soon.
Daniel Benusovich [Wed, 10 Apr 2019 06:14:02 +0000 (23:14 -0700)]
Update comments for consitency
Luke Kenneth Casson Leighton [Mon, 8 Apr 2019 03:11:56 +0000 (04:11 +0100)]
remove twin negatives in comment
Luke Kenneth Casson Leighton [Mon, 8 Apr 2019 03:07:00 +0000 (04:07 +0100)]
use constants with semi-useful names
Luke Kenneth Casson Leighton [Sun, 7 Apr 2019 23:19:19 +0000 (00:19 +0100)]
add comment about L1_size being overridden
Luke Kenneth Casson Leighton [Sun, 7 Apr 2019 23:18:12 +0000 (00:18 +0100)]
minor code-shuffle on TLB, added nmigen-main caller
Luke Kenneth Casson Leighton [Sun, 7 Apr 2019 23:17:42 +0000 (00:17 +0100)]
add ports function to Cam.py for convenience
Daniel Benusovich [Mon, 1 Apr 2019 06:08:57 +0000 (23:08 -0700)]
Add SetAssociativeCache source with read logic
Daniel Benusovich [Mon, 1 Apr 2019 06:08:17 +0000 (23:08 -0700)]
Move read L1 block into the correct location.
Daniel Benusovich [Mon, 1 Apr 2019 05:51:03 +0000 (22:51 -0700)]
Correct failing test.
Daniel Benusovich [Mon, 1 Apr 2019 05:50:53 +0000 (22:50 -0700)]
Correct missing function call in unit test.
Daniel Benusovich [Mon, 1 Apr 2019 02:53:37 +0000 (19:53 -0700)]
Correct comment in TLB
Daniel Benusovich [Mon, 1 Apr 2019 01:23:49 +0000 (18:23 -0700)]
Correcting read/write port assignments
Daniel Benusovich [Sun, 31 Mar 2019 21:57:37 +0000 (14:57 -0700)]
Remove VectorAssembler files
Daniel Benusovich [Sun, 31 Mar 2019 21:56:57 +0000 (14:56 -0700)]
Remove VectorAssembler from CAM. Thanks Luke
Luke Kenneth Casson Leighton [Tue, 26 Mar 2019 03:27:46 +0000 (03:27 +0000)]
spelling correction
Daniel Benusovich [Wed, 20 Mar 2019 05:05:50 +0000 (22:05 -0700)]
Add PteEntry comments
Daniel Benusovich [Wed, 20 Mar 2019 04:58:17 +0000 (21:58 -0700)]
Update TLB to follow PermissionValidator changes
Daniel Benusovich [Wed, 20 Mar 2019 04:56:37 +0000 (21:56 -0700)]
Update PermissionValidator to use PteEntry Parser to increase code read ability and code duplication
Daniel Benusovich [Wed, 20 Mar 2019 04:55:46 +0000 (21:55 -0700)]
Add PteEntry parser to centralize Page Table Entry parsing
Daniel Benusovich [Wed, 20 Mar 2019 04:55:22 +0000 (21:55 -0700)]
Delete unused resource RegisterFile
Luke Kenneth Casson Leighton [Thu, 14 Mar 2019 05:49:21 +0000 (05:49 +0000)]
whitespace cleanup
Daniel Benusovich [Thu, 14 Mar 2019 05:18:03 +0000 (22:18 -0700)]
Add permission validator unit test. Still needs more but basics are here!
Daniel Benusovich [Thu, 14 Mar 2019 05:17:42 +0000 (22:17 -0700)]
Add valid bit check to permission validator
Daniel Benusovich [Thu, 14 Mar 2019 05:17:19 +0000 (22:17 -0700)]
Add missing argument for L1 memory size
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 07:34:56 +0000 (07:34 +0000)]
whitespace
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 07:34:20 +0000 (07:34 +0000)]
spelling correction
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 07:33:46 +0000 (07:33 +0000)]
super is a keyword: replace with "supermode" in TLB and PermValidator
Luke Kenneth Casson Leighton [Wed, 13 Mar 2019 07:31:58 +0000 (07:31 +0000)]
move comments to docstring block
Daniel Benusovich [Wed, 13 Mar 2019 05:47:47 +0000 (22:47 -0700)]
Replace RegisterFile with Memory.
Daniel Benusovich [Wed, 13 Mar 2019 05:10:34 +0000 (22:10 -0700)]
Update comments CAM
Daniel Benusovich [Wed, 13 Mar 2019 05:10:24 +0000 (22:10 -0700)]
Delete CacheWalker
Daniel Benusovich [Wed, 13 Mar 2019 05:10:16 +0000 (22:10 -0700)]
Delete RegisterFile
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 06:50:18 +0000 (06:50 +0000)]
remove whitespace
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 06:48:45 +0000 (06:48 +0000)]
remove whitespace
Luke Kenneth Casson Leighton [Tue, 12 Mar 2019 06:46:48 +0000 (06:46 +0000)]
remove whitespace
Daniel Benusovich [Tue, 12 Mar 2019 04:13:01 +0000 (21:13 -0700)]
Remove whitespace
Daniel Benusovich [Tue, 12 Mar 2019 04:12:54 +0000 (21:12 -0700)]
Correct misspelled word
Daniel Benusovich [Tue, 12 Mar 2019 04:05:17 +0000 (21:05 -0700)]
Add logic to TLB to correctly utilize Cam, RegisterFile, and PermissionValidator submodules. Needs lots of work.
Daniel Benusovich [Tue, 12 Mar 2019 04:04:18 +0000 (21:04 -0700)]
Remove whitespace
Daniel Benusovich [Tue, 12 Mar 2019 02:53:12 +0000 (19:53 -0700)]
Update PermissionValidator to actually function. Needs tests
Daniel Benusovich [Tue, 12 Mar 2019 02:52:45 +0000 (19:52 -0700)]
Update comments. Remove Whitespace
Daniel Benusovich [Tue, 12 Mar 2019 02:51:25 +0000 (19:51 -0700)]
Add RegisterFile class for usage in the TLB.
Daniel Benusovich [Sun, 10 Mar 2019 22:38:29 +0000 (15:38 -0700)]
Show that read_warning is not necessary. But the line should be kept for interfacing?
Daniel Benusovich [Sun, 10 Mar 2019 22:29:36 +0000 (15:29 -0700)]
Update CAM comments to reflect new usage
Daniel Benusovich [Sun, 10 Mar 2019 22:29:23 +0000 (15:29 -0700)]
Add multiple match test
Daniel Benusovich [Sun, 10 Mar 2019 19:34:13 +0000 (12:34 -0700)]
Remove wen term and shift If blocks to remove NOT need
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 22:38:51 +0000 (22:38 +0000)]
whitespace cleanup
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 22:38:15 +0000 (22:38 +0000)]
use binary input to test, bit clearer
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 22:37:36 +0000 (22:37 +0000)]
rename input variable to in_val (input is a python keyword)
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 22:35:32 +0000 (22:35 +0000)]
rename input variable to i (input is a python keyword)
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 22:30:01 +0000 (22:30 +0000)]
whitespace (put intermediate on separate line)
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 22:28:46 +0000 (22:28 +0000)]
rename input to i (input is a python keyword)
Luke Kenneth Casson Leighton [Sat, 9 Mar 2019 22:23:14 +0000 (22:23 +0000)]
put inversion of write-enable into its own signal
Daniel Benusovich [Sat, 9 Mar 2019 04:19:20 +0000 (20:19 -0800)]
Change test vcd output file name to match test filenames
Daniel Benusovich [Sat, 9 Mar 2019 04:17:33 +0000 (20:17 -0800)]
Remove whitespace
Daniel Benusovich [Sat, 9 Mar 2019 04:11:04 +0000 (20:11 -0800)]
Correct comment in Cam to reflect changes
Daniel Benusovich [Sat, 9 Mar 2019 04:10:05 +0000 (20:10 -0800)]
Add comments to Cam test
Daniel Benusovich [Sat, 9 Mar 2019 04:05:29 +0000 (20:05 -0800)]
Add one more function comment for vector address test
Daniel Benusovich [Sat, 9 Mar 2019 04:04:10 +0000 (20:04 -0800)]
Add comments for AddressEncoder and associated tests
Daniel Benusovich [Sat, 9 Mar 2019 04:03:34 +0000 (20:03 -0800)]
Correct comments for test_cam_entry
Daniel Benusovich [Sat, 9 Mar 2019 03:58:42 +0000 (19:58 -0800)]
Correct comment for vector assembler test
Daniel Benusovich [Sat, 9 Mar 2019 03:51:52 +0000 (19:51 -0800)]
Add comments for VectorAssembler
Daniel Benusovich [Sat, 9 Mar 2019 03:41:55 +0000 (19:41 -0800)]
Add VectorAssembler to accept match results from CamEntries to improve yosys graph readability. The loopdedoos are no more!
Daniel Benusovich [Sat, 9 Mar 2019 03:41:12 +0000 (19:41 -0800)]
Add VectorAssembler to make the graph from yosys beautiful.
Daniel Benusovich [Sat, 9 Mar 2019 03:12:50 +0000 (19:12 -0800)]
Ignore generate .v files for now at least
Daniel Benusovich [Sat, 9 Mar 2019 03:10:04 +0000 (19:10 -0800)]
Modify Cam to use AddressEncoder instead of two encoders
Daniel Benusovich [Sat, 9 Mar 2019 03:09:43 +0000 (19:09 -0800)]
Correct incorrect output bit size
Daniel Benusovich [Sat, 9 Mar 2019 02:59:27 +0000 (18:59 -0800)]
Add AddressEncoder to consolidate encoder modules and hide ugliness
Daniel Benusovich [Sat, 9 Mar 2019 02:50:02 +0000 (18:50 -0800)]
Update assert functions to remove duplicated code via assert_op in test_helper.py