Roland Scheidegger [Tue, 2 Apr 2013 15:41:44 +0000 (17:41 +0200)]
gallivm: consolidate code for float-to-half and float-to-packed conversion.
This replaces the existing float-to-half implementation.
There are definitely a couple of differences - the old implementation
had unspecified(?) rounding behavior, and could at least in theory
construct Inf values out of NaNs. NaNs and Infs should now always be
properly propagated, and rounding behavior is now towards zero
(note this means too large but non-Infinity values get propagated to max
representable value, not Infinity).
The implementation will definitely not match util code, however (which
does nearest rounding, which also means too large values will get
propagated to Infinity).
Also fix a bogus round mask probably leading to rounding bugs...
v2: fix a logic bug in handling infs/nans.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Vadim Girlin [Tue, 2 Apr 2013 15:33:40 +0000 (19:33 +0400)]
r600g: don't reserve more stack space than required v5
Reduced stack size allows to run more threads in some cases,
improving performance for the shaders that use stack (that is, for the
shaders with control flow instructions). E.g. with unigine-based apps.
v4: implement exact computation taking into account wavefront size
v5: add cases for RV620, RS880
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Vadim Girlin [Tue, 2 Apr 2013 15:32:26 +0000 (19:32 +0400)]
r600g: fix range handling for tgsi input declarations v2
Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Marek Olšák [Tue, 2 Apr 2013 01:30:09 +0000 (03:30 +0200)]
gallium/hud: do .xxxx swizzling for the font texture in the fragment shader
This allows using L8 and R8 for the font if I8 isn't supported.
Tested-by: Brian Paul <brianp@vmware.com>
Brian Paul [Mon, 1 Apr 2013 22:46:06 +0000 (16:46 -0600)]
hud: flush/unmap the vertex buffer before drawing
The VMware svga driver is picky about making sure the VBO is unmapped
before drawing.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Brian Paul [Mon, 1 Apr 2013 22:44:01 +0000 (16:44 -0600)]
draw: use pipe_transfer_unmap() to match pipe_transfer_map()
Roland Scheidegger [Tue, 2 Apr 2013 11:20:24 +0000 (13:20 +0200)]
gallivm: fix signed small float to float conversion
Introduced by
5f41e08cf39d585d600aa506cdcd2f5380c60ddd,
just a silly typo.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=62921.
Christian König [Fri, 22 Mar 2013 14:59:22 +0000 (15:59 +0100)]
radeonsi: add instance divisor support v3
v2: reduce key size, don't copy key around to much.
v3: remove key size reduction
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Christian König [Thu, 21 Mar 2013 17:30:23 +0000 (18:30 +0100)]
radeonsi: add start instance support
This works different than on R600, we need to add the start instance manually.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Christian König [Thu, 21 Mar 2013 17:02:52 +0000 (18:02 +0100)]
radeonsi: add instanceid support
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Christian König [Thu, 21 Mar 2013 16:37:37 +0000 (17:37 +0100)]
radeon/llvm: move system value fetching to common code
This should be used by both SI and R600.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Michel Dänzer [Wed, 27 Mar 2013 11:43:32 +0000 (12:43 +0100)]
radeonsi: Handle arbitrary 2-byte formats in resource_copy_region
Fixes mplayer -vo vdpau OSD.
NOTE: This is a candidate for the 9.1 branch.
Reported-by: Igor Vagulin <igor.vagulin@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Christian König <christian.koenig@amd.com>
Maarten Lankhorst [Sun, 24 Mar 2013 13:37:41 +0000 (14:37 +0100)]
nvc0: Fix fd leak in nvc0_create_decoder
NOTE: This is a candidate for the 9.0 and 9.1 branches.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Aras Pranckevicius [Fri, 1 Mar 2013 10:05:11 +0000 (12:05 +0200)]
GLSL: fix lower_jumps to report progress properly
A fix for lower_jumps progress reporting, very much like similar in
c1e591eed.
NOTE: This is a candidate for stable branches.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Wed, 20 Mar 2013 00:45:02 +0000 (17:45 -0700)]
i965/fs: Allow CSE on pre-gen7 varying-index uniform loads
All the other expression types allowed here have inst->mlen == 0, and this
one has implied MRF writes for all of its payload, so nothing else in the
implementation should need to change.
Reduces SEND messages for loading from pull constants in kwin's Lanczos
shader from 16 to 6. (Due to a deficiency in constant propagation, I
can't use the hack I did in the previous commit to test the performance
change)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61554
NOTE: This is a candidate for the 9.1 branch.
Eric Anholt [Mon, 18 Mar 2013 17:16:42 +0000 (10:16 -0700)]
i965/fs: Use LD messages for pre-gen7 varying-index uniform loads
This comes at a minor performance cost at the moment (-3.2% +/- 0.2%, n=14 on
my GM45 forced to load all uniforms through the varying-index path), but we
get a whole vec4 at a time to reuse in the next commit.
v2: Fix comment about channels in the other message.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
NOTE: This is a candidate for the 9.1 branch.
Eric Anholt [Wed, 20 Mar 2013 00:36:10 +0000 (17:36 -0700)]
i965/fs: Don't double-emit SEND dependency workarounds at control flow.
We weren't setting needs_dep[i] in the loops, so we'd continue on to
potentially add the same workaround MOVs to the later basic block
boundaries, too. We can either set needs_dep[i] to exit through the
normal path, or we can just return since we know we're done.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Mon, 18 Mar 2013 18:30:57 +0000 (11:30 -0700)]
i965/fs: Bake regs_written into the IR instead of recomputing it later.
For sampler messages, it depends on the target gen, and on gen4
SIMD16-sampler-on-SIMD8-execution we were returning 4 instead of 8 like we
should.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
NOTE: This is a candidate for the 9.1 branch.
Eric Anholt [Mon, 18 Mar 2013 18:26:17 +0000 (11:26 -0700)]
i965/fs: Clean up the setup of gen4 simd16 message destinations.
I think this makes it much more obvious what's going on here.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 15 Mar 2013 21:43:28 +0000 (14:43 -0700)]
i965/fs: Do CSE on gen7's varying-index pull constant loads.
This is our first CSE on a regs_written() > 1 instruction, so it takes a
bit of extra fixup. Reduces the number of loads on kwin's Lanczos shader
from 12 to 2.
v2: Fix compiler warning (false positive on possibly-uninitialized variable)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61554
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
NOTE: This is a candidate for the 9.1 branch.
Eric Anholt [Wed, 13 Mar 2013 21:48:55 +0000 (14:48 -0700)]
i965/fs: Improve performance of varying-index uniform loads on IVB.
Like we have done for the VS and for constant-index uniform loads, we use
the sampler engine to get caching in front of the L3 to avoid tickling the
IVB L3 bug. This is also a bit of a functional change, as we're now
loading a vec4 instead of a single dword, though we're not taking
advantage of the other 3 components of the vec4 (yet).
With the driver hacked to always take the varying-index path for all
uniforms, improves performance of my old GLSL demo by 315% +/- 2% (n=4).
This a major fix for some blur shaders in compositors from the
varying-index uniforms support I introduced in 9.1.
v2: Move old offset computation into the pre-gen7 path.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61554
NOTE: This is a candidate for the 9.1 branch.
Eric Anholt [Fri, 15 Mar 2013 21:31:46 +0000 (14:31 -0700)]
i965/fs: Avoid inappropriate optimization with regs_written > 1.
Right now we don't have anything with regs_written() > 1 and !inst->mlen,
but that's about to change.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 14 Mar 2013 21:41:37 +0000 (14:41 -0700)]
i965: Make the fragment shader pull constants index by dwords, not vec4s.
We want to load vec4s, since loading a vec4 instead of a dword is
basically no increased latency. But for variable indexed access, the
previous requirement of aligned vec4s for a sampler LD was hard to
implement.
Note that this change only affects those messages that use the surface
format, like sampler LDs, but not to the untyped data cache loads we've
used in other cases.
No significant performance difference on my GLSL demo with uniforms forced
to take the varying pull constants path (n=4).
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 20 Mar 2013 17:46:20 +0000 (10:46 -0700)]
i965: Make the constant surface interface take a normal byte size.
This puts the rounding-up logic into the function itself instead of all
the callers having to manage it. Also drop an "unused" comment in gen4,
as the stride *is* used for texbos (and will be for uniforms soon).
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 13 Mar 2013 19:27:17 +0000 (12:27 -0700)]
i965/fs: Move varying uniform offset compuation into the helper func.
I'm going to want to change the math for gen7 using sampler LD
instructions in a way that gets CSE to occur like we'd hope.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 13 Mar 2013 19:17:25 +0000 (12:17 -0700)]
i965/fs: Remove creation of a MOV instruction that's never used.
We weren't inserting it into the list, so it did nothing. This line was
replaced by the MOV/MUL block above.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 15 Mar 2013 21:21:30 +0000 (14:21 -0700)]
i965/fs: Allow constant propagation into MACH.
This happens quite a bit with varying-index uniform loads. We could also
do better by avoiding the MACH entirely, but there's no reason not to at
least take this step.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Vincent Lejeune [Mon, 1 Apr 2013 21:50:20 +0000 (23:50 +0200)]
r600g/llvm: Update LLVM_REVISION.txt
Vincent Lejeune [Sat, 30 Mar 2013 01:09:15 +0000 (02:09 +0100)]
r600g/llvm: Use stack_size provided from llvm.
Vincent Lejeune [Sat, 30 Mar 2013 19:05:45 +0000 (20:05 +0100)]
r600g/llvm: uses function attribute to pass shader type
Vincent Lejeune [Tue, 26 Mar 2013 14:00:18 +0000 (15:00 +0100)]
r600g/llvm: Add support for cf_alu native encode
Haixia Shi [Mon, 1 Apr 2013 20:24:55 +0000 (13:24 -0700)]
ACTIVE_UNIFORM_MAX_LENGTH should include 3 extra characters for arrays.
If the active uniform is an array, then the length of the uniform name should
include the three extra characters for the "[0]" suffix, which is required by
the GL 4.2 spec to be appended to the uniform name in glGetActiveUniform().
This avoids the situation where the output buffer does not have enough space
to hold the "[0]" suffix, resulting in an incomplete array specification like
"foobar[0".
NOTE: This is a candidate for the 9.1 branch.
Change-Id: I41e87ba347a7169eec8c575596cc3416adbe0728
Signed-off-by: Haixia Shi <hshi@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 31 Mar 2013 04:26:57 +0000 (21:26 -0700)]
i965/fs: Fix bad interaction between tex swizzles and textureQueryLOD.
Reported-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Sat, 1 Dec 2012 02:30:40 +0000 (18:30 -0800)]
i965: Remove the old brw_optimize() code.
This is now done in the VS backend before instruction emit.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Sat, 1 Dec 2012 02:29:34 +0000 (18:29 -0800)]
i965/vs: Add a pass to set dependency control fields on instructions.
This is a more aggressive version of the old brw_optimize() path. Reduces
cycles spent in the vertex shader on minecraft by 18.6% +/- 10.0% (n=15).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Fri, 22 Mar 2013 23:50:58 +0000 (16:50 -0700)]
i965: Dump shader source for linked shader programs.
We dump shader source in ir_to_mesa.cpp, and we dump linked programs here,
but we had no reference from the linked programs to their source. This
was preventing improvement of shader-db to use linked shader programs
instead of individual shader files (which is bogus, because it means we
optimize out VS outputs, and don't interpolate FS inputs!)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Mike Lothian [Mon, 1 Apr 2013 17:50:23 +0000 (10:50 -0700)]
clover: Fix build with LLVM 3.3
Brian Paul [Tue, 26 Mar 2013 04:02:47 +0000 (22:02 -0600)]
llvmpipe: use triangle subdivision to avoid fixed-point overflow issues
If we're drawing to a surface that's 2048 x 2048 pixels or larger there's
danger of fixed-point overflow in the triangle rasterization code. That
leads to various rendering glitches.
Rather than implement some intricate changes to the rasterization code,
simply subdivide triangles into smaller subtriangles to avoid the issue.
Only do this when the drawing surface is larger than 2048 by 2048.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Thu, 28 Mar 2013 23:06:35 +0000 (17:06 -0600)]
mesa: remove platform checks around __builtin_ffs, __builtin_ffsll
Use the __builtin_ffs, __builtin_ffsll functions whenever we have GCC,
not just for specific platforms. Fixes Solaris build.
Note: This is a candidate for the stable branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62868
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Mon, 25 Mar 2013 19:15:37 +0000 (13:15 -0600)]
docs: add a new page documenting known application issues
Let's try to update this when we find other broken applications...
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Sat, 30 Mar 2013 00:29:52 +0000 (18:29 -0600)]
drirc: set always_have_depth_buffer for Topogon
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Adam Jackson [Mon, 1 Apr 2013 13:45:38 +0000 (09:45 -0400)]
gallivm: Minor comment cleanup
Signed-off-by: Adam Jackson <ajax@redhat.com>
Dave Airlie [Mon, 1 Apr 2013 09:53:55 +0000 (19:53 +1000)]
mesa: fix texture storage multisample prototypes harder.
I just noticed the warnings since I fixed the other bit.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Vincent Lejeune [Sun, 31 Mar 2013 19:37:20 +0000 (21:37 +0200)]
r600g/llvm: Update LLVM_REVISION
Vincent Lejeune [Mon, 25 Mar 2013 23:47:08 +0000 (00:47 +0100)]
r600g/llvm: use native encode for tex
Dave Airlie [Sun, 31 Mar 2013 10:41:28 +0000 (20:41 +1000)]
glapi: fix storage multisample build errors
Reported on #radeon by udovdh
Signed-off-by: Dave Airlie <airlied@redhat.com>
Chris Forbes [Sat, 16 Mar 2013 04:02:58 +0000 (17:02 +1300)]
docs: mark ARB_texture_storage_multisample done
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Sat, 16 Feb 2013 09:09:38 +0000 (22:09 +1300)]
i965: enable ARB_texture_storage_multisample on Gen6+
This can be enabled everywhere that ARB_texture_multisample is
supported -- ARB_texture_storage is supported on everything.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Fri, 15 Mar 2013 09:52:12 +0000 (22:52 +1300)]
mesa: allow multisample texture targets in [Get]TexParameter*
ARB_texture_storage_multisample allows texture parameters to be
queried for TEXTURE_2D_MULTISAMPLE and TEXTURE_2D_MULTISAMPLE_ARRAY
targets.
Some parameters may also be set, with the following exceptions:
- TEXTURE_BASE_LEVEL may not be set to a nonzero value; generates
INVALID_OPERATION
- any state which appears in the `per-sampler` state table may not
be set; generates INVALID_OPERATION
V2: Don't introduce bogus handling of TEXTURE_MAX_LEVEL
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Sat, 16 Mar 2013 04:00:05 +0000 (17:00 +1300)]
mesa: improve reported function name in Tex*Multisample
Now that there are 4 variants, just pass the function name into
teximagemultisample rather than reconstructing it.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Sat, 16 Feb 2013 09:34:22 +0000 (22:34 +1300)]
mesa: add enable bit for ARB_texture_storage_multisample
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Sat, 16 Feb 2013 09:02:00 +0000 (22:02 +1300)]
glapi: add definition of ARB_texture_storage_multisample
Adds XML for the extension, dispatch_sanity enabling, and the two new
entrypoints. These are both implemented by calling the shared
teximagemultisample() with immutable=GL_TRUE.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Sat, 16 Feb 2013 08:38:20 +0000 (21:38 +1300)]
mesa: add support for immutable textures to teximagemultisample()
The new entrypoints will come later, but this adds the actual logic for
supporting immutable multisample textures:
- The immutability flag is set as desired.
- Attempting to modify an immutable multisample texture produces
INVALID_OPERATION.
Note: The extension spec does not mention adding this behavior to
TexImage*Multisample, but it seems like the reasonable thing to do.
V2: - Cover missing error cases (unsized formats; texture object zero)
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
[V1] Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Brian Paul <brianp@vmware.com>
Chris Forbes [Fri, 22 Mar 2013 06:58:03 +0000 (19:58 +1300)]
mesa: extract _mesa_is_legal_tex_storage_format helper
This is about to be used in teximagemultisample() when immutable=true.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Brian Paul <brianp@vmware.com>
Kenneth Graunke [Thu, 21 Mar 2013 17:57:08 +0000 (10:57 -0700)]
mesa: Delete VERT_ATTRIB_GENERIC_NV and VERT_BIT_GENERIC_NV macros.
These haven't been used since we deleted NV_vertex_program support.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Fri, 29 Mar 2013 07:26:07 +0000 (00:26 -0700)]
i965: Fix an inconsistency inb the VUE map with gl_ClipVertex on gen4/5.
We are intentionally not allocating a slot for gl_ClipVertex. But by
leaving the bit set in the slots_valid, the fragment shader's computation
of where varyings are in urb entry coming out of the SF would be off by
one. Fixes rendering in Freespace 2 SCP, and improves rendering in TF2.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62830
Tested-by: Joaquín Ignacio Aramendía <samsagax@gmail.com>
NOTE: This is a candidate for the 9.1 branch.
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Eric Anholt [Thu, 28 Mar 2013 22:58:25 +0000 (15:58 -0700)]
intel: Remove a never-taken debug print path.
Alessandro Pignotti noted when I added this code in commit
0e723b135bfd59868c92c3ae243f1adaedaec3a5 that it's in the else block for
"if (busy)", so this debug print couldn't happen.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Fri, 29 Mar 2013 23:21:33 +0000 (17:21 -0600)]
st/mesa: add ir_lod case in GLSL->TGSI code to silence warning
Ian Romanick [Sat, 23 Mar 2013 01:55:49 +0000 (18:55 -0700)]
glsl: Generated masked write instead of vector array index for UBO lowering
When reading a column from a row-major matrix, we would slot the single
value read into the vector using an ir_dereference_array of the vector
with a constant index. This will (eventually) get optimized to a
masked-write, so just generate the masked write in the first place.
v2: Remove unused variable 'chan'. Suggested by Ken.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Eric Anholt <eric@anholt.net>
Ian Romanick [Mon, 25 Mar 2013 21:40:53 +0000 (14:40 -0700)]
glsl: Replace open-coded dot-product with dot
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Paul Berry <stereotype441@gmail.com>
Ian Romanick [Sat, 16 Mar 2013 01:05:55 +0000 (18:05 -0700)]
glsl: Replace constant-index vector array accesses with swizzles
Search and replace:
][0] -> ].x
][1] -> ].y
][2] -> ].z
][3] -> ].w
Fixes piglit tests inverse-mat[234].{vert,frag}. These tests call the
inverse function with constant parameters and expect proper constant
folding to happen. My suspicion is that this patch papers over some bug
in constant propagation involving array accesses.
Either way, all of these accesses eventually get lowered to swizzles.
This cuts out the middle man (saving a trivial amount of CPU).
NOTE: This is a candidate for the 9.1 branch.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: Eric Anholt <eric@anholt.net>
Cc: Paul Berry <stereotype441@gmail.com>
Ian Romanick [Fri, 15 Mar 2013 23:47:46 +0000 (16:47 -0700)]
glsl: Add missing bool case in glsl_type::get_scalar_type
Since the case was missing bec4->get_scalar_type() would return bvec4,
but vec4->get_scalar_type() would return float.
NOTE: This is a candidate for stable branches.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Thu, 28 Mar 2013 06:19:39 +0000 (23:19 -0700)]
i965: Fix INTEL_DEBUG=shader_time for fragment shaders with discards.
"discard" instructions generate HALT instructions which jump to a final
HALT near the end of the shader. Previously, fs_generator created this
final jump target when it saw the first FS_OPCODE_FB_WRITE, causing it
to jump right before the FB write epilogue. This is normally good.
However, INTEL_DEBUG=shader_time also has an epilogue section which
records the final timestamp. The frontend emits IR for this just before
FS_OPCODE_FB_WRITE. Unfortunately, this led to the following ordering:
1. Shader Time Epilogue
2. Final HALT (where discards jump)
3. Framebuffer Write Epilogue
This meant that discarded pixels completely skipped the shader time
epilogue, causing no ending timestamp to be written. This obviously
led to inaccurate results.
This patch adds a new FS_OPCODE_PLACEHOLDER_HALT in the IR stream just
before any epilogue sections. This is where the final HALT should be
generated, and makes it easy to ensure the correct ordering:
1. Final HALT
2. Shader Time Epilogue
3. Framebuffer Write Epilogue
For shaders that don't discard, this opcode compiles away to nothing.
The scheduler adds barrier dependencies to make sure that it doesn't
get moved above any FS_OPCODE_DISCARD_JUMP instructions.
One 8-wide shader in GLBenchmark 2.7 dropped from 2291.67 Gcycles to
a mere 5.13 Gcycles.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Tue, 12 Mar 2013 00:36:54 +0000 (17:36 -0700)]
i965: Add names for all instructions to dump_instruction() in FS and VS.
I'd previously added the minimum names to understand my dumps, but this
makes dumps in general much easier to read.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 6 Mar 2013 22:54:27 +0000 (14:54 -0800)]
i965: Enable ARB_texture_query_lod.
v2: Support Ironlake as well.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Wed, 6 Mar 2013 22:47:01 +0000 (14:47 -0800)]
i965/fs: Generate LOD sampler message from ir_lod.
v2: Support Ironlake as well.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Dave Airlie [Sun, 23 Sep 2012 09:50:41 +0000 (19:50 +1000)]
glsl: Implement ARB_texture_query_lod
v2 [mattst88]:
- Rebase.
- #define GL_ARB_texture_query_lod to 1.
- Remove comma after ir_lod in ir.h for MSVC.
- Handled ir_lod in ir_hv_accept.cpp, ir_rvalue_visitor.cpp,
opt_tree_grafting.cpp.
- Rename textureQueryLOD to textureQueryLod, see
https://www.khronos.org/bugzilla/show_bug.cgi?id=821
- Fix ir_reader of (lod ...).
v3 [mattst88]:
- Rename textureQueryLod to textureQueryLOD, pending resolution of
Khronos 821.
- Add ir_lod case to ir_to_mesa.cpp.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 28 Mar 2013 18:38:57 +0000 (11:38 -0700)]
i965/fs: Use measured Gen7 instruction timings on Gen6.
x before
+ after
+------------------------------------------------------------------------------+
| x x + |
| xx ++ x + |
| xx ++ + xx ++ |
|x xxx x+++++ + xxx x*x+*+++ + x +|
| |_____|____________A______A____M____M_|_______| |
+------------------------------------------------------------------------------+
N Min Max Median Avg Stddev
x 23 8083.78 8287.83 8205.55 8162.7461 68.307951
+ 23 8107.56 8358.74 8224.33 8186.1765 71.506301
No difference proven at 95.0% confidence
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Thu, 28 Mar 2013 18:15:20 +0000 (11:15 -0700)]
i965/fs: Increase and document MAD latency on Gen7.
58% of mad(8) generated in shader-db are reading registers from the same
bank.
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Thu, 28 Mar 2013 17:57:34 +0000 (10:57 -0700)]
i965/fs: Add LRP instruction latency.
Set its latency to what happens to be the default floating-point
instruction latency. One day we may want to handle latency based on
register bank information.
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Fri, 1 Mar 2013 00:42:51 +0000 (16:42 -0800)]
i965/fs: Add Haswell cycle timings
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Thu, 28 Mar 2013 17:46:17 +0000 (10:46 -0700)]
i965: Note that write-after-write dependencies are blocking.
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Thu, 28 Mar 2013 17:45:34 +0000 (10:45 -0700)]
i965: Reword comment about the shared mathbox.
Reviewed-by: Eric Anholt <eric@anholt.net>
Roland Scheidegger [Fri, 29 Mar 2013 05:16:33 +0000 (06:16 +0100)]
gallivm: consolidate some half-to-float and r11g11b10-to-float code
Similar enough that we can try to use shared code.
v2: fix a stupid bug using wrong variable causing mayhem with Inf and NaNs.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com
Chris Forbes [Fri, 29 Mar 2013 03:22:09 +0000 (16:22 +1300)]
mesa: provide default implementation of QuerySamplesForFormat
Previously at least i915 failed to provide an implementation, but
exposed ARB_internalformat_query anyway, leading to crashes when
QueryInternalformativ was called.
Default implementation just returns 1 for everything, so is suitable for
any driver which does not support multisampling.
V2: - Move from intel to core mesa.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Christoph Bumiller [Wed, 27 Mar 2013 22:39:06 +0000 (23:39 +0100)]
nvc0: implement MP performance counters
There's more, but this only adds (most) of the counters that are
handled directly by the shader processors.
The other counter domains are not handled on the multiprocessor and
there are no FIFO object methods for configuring them.
Instead, they have to be programmed by the kernel via PCOUNTER, and
the interface for this isn't in place yet.
Christoph Bumiller [Thu, 21 Mar 2013 18:26:01 +0000 (19:26 +0100)]
nvc0: enable compression when supported
Christoph Bumiller [Wed, 27 Mar 2013 22:38:29 +0000 (23:38 +0100)]
nvc0: use NOUVEAU_GETPARAM_GRAPH_UNITS to get MP count
Christoph Bumiller [Fri, 22 Mar 2013 12:49:40 +0000 (13:49 +0100)]
nv50,nvc0: fix 3d blits, restore viewport after blit
Christoph Bumiller [Mon, 25 Mar 2013 18:41:18 +0000 (19:41 +0100)]
nv50: fix 3D render target setup
Brian Paul [Thu, 28 Mar 2013 23:17:26 +0000 (17:17 -0600)]
llvmpipe: put .bmp extension on dumped image files
Brian Paul [Thu, 28 Mar 2013 23:17:26 +0000 (17:17 -0600)]
llvmpipe: add 'f' suffix to 1.0 in fixed_to_float()
Brian Paul [Thu, 28 Mar 2013 23:03:57 +0000 (17:03 -0600)]
draw: fix some build breakage when LLVM is not used
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62883
Tested-by: Vinson Lee <vlee@freedesktop.org>
Marek Olšák [Thu, 28 Mar 2013 13:50:01 +0000 (14:50 +0100)]
mesa: handle STATE_CURRENT_ATTRIB_MAYBE_VP_CLAMPED for parameter printing
Reviewed-by: Brian Paul <brianp@vmware.com>
Kenneth Graunke [Thu, 28 Mar 2013 07:18:46 +0000 (00:18 -0700)]
i965: Tidy shader time printing code by using printf's field widths.
We can use %-6s%-6s rather than manually counting characters, resulting
in much more readable code.
This necessitates a small secondary change: using "total fs16" and ""
now causes the "" string to be padded out to 6 characters, resulting in
too much whitespace. Splitting it into "total" and "fs16" produces the
same output as before.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 19 Mar 2013 23:28:54 +0000 (16:28 -0700)]
i965/vs: Include URB payload setup in shader_time.
This much more accurately reflects the cost of the vertex shader, since
the payload setup is often a significant fraction of the instructions in
the VS.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 18 Dec 2012 01:11:21 +0000 (17:11 -0800)]
i965/vs: Use a send from a 2-register VGRF for shader time writes.
This will let us emit it later, after we're setting up MRFs for the
URB write.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 18 Dec 2012 01:03:02 +0000 (17:03 -0800)]
i965/vs: Teach copy propagation about sends from GRFs.
This incidentally also teaches it a bit about gen6 math -- we now allow
unswizzled, unmodified GRF temps as the sources for math.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 18 Dec 2012 00:48:20 +0000 (16:48 -0800)]
i965/vs: Prepare split_virtual_grfs() for the presence of SENDs from GRFs.
v2: Fix silly bool handling, and don't add new tabs.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 19 Mar 2013 22:14:20 +0000 (15:14 -0700)]
i965/fs: Include everything but the final FB write in shader_time.
Previously, if you just wrote a constant color to the render target, no
time got noted at all. This is convenient for doing single-instruction
timings, but not so much for actual program analysis.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 19 Mar 2013 22:28:11 +0000 (15:28 -0700)]
i965/fs: Switch shader_time writes to using GRFs.
This avoids conflicts between shader_time and FB writes, so we can include
more of the program under our profiling. This does mean hiding more of
the message setup from the optimizer, which doesn't have a way to handle
multi-reg sends from GRFs.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 19 Mar 2013 21:28:29 +0000 (14:28 -0700)]
i965: Provide more detailed information to match shader_time to programs.
Ken asked me the other day what -1 vs 0 vs 3 vs other meant in our shader
names, and I realized that it was really unclear. I'd like to do even
better, like noting which one is the clear shader, but that would require
exposing the metaops struct to the driver.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Tue, 19 Mar 2013 21:27:42 +0000 (14:27 -0700)]
i965: Track ARB program state along with GLSL state for shader_time.
This will let us do much better printouts for non-GLSL programs.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Marek Olšák [Wed, 27 Mar 2013 00:56:25 +0000 (01:56 +0100)]
st/dri: fix crash with HUD and single buffering
Marek Olšák [Thu, 28 Mar 2013 13:51:28 +0000 (14:51 +0100)]
st/mesa: remove leftover printfs from ReadPixels
Oops, I thought I had removed all debugging code.
Eric Anholt [Fri, 22 Mar 2013 21:11:25 +0000 (14:11 -0700)]
i965/fs: Improve performance of copy propagation dataflow using bitsets.
Reduces compile time of l4d2's slowest shader by 17.8% +/- 1.3% (n=10).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Zack Rusin [Wed, 27 Mar 2013 00:53:27 +0000 (17:53 -0700)]
llvmpipe/draw: Fix texture sampling in geometry shaders
We weren't correctly propagating the samplers and sampler views
when they were related to geometry shaders.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Zack Rusin [Tue, 26 Mar 2013 19:35:45 +0000 (12:35 -0700)]
draw/llvm: Cleanup the store debugging code
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Zack Rusin [Tue, 26 Mar 2013 19:32:30 +0000 (12:32 -0700)]
draw: Allocate the output buffer for output primitives
We were allocating the output buffer but using the input
primitives. We need to allocate that buffer using the
maximum number of output, not input, primitives.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Zack Rusin [Wed, 27 Mar 2013 09:38:32 +0000 (02:38 -0700)]
gallivm: Implement the breakc instruction
Required by more modern examples. Like BRK but with a condition.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>