swr: [rasterizer core/sim] 8x2 backend + 16-wide tile clear/load/store

Work in progress (disabled).

USE_8x2_TILE_BACKEND define in knobs.h enables AVX512 code paths
(emulated on non-AVX512 HW).

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer archrast] fix event file issue with saving data

Also, tagging stats with draw id to correlate these events with
draw/dispatch events.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer common] fix assert index

Fixes: b3bd8bb611bb465d2e5e ("swr: [rasterizer core] add support
       for "RAW" surface format")
CovID: 1373647
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>

docs: mark GL 4.4/4.5 extension groups as DONE for nvc0

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: enable ARB_enhanced_layouts

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0/ir: be more careful about preserving modifiers in SHLADD creation

src2 was being given the wrong modifier, and we were not properly
managing the modifier on the SHL source either.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

mesa: fix indentation in vertex_attrib_binding()

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

mesa: add sanity check assertion in update_array_format

At most, one of the normalized, integer, doubles bools can be true.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

mesa: remove needless cast in update_array()

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

mesa: simplify update_array() with a vao local var

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

vbo: simplify some code in check_draw_elements_data()

Use the 'vao' local var in more places.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

mesa: rename gl_vertex_attrib_array gl_array_attributes

The structure contains the attributes of a vertex array.  The old name
was kind of confusing.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

mesa: rename gl_vertex_attrib_array::VertexBinding

Rename to gl_vertex_attrib_array::BufferBindingIndex because this field
is an index into the array of buffer binding points.  This makes some
code a little easier to follow since there's also a "VertexBinding" field
in gl_vertex_array_object.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

mesa: rename some vars in arrayobj.c

Use 'vao' instead of 'obj' to be consistent with other code.
Plus, add a comment.

Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>

tgsi: fix comment typo in tgsi_ureg.c

Trivial.

mesa: replace gl_framebuffer::_IntegerColor wih _IntegerBuffers

Use a bitmask to indicate which color buffers are integer-valued, rather
than a bool.  Also, the old field was mis-computed.  If an integer buffer
was followed by a non-integer buffer, the _IntegerColor field was wrongly
set to false.

This fixes the new piglit gl-3.1-mixed-int-float-fbo test.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: remove 'params' parameter from ctx->Driver.TexParameter()

None of the drivers which implement this hook do anything with the
texture parameter value.  Drivers just look at the pname and set a
dirty flag if needed.

We were doing some ugly casting and type conversion to setup the
argument so that all goes away.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

vc4: Avoid loading from the texture during non-utile-aligned glTexImage().

Previously, the plan was "if the width/height we have to load/store isn't
the size the user is planning on writing, then we need to load the old
contents out beforehand to prevent writing back undefined".

However, when we're doing glTexImage() we often end up aligning the
width/height into the padding of the texture, and we don't actually
need to read out that padding.

Improves x11perf -aatrapezoid100 performance from ~460/sec to
~700/sec.

st/nine: Fix possible segfault in surface ctor

Regression introduced by
ba0274c7d6c3b77a36bbe1b444f427b0c873e2f3

Check the resource exists before assigning it
a flag (and use This->base.resource instead
of pResource, since the former may have a newly
allocate resource, while the latter would be
NULL).

This should reintroduce the behaviour of previous
code.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Remove useless code in nine_shader

Since 1604efa6fda9b780e8537a131ad77f3e83e5a67a,
lconsti and lconstb don't need to be initialized.

Remove some leftovers from the previous code (which
has now invalid use of ARRAY_SIZE on a pointer instead
of an array).

Reported by Coverity.

Signed-off-by: Axel Davy <axel.davy@ens.fr>

gallium/os: Use unsigned integers for size computation

Use uint64_t instead of int64_t in the calculation,
as the result is uint64_t.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

nvc0: enable ARB_enhanced_layouts

All ARB_enhanced_layouts piglit tests pass without any changes
in our compiler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

radv: fix the wayland wsi busy bit

Signed-off-by: Dave Airlie <airlied@redhat.com>

anv: fix the wayland wsi busy flag setting

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: Use new image load/store intrinsic signatures v2

These were changed in LLVM r284024.

v2:
  - Only use float types for vdata of llvm.amdgcn.image.store.  LLVM doesn't
    support integer types for this intrinsic.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: Fix incorrect comment

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: fix identity swizzle handling

The identity swizzle should operate exactly
like an .r = R, .g = G, .b = B, .a = A swizzle.

This fixes a bunch of the 16-bit BGRA blit tests
dEQP-VK.api.copy_and_blit.blit_image.all_formats.b4g4r4a4*

Signed-off-by: Dave Airlie <airlied@redhat.com>

anv/wsi: fix apps that acquire multiple images up front

This fix was found in the radv codebase when running dota2,
no idea if anyone has reported it on anv, but the same problem
occurs.

Once an image is acquired we need to mark it busy.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/wsi: fix app that acquire multiple images up front

dota2 does multiple acquires followed by multiple queues,
this bug manifested itself as a hang in the xshmfence code
randomly when dota2 was doing it's menus. It also occured
when running dota2 under phoronix-test-suite.

The fix is once the image is acquired to mark it busy then
so nobody else can acquire. We have to trust vulkan apps
that they will eventually submit it.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

anv: initialise and increment send_sbc

At least set this to not be uninitialised memory.

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeonsi: adjust and clean up Z_ORDER and EXEC_ON_x settings

The table was copied from the Vulkan driver. The comment lines are as long
as the table for cosmetic reasons.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: disable ReZ

This is a serious performance fix. Discovered by luck.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94354

Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: implement TC-compatible HTILE

so that decompress blits aren't needed and depth texturing needs less
memory bandwidth.

Z16 and Z24 are promoted to Z32_FLOAT by the driver, because TC-compatible
HTILE only supports Z32_FLOAT. This doubles memory footprint for Z16.
The format promotion is not visible to state trackers.

This is part of TC-compatible renderbuffer compression, which has 3 parts:
DCC, HTILE, FMASK. Only TC-compatible FMASK compression is missing now.

I don't see a measurable increase in performance though.

(I tested Talos Principle and DiRT: Showdown, the latter is improved by
 0.5%, which is almost noise, and it originally used layered Z16,
 so at least we know that Z16 promoted to Z32F isn't slower now)

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium: add PIPE_RESOURCE_FLAG_TEXTURING_MORE_LIKELY

For performance tuning in drivers. It filters out window system
framebuffers and OpenGL renderbuffers.

radeonsi will use this to guess whether a depth buffer will be read
by a shader. There is no guarantee about what will actually happen.

This is a departure from PIPE_BIND flags which are defined to be strict
but they are useless in practice.

Acked-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: fix regression in image atomics

Caused by a bad rebase when pushing commit 76a940893.

st/mesa: fix vertex elements setup for doubles

Whether one or two slots are taken up by one API array depends on the
vertex shader, not on how the array is configured. When an array is
set up with fewer components than the shader expects, the high components
are undefined.

Fixes GL45-CTS.vertex_attrib_binding.basic-inputL-case1.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: remove unnecessary ir_instruction argument from get_opcode

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: fix textureGatherOffset with indirectly loaded offsets

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: simplify translate_tex_offset

This fixes a bug with offsets from uniforms which seems to have only been
noticed as a crash in piglit's
arb_gpu_shader5/compiler/builtin-functions/fs-gatherOffset-uniform-offset.frag
on radeonsi.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radeonsi: fix the coordinate overloading of llvm.amdgcn.image.atomic.cmpswap.*

Fixes GL45-CTS.shader_image_load_store.basic-allTargets-atomic*

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radv: Return correct result in EnumeratePhysicalDevices

If pPhysicalDevices is too small for all physical devices,
the driver must return VK_INCOMPLETE. Since only a single
physical device is supported, this is only the case when
pPhysicalDeviceCount == 0 && pPhysicalDevices != NULL.

Signed-off-by: Dave Airlie <airlied@redhat.com>

st/mesa: only flip stipple pattern for winsys fbo's

Gallium is completely oblivious to whether the fbo is flipped or not.
Only flip the stipple pattern when the fbo is flipped as well. Otherwise
the driver has no idea when to unflip the pattern.

Fixes bin/gl-2.1-polygon-stipple-fs -fbo

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

swr: automake: add ar_eventhandlerfile_h.template to the tarball

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

radv: add all headers to the sources list

Otherwise they'll be missing from the tarball and the build will fail.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

nvc0/ir: fix textureGather with a single offset

Recent fix for non-const offsets broke the case of a single offset (vs 4
offsets). The later code relies on the offs array to contain null values
to tell whether they should be added onto the srcs list.

Fixes: 5239bd592 ("nvc0/ir: fix overwriting of value backing non-constant gather offset")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

nv50/ir: copy over value's register id when resolving merge of a phi

The offset needs to be properly copied over to the phi value, otherwise
it will get assigned to the base of the merge instead of the proper
location.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

st/mesa: enable ARB_enhanced_layouts and turn the cap on

v2: mark llvmpipe & softpipe properly as well (Jason Wood)

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: adjust swizzles and writemasks for explicit components

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: explicitly track all input and output declaration

In order to be able to emit overlapping input and output array
declarations, we flip the logic of emitting those declarations on its
head: rather than iterating over slots and emitting the corresponding
declarations, we iterate over the declarations from GLSL and emit those.

v2: fix some regressions related to structs
v3: fix a regression in geometry and tessellation shader array handling

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v2)
Reviewed-by: Dave Airlie <airlied@redhat.com> (v2)

st/glsl_to_tgsi: mark "gaps" in input/output arrays as used

In some cases, a shader may have an input/output array but not use some
entries in the middle. This happens with eON games, for example.

We emit declarations that cover the entire array range even if there are
some unused gaps. This patch now reflects that in the InputsRead etc.
fields to ensure the various input/outputMapping arrays are actually
correct, which will be important when we re-jiggle the way declarations
are emitted.

v2: fix a typo (Edward O'Callaghan)

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: disable on-the-fly peephole for 64-bit operations

This optimization is incorrect with 64-bit operations, because the
channel-splitting logic in emit_asm ends up being applied twice to
the source operands.

A lucky coincidence of how the writemask test works resulted in this
optimization basically never being applied anyway. As far as I can tell,
the only case where it would (incorrectly) have been applied is something
like

    dvec2 d;
    float x = (float)d.y;

which nobody seems to have ever done. But the moral equivalent does occur
in one of the component layout piglit test.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: simpler fixup of empty writemasks

Empty writemasks mean "copy everything", so we can always just use the number
of vector elements (which uses the GLSL meaning here, i.e. each double is a
single element/writemask bit).

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

st/glsl_to_tgsi: explicit handling of writemask for depth/stencil export

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

glsl: dump explicit location when printing IR

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

tgsi/ureg: add ureg_DECL_output_layout

For specifying an exact location/component.

v2: change the order of parameters (Dave)

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1)
Reviewed-by: Dave Airlie <airlied@redhat.com> (v1)

tgsi/ureg: add layout/component input declarations

v2: change the order of parameters (Dave)

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1)
Reviewed-by: Dave Airlie <airlied@redhat.com> (v1)

tgsi/scan: fix num_inputs/num_outputs for shaders with overlapping arrays

v2: remove a tautological left-over assert (Marek)

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1)
Reviewed-by: Dave Airlie <airlied@redhat.com> (v1)

gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTS

This is a screen cap because drivers are expected to support it either
for all shader types or for none of them.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radeonsi: Use the new image load/store intrinsic signatures

This patch requires LLVM r284024 or newer.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: Add function for converting LLVM type to intrinsic string

The existing function only worked for integer types.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: Refactor image store/load intrinsic name creation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/amdgpu: fix infinite loop w/ RADEON_NOOP=1 caused by unsubmitted fences

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: fix R600_DEBUG=precompile for shader-db

radeonsi no longer supports pixel shaders without interpolation optimizations,
which led to assertion failures in si_shader_ps when running shader-db.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: use TC write-back instead of full cache invalidation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: implement TC L2 write-back (flush) without cache invalidation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: don't invalidate VMEM L1 for memory barriers for index buffers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

nv50/ir: optimize ADD(SHL(a, b), c) to SHLADD(a, b, c)

total instructions in shared programs :2286901 -> 2284473 (-0.11%)
total gprs used in shared programs    :335256 -> 335273 (0.01%)
total local used in shared programs   :31968 -> 31968 (0.00%)

                local        gpr       inst      bytes
    helped           0          41         852         852
      hurt           0          44          23          23

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

mapi: fix out-of-tree build dependencies

We shouldn't be using wildcard here in the first place, but changing that
is some effort. As it stands, make -p confirms that glapi_gen_mapi_deps only
contains mapi_abi.py when building outside the Mesa tree.

As a result, only some of the tables were updated when XML files change, but
not the tables for shared glapi. This change ensures that we pick up the
XML files and scripts from the source tree as dependencies also for shared
glapi.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

draw: initialize shader inputs

This should make the code more robust if a shader tries to use inputs which
aren't defined by the vertex element layout (which usually shouldn't happen).

No piglit change.

Reviewed-by: Brian Paul <brianp@vmware.com>

radv: trivial case stmt style fixups

Relocate a 'default:' to the end of a case stmt and fix an
indent issue.

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>

anv: Return correct result in EnumeratePhysicalDevices

If pPhysicalDevices is too small for all physical devices,
the driver must return VK_INCOMPLETE.
Since only a single physical device is supported, this is only the case
when pPhysicalDeviceCount == 0 && pPhysicalDevices != NULL.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Allow vp_info to be NULL in 3DSTATE_CLIP code.

pViewportState may be NULL if rasterization is disabled.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Fix anv_pipeline_validate_create_info assertions.

Many of these can be "NULL if the pipeline has rasterization disabled."
Also, we should assert that pMultisampleState exists.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

trace: add invalidate_resource callback

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radv/winsys: Fix radv_amdgpu_cs_grow min_size argument. (v2)

It's supposed to be how much at least we want to grow the cs, not the
minimum size of the cs after growth.

v2: Unbreak use_ib_bos.
    Don't mask the ib_size when !use_ib_bos, since it's not needed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: fix strict aliasing violation

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: fix uninitialized variables

This gets rid of "may be used uninitialized" compiler warnings.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: add missing unreachable

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: remove the validation layer and some related bits.

As pointed out by Emil this isn't used in anv anymore,
and it was totally unused in radv anyways.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: drop entrypoint split out.

radv really doesn't need different dispatch per gen yet,
there really isn't that many differences yet.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: drop the RADV_CALL macro.

This is leftover from anv, and we really never needed it.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: check driver name before calling amdgpu.

This checks the kernel driver name is amdgpu before calling
libdrm_amdgpu.

This avoids the following error:
amdgpu_device_initialize: DRM version is 1.6.0 but this driver is only compatible with 3.x.x

when run on a machine with i915 graphics as well as amdgpu.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: fix memory leak from physical device if wsi fails

Inspired by patch from Edward O'Callaghan <funfunctor@folklore1984.net>
which didn't do it right.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/winsys: Fix mem leak at failed do_winsys_init() call site

Probably unlikely however ensure we don't leak a heap allocation
on the fail path.

V.2:
 also fix missing 'amdgpu_device_deinitialize()' calls (Emil Velikov).

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/winsys: Trivial style and readability fixups

Drop/add a few newlines where appropriate and drop a couple of
unnessary braces.

Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radeonsi: emit TA_CS_BC_BASE_ADDR on SI only if the kernel allows it

Reviewed-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

swr: [rasterizer archrast] update proto file

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer archrast] add support for stats files

Only stat and counter events are saved to the event files.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer jitter] remove architecture override

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer jitter] adjust jitmanager assert

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer] eliminate unused label warnings on gcc

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer core] implement depth bounds test

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer core] update/add formats

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer core] SwrStoreTiles api change

SwrStoreTiles now takes a mask of surfaces to store.  Reduces
overhead when storing multiple render targets.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer scripts] add ENABLE_ASSERT_DIALOGS knob for windows

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer archrast] add mako template

Add template for generating code to save events to a file.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer core] disable cull for rect_list

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer core] add support for "RAW" surface format

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer core] align Macrotile FIFO memory to SIMD size

Align and use streaming store instructions for BE fifo queues.
Provides slightly faster enqueue and doesn't pollute the caches.
Add appropriate memory fences to ensure streaming writes are
globally visible.

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>

swr: [rasterizer common] remove threadviz code

Signed-off-by: Tim Rowley <timothy.o.rowley@intel.com>