radv: Unset vk_info in radv_image_create_layout.

For better test coverage of this corner case.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Handle slightly different image dimensions.

The minigbm comment really says it all. We should
fix minigbm as well, but for now this is the more
robust solution.

Note that this only changes width and height for
the surface creation, not for the image and hence
also not for the sampler, where it would wreak
havoc due to the normalized coords.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Delay patching for imported images until layout time.

We want this flexibility because in GFX10 we lose any stride fields,
so we have to make sure our width/height are in alignment with
the external image we import.

Furthermore, we need the ability to inject tiling modifiers on import
time which is strictly after create time for Android. So, with the
layout & patch functions being fully independent of pCreateInfo, we
can delay it until import/bind time.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Split out layout code from image creation.

So we can delay the layout until later in some import cases.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Handle device memory alloc failure with normal free.

Less duplication/complexity.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Cleanup buffer_from_fd.

Unused stride/offset args.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

gitlab-ci/lava: Test Lima driver with dEQP

Run dEQP on boards with Mali 400 and 450 in Baylibre's lab.

There's lots of skipped tests because of crashes and undetermined
behavior. May be a good idea to run the tests with valgrind and fix any
issues found.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

gitlab-ci/lava: Use files to list tests to skip

As the non-LAVA runner script does, have per-GPU version files listing
the tests that are to be skipped, due to being very slow, unstable, etc.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

intel/tools: Support multiple contexts in intel_dump_gpu.

Create basic aub_context on GEM_CONTEXT_CREATE.

Set it up and submit a context + ring + pphwsp during execbuf
submission, if it has not been initialized yet.

v2: Write the HWSP only once per engine (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/tools: Add basic aub_context code and helpers.

v2:
 - Only dump context if there were no erros (Lionel).
 - Store counter for context handles in aub_file (Lionel).
v3:
 - Add a comment about aub_context -> GEM context (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/tools: Use common code for GGTT address allocation.

We want to be able to create contexts on demand, and increase the GGTT
as needed for that. Use the aub_map_ggtt() function for that.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/tools: Factor out GGTT allocation.

We want to reuse it in execlists_setup().

v2: Rename it to write_ggtt_ptes() (Lionel).
v3: Rename it to aub_map_ggtt() (Lionel).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

radv: Implement & enable VK_EXT_texel_buffer_alignment.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: use a compute shader for copying timestamp query results

When the timestamp is not ready (ie. UINT64_MAX), the availabily bit
should be zero. The previous code used to copy the timestamp value
as the availabily bit and that's completely wrong.

Because it's not that simple to emit a conditional with the CP, the
driver now uses a compute shader for copying timestamp query results.

Fixes dEQP-VK.pipeline.timestamp.misc_tests.reset_query_before_copy.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: sync before resetting query pools if timestamps have been written

Otherwise, the GPU might write timestamp queries after the reset
operation. This is similar to other query operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

aco: Clean up usages of PhysReg::reg from aco_assembler.

These are not needed anymore, since PhyReg has an implicit
conversion operator that can convert it to unsigned int,
which is equivalent to accessing this field.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Add extra assertion for number of FS input VGPRs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Fix s_dcache_wb on GFX10.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Have s_waitcnt_vscnt write to NULL.

Not sure if this instruction actually writes anything, but LLVM
disassembles a destination and sets it to NULL.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Use the VOP3-only add/sub GFX10 instructions if needed.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Initial work to avoid GFX10 hazards.

Currently just breaks up SMEM groups and fixes
FeatureVMEMtoScalarWriteHazard (name from LLVM).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: pad code with s_code_end on GFX10

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: workaround GFX10 0x3f branch bug

According to LLVM, branches with an offset of 0x3f are buggy.

v2: (by Timur Kristóf)
- extract the GFX10 specific part to its own function

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Fix VS input VGPRs on GFX10.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Assemble opsel in VOP3 instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Allow literals on VOP3 instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>

aco: Support subvector loops in aco_assembler.

These are currently not used, but could be useful later.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Set GFX10 dimensionality on the instructions that need it.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Use ac_get_sampler_dim, delete duplicate code.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Set GFX10 DLC bit properly.

The DLC bit is now set to 1 for all loads when GLC is also set,
but cleared to 0 for all stores (otherwise it causes issues),
and also cleared to 0 for atomics.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 VOP3 and VOP1 as VOP3 in aco_assembler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 EXP in aco_assembler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Fix GFX9 FLAT, SCRATCH, GLOBAL instructions, add GFX10 support.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 MIMG and GFX9 D16 in aco_assembler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 MTBUF in aco_assembler.

Also remove img_format from aco_ir, since it can be calculated
from dfmt and nfmt. So only the assember needs to deal with it.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Link ACO with amd/common.

We'd like to use some functions, for example some
ac_shader_util functions in ACO, so we need to link
ACO to AC.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

amd/common: Add extern "C" to some headers that were missing it.

We'd like to include some of these in C++ code later.
Specifically, ACO is written in C++ and we would like to use
some of this code in ACO in order to avoid code duplication.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 MUBUF in aco_assembler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 DS in aco_assembler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 VINTRP in aco_assembler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Support GFX10 SMEM in aco_assembler.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Add missing GFX10 specific fields and some README notes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: Set +wavefrontsize64 for LLVM disassembler in GFX10 wave64 mode.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

v3d: take into account prim_counts_offset

Specifically when reading the primitive counters.

This fixed ~700 CTS tests using this pattern:
dEQP-GLES3.functional.transform_feedback.*

when run after tests like
dEQP-GLES3.functional.prerequisite.read_pixels on the same
caselist. When run individually those tests were passing because
prim_counts_offset was zero.

Fixes: 0f2d1dfe65bfe1ee8f02ce45f100a5508debdfd4 ("v3d: use the GPU to
       record primitives written to transform feedback")

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

radv: get the device name from radeon_info::name

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

st/mesa: fix R8 bitmap texture for TGSI paths.

The initial patch only fixed up the NIR path, but forgot
the TGSI path needed fixing as well.

Fixes: f92226931b ("st/mesa: Prefer R8 for bitmap textures")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

anv/pipeline: Capture serialized NIR

This allows the serialized NIR to be displayed in RenderDoc and similar
tools.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

clover: Remove unused code

Fixes: 96b592696f1 ("gallium: Require LLVM >= 3.9")
Bug: https://bugs.gentoo.org/685678

clover: use iterator_range in get_kernel_nodes

With libc++ (LLVM's STL implementation), the original code does not compile because an
appropriate vector constructor cannot be found (for the _ForwardIterator one, requirement
is_constructible is not satisfied).

radeonsi: enable MSAA shader images

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: expand FMASK before MSAA image stores are used

Image stores don't use FMASK, so we have to turn it into identity.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: apply FMASK to MSAA image loads

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: clean up image_fetch_rsrc

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: add FMASK slots for shader images (for MSAA images)

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: set the sample index for shader images correctly

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: fix GLSL imageSamples()

We haven't supported MSAA images, so it doesn't matter much.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

tgsi/scan: add tgsi_shader_info::msaa_images_declared

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

nir: add shader_info::last_msaa_image

for radeonsi

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: don't set BO metadata for non-zero planes

pointed out by Bas

radeonsi: ignore metadata for non-zero planes

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi: remove si_vid_join_surfaces and use combined planar allocations

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi: allocate planar multimedia formats in 1 buffer

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

vl: use u_format in vl_video_buffer_formats

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

gallium/u_tests: test NV12 allocation and export

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

gallium/util: add planar format layouts and helpers

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

gallium/util: remove enum numbering from util_format_layout

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

i965: Disable fast clears when running with INTEL_DEBUG=nofc

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

iris: Disable fast clears when running with INTEL_DEBUG=nofc

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

anv: Disable fast clears when running with INTEL_DEBUG=nofc

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

intel: Add INTEL_DEBUG=nofc for disabling fast clears

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

llvmpipe: avoid left-shifting a negative number.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Maya Rashish <coypu@sdf.org>

egl: Include stddef.h in generated source

Required for NULL macro used throughout the generated file.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

util: fix to detect NetBSD properly

<sys/param.h> is required for NetBSD version detection,
and __NetBSD__ must be used to detect even on older releases.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

util: simplify BSD includes

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>

util: detect AltiVec at runtime on BSDs

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>

util: skip AltiVec detection if built with -maltivec

Helps platforms where runtime detection isn't implemented.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>

util: detect NEON at runtime on FreeBSD

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>

util: skip NEON detection if built with -mfpu=neon

Helps platforms where runtime detection isn't implemented.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>

egl: Make native display detection work more than once

eglGetDisplay is awful because you have to inspect the pointer you're
given and guess what type of native display it corresponds to. We make
it worse by caching the type of the first such display we detect, so if
the second call to eglGetDisplay is to a different display type, kaboom.

Fortunately this is a problem that can be solved with the delete key.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/156

aco: enable nir_opt_sink

SGPRS: 880272 -> 838936 (-4.70 %)
VGPRS: 705316 -> 680988 (-3.45 %)
Spilled SGPRs: 1032 -> 832 (-19.38 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 252 -> 252 (0.00 %) dwords per thread
Code Size: 55150788 -> 55172436 (0.04 %) bytes
LDS: 451 -> 451 (0.00 %) blocks
Max Waves: 66178 -> 68706 (3.82 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

nir/sink: Don't sink load_ubo to outside of its defining loop

Previously, this could have made the resource divergent in code like
that which is genereated by nir_lower_non_uniform_access.

Fixes: da8ed68a ('nir: replace nir_move_load_const() with nir_opt_sink()')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

nir/sink: Rewrite loop handling logic

Previously, for code like:
loop {
    loop {
        a = load_ubo()
    }
    use(a)
}
adjust_block_for_loops() would return the block before the first loop.
Now we compute the range of allowed blocks and then walk the dominance
tree directly, guaranteeing directly that we always choose a block that
dominates all the uses and is dominated by the definition.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

amd: don't use AMD_FAMILY definitions from amdgpu_drm.h

use the ones from addrlib

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

docs: update calendar, add news item, and link release notes for 19.2.1

docs: Add SHA256 sum for 19.2.1

docs: Add relnotes for 19.2.1

aco: move s_andn2_b64 instructions out of the p_discard_if

And use a new p_discard_early_exit instruction. This fixes some cases
where a definition having the same register as an operand causes issues.

v2: rename instruction to p_exit_early_if
v2: modify the existing instruction instead of creating a new one
v3: merge the "i == num - 1" IFs

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: don't reorder instructions in order to lower boolean phis

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

aco: re-use existing phi instruction when lowering boolean phis

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

aco: Cleanup insert_before_logical_end

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

lima/ppir: don't clone texture loads

Cloning texture loads isn't a good idea since we may move it into
a block that is not shared between all the invocations of the shader.
We'd like to avoid that since it may result in undefined behavior.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

gitlab-ci/lava: Add needs: for container image to test jobs

Without this, the test jobs could spuriously run after the container
job failed or was cancelled, even if the build job didn't run at all.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>

radv: bump minTexelBufferOffsetAlignment to 4

The spec has probably been misinterpreted during RADV bringup.

This fixes GPU hangs with dEQP-VK.binding_model.*offset_nonzero*.

Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

meta: leak of shader program when decompressing tex-images

CC: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>

mesa/main: prefer R8-textures instead of A8 for glBitmap in display lists

This allows drivers to communicate that they prefer R8 textures rather
than A8 for glBitmap usage.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: Prefer R8 for bitmap textures

If it's not available, we fall back to A8. This should work on all drivers,
because we depend on it in the display-list code already.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

drirc: enable vk_x11_override_min_image_count for DOOM

DOOM fails to handle more images than expected when the adaptative
sync mode is enabled.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1902
Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: implement VK_KHR_shader_clock

NIR->LLVM and ACO already support nir_intrinsic_shader_clock.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

iris: Implement the Broadwell NP Z PMA Stall Fix

This should help avoid stalls in the pixel mask array in certain
non-promoted depth cases.  It especially helps for Z16, as each bit
in the PMA corresponds to two pixels when using Z16, as opposed to
the usual one pixel.

Improves performance in GFXBench5 TRex by 22% (n=1).

docs: Update recently enabled VK extensions on Intel