meson: wire up selinux

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

wayland-egl: fix wayland cflags

Fixes: 80bfff5c4f1d4d8c842a0 "wayland-egl: adds CFLAGS for wayland.egl.h include"
Suggested-by: Daniel Stone <daniel@fooishbar.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>

vc4: fix release build

Mesa's DEBUG and assert's NDEBUG are not tied to each other, so we need
to explicitly compile this code out.

Fixes: 3df78928786134874eafa "vc4: Drop reloc_count tracking for debug
       asserts on non-debug builds."
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: unref push_const_bo in intelDestroyContext

Valgrind shows that leak is caused by gen6_upload_push_constant, add
unref push_const_bo per stage to destructor to fix this (like done for
scratch_bo).

   ==10952== 144 bytes in 1 blocks are definitely lost in loss record 44 of 66
   ==10952==    at 0x4C30A1E: calloc (vg_replace_malloc.c:711)
   ==10952==    by 0x8C02847: bo_alloc_internal.constprop.10 (brw_bufmgr.c:344)
   ==10952==    by 0x8C425C4: intel_upload_space (intel_upload.c:101)
   ==10952==    by 0x8C22ED0: gen6_upload_push_constants (gen6_constant_state.c:154)

v2: remove if conditions, brw_bo_unreference handles NULL (Ken, Emil)

Fixes: 24891d7c05 ("i965: Store per-stage push constant BO pointers.")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

i965: remove if conditions from scratch_bo unref

brw_bo_unreference handles NULL case

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

anv: Fix assert about source attrs.

Asserting slot >= 2 made sense when the URB read offset was always 1
(pair of slots).  Commit 566a0c43f0b9fbf5106161471dd5061c7275f761 made
it possible to read from the VUE header in slot 0, by adjusting the
offset to be 0.  So, this assert is now bogus.  Use the one from GL.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

anv: Drop URB entry output read handling in 3DSTATE_XS.

Commit 566a0c43f0b9fbf5106161471dd5061c7275f761 started setting the
3DSTATE_SBE bit to override these values with the one calculated there.

So, they're dead.  Stop setting them.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Delete unused brw_vs_prog_data::nr_attributes field.

Reviewed-by: Matt Turner <mattst88@gmail.com>

radeonsi: update hack for HTILE corruption in ARK: Survival Evolved

It appears that flushing the DB metadata is actually not sufficient
since the driver uses the new VS blit shaders. This looks quite
strange though, but it seems like we need to flush DB for fixing
the corruption.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102955
Fixes: 69ccb9dae7 (radeonsi: use new VS blit shaders (VS inputs in SGPRs)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radv: add support for local bos. (v3)

This uses the new kernel interfaces for reduced cs overhead,
We only set the local flag for memory allocations that don't have
 a dedicated allocation and ones that aren't imports.

v2: add to all the internal buffer creation paths.
v3: missed some command submission paths, handle 0/empty bo lists.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965/miptree: Take an isl_format in render_aux_usage

Not all rendering matches the miptree format.  We allow rendering to
texture views so there are cases where it may not match.  In those
cases, our current scheme of just passing the value of ctx->sRGBEnabled
isn't viable.  Instead, just do what we do for texturing and pass the
view format in directly.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: mesa-stable@lists.freedesktop.org

i965/blorp: Use more temporary isl_format variables

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: mesa-stable@lists.freedesktop.org

i965/blorp: Use blorp_to_isl_format for src_isl_format in blit_miptrees

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Cc: mesa-stable@lists.freedesktop.org

spirv: Claim support for the simple memory model

It's rather surprising that we've never actually hit this before.
Aparently, Ian's SPIR-V generator currently claims the Simple when you
don't do anything complex.  We really shouldn't assert-fail on it.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: mesa-stable@lists.freedesktop.org

Android: egl: add dependency on libnativewindow

system/window.h is no longer available by default and is part of
libnativewindow, so add it to the shared libraries. It has to be conditional
because the library is only present in O and later.

Really, we should only be depending on vndk/window.h now, but that's only
in O and changing would be pretty invasive.

Signed-off-by: Rob Herring <robh@kernel.org>

meson: build nouveau vieux driver

Build tested only.

v2: - fix spelling error (veaux -> vieux)

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: build r200 driver

v2: - remove TODO that is done

Build tested only

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: build r100 driver

build tested only

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

install_megadrivers: print the full path with driver name

Instead of just the path.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

intel/tools/disasm: correctly observe FILE *out parameter

Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/compiler: brw_validate_instructions to take const void* instead of void*

The disassembler does not (and should not) be modifying the data.

Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

loader: drop empty function alias

While at it, drop the duplicate return.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emli.velikov@collabora.com>

radeonsi: add a workaround for weird s_buffer_load_dword behavior on SI

See my LLVM patch which fixes the root cause.

Users have to apply this patch and then they have 2 choices:
- Downgrade to LLVM 5.0
- Update to LLVM git after my LLVM patch is pushed.

It won't be possible to use current and earlier development version
of LLVM 6.0.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: 17.3 <mesa-stable@lists.freedesktop.org>

util: use OpenBSD/NetBSD code on FreeBSD/DragonFly

Obtained from: FreeBSD ports

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
[Emil Velikov: wrap long line]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

winsys/svga/drm: add ERESTART define for *BSD

Obtained from: FreeBSD ports

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

loader: use drmGetDeviceNameFromFd2 from libdrm

Reduce code duplication and automatically benefit from OS-specific
fixes to libdrm (e.g. in FreeBSD ports).

API was introduced with 2.4.74 and we already require 2.4.75 globally.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103283
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

meson: wayland-egl depends on wayland-client

Since wayland-egl.h is currently provided by the core Wayland package,
depend on wayland-client to make sure we get it in our include path.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Fixes: 108d257a16 ("meson: build libEGL")
Cc: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Cc: Dylan Baker <dylan@pnwbakers.com>
Cc: Gert Wollny <gw.fossdev@gmail.com>

freedreno: implement pipe->invalidate_resource()

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: GL_ARB_texture_barrier

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx: rename invalidate_resource()

This is different from pipe->invalidate_resource()..

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno/a5xx: mem2gmem is read-only for BO

This should be OUT_RELOC() since the operation isn't writing to the
buffer.  Technically it doesn't matter much currently, since we'd
anyways to a gmem2mem later.  But that will change.

Signed-off-by: Rob Clark <robdclark@gmail.com>

freedreno: small rename

Signed-off-by: Rob Clark <robdclark@gmail.com>

radeon/video: add gfx9 offsets when rejoin the video surface

For CPU access.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Christian König <christian.koenig@amd.com>

radv: only copy the dynamic states that changed

When binding a new pipeline, we applied all dynamic states
without checking if they really need to be re-emitted. This
doesn't seem to be useful for the meta operations because only
the viewports/scissors are updated.

This should reduce the number of commands added to the IB
when a new graphics pipeline is bound.

Also, rename radv_dynamic_state_copy() to radv_bind_dynamic_state()
and set the dirty flags directly there.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: store the dynamic state mask into radv_dynamic_state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: only emit the depth bounds test values when set dynamically

The depth bounds test values are either set at pipeline
creation or dynamically using vkCmdSetDepthBounds().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

glsl/linker: Fix type checks for location aliasing

From the OpenGL 4.6 spec, section 4.4.1 Input Layout Qualifiers, Page 68,
(Location aliasing):

   "Further, when location aliasing, the aliases sharing the location
    must have the same underlying numerical type  (floating-point or
    integer)."

The current implementation is too strict, since it checks that the
the base types are an exact match instead.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl/linker: refactor check_location_aliasing

Mostly, this merges the type checks with all the other checks so
we only have a single loop for this.

Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl/linker: validate explicit locations for SSO programs

v2:
- we only need to validate inputs to the first stage and outputs
  from the last stage, everything else has already been validated
  during cross_validate_outputs_to_inputs (Timothy).
- Use MAX_VARYING instead of MAX_VARYINGS_INCL_PATCH (Illia)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl/linker: generalize validate_explicit_variable_location for SSO

For non-SSO programs, we only need to validate outputs, since
the cross validation of outputs to inputs will ensure that we
produce linker errors for invalid inputs too.

Hoever, for the SSO path there is no output to input validation,
so we need to validate inputs explicitly. Generalize the function
so it can handle this as well.

Also, notice that vertex shader inputs and fragment shader outputs
are already validated in assign_attribute_or_color_locations()
for both SSO and non-SSO paths, so we should not try to validate
that here again (in fact, the function would require explicit
paths to handle these two cases properly).

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl/linker: create a helper function to validate explicit locations

Currently, we only validate explicit locations for non-SSO programs.
This creates a helper that we can call from both SSO and non-SSO paths
directly, so we can reuse all the logic behind this.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl/linker: outputs in the same location must share auxiliary storage

From ARB_enhanced_layouts:

"[...]when location aliasing, the aliases sharing the location
  must have the same underlying numerical type (floating-point or
  integer) and the same auxiliary storage and
  interpolation qualification.[...]"

Add code to the linker to validate that aliased locations do
have the same aux storage.

Fixes:
KHR-GL45.enhanced_layouts.varying_location_aliasing_with_mixed_auxiliary_storage

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl/linker: outputs in the same location must share interpolation

From ARB_enhanced_layouts:

"[...]when location aliasing, the aliases sharing the location
 must have the same underlying numerical type (floating-point or
 integer) and the same auxiliary storage and
 interpolation qualification.[...]"

Add code to the linker to validate that aliased locations do
have the same interpolation.

Fixes:
KHR-GL45.enhanced_layouts.varying_location_aliasing_with_mixed_interpolation

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl/linker: fix location aliasing checks for interface variables

The existing code was checking the whole interface variable rather
than its members, which is not what we want: we want to check
aliasing for each member in the interface variable.

Surprisingly, there are piglit tests that verify this and were
passing due to a bug in the existing code: when we were computing
the last component used by an interface variable we would use
the 'vector' path and multiply by vector_elements, which is 0 for
interface variables. This made the loop that checks for aliasing
be a no-op and not add the interface variable to the list of outputs
so then we would fail to link when we did not see a matching output
for the same input in the next stage. Since the tests expect a
linker error to happen, they would pass, but not for the right
reason.

Unfortunately, the current implementation uses ir_variable instances
to keep track of explicit locations. Since we don't have
ir_variables instances for individual interface members, we need
to have a custom struct with the data we need. This struct has
the ir_variable (which for interface members is the whole
interface variable), plus the data that we need to validate for
each aliased location, for now only the base type, which for
interface members we will take from the appropriate field inside
the interface variable.

Later patches will expand this custom struct so we can also check
other requirements for location aliasing, specifically that
we have matching interpolation and auxiliary storage, that once
again, we will take from the appropriate field members for the
interface variables.

v2:
 - Use MAX_VARYING instead of MAX_VARYINGS_INCL_PATCH (Illia)

Fixes:
KHR-GL45.enhanced_layouts.varying_block_automatic_member_locations

Fixes (these were passing before but for incorrect reasons):
tests/spec/arb_enhanced_layouts/linker/block-member-locations/named-block-member-location-overlap.shader_test
tests/spec/arb_enhanced_layouts/linker/block-member-locations/named-block-member-mixed-order-overlap.shader_test

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

glsl/linker: refactor link-time validation of output locations

Move the checks for explicit locations to a separate function. We
will use this in a follow-up patch to validate locations for interface
variables where we need to validate each interface member rather than
the interface variable itself.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl/linker: report linker errors for invalid explicit locations on inputs

We were assuming that if an input has an invalid explicit location it would
fail to link because it would not find the corresponding output, however,
since we look for the matching output by indexing the explicit_locations
array with the input location, we still need to ensure that we don't index
out of bounds.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

ac/llvm: drop pointless wrappers around umsb/imsb

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/llvm: consolidate find lsb function.

This was the same between si and ac.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/llvm: drop v4f32empty. (v2)

This was unused.

v2: drop args.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/llvm: add i1false/i1true to common code.

These get used in fair few places.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/llvm: use the ac i32 0/1 and f32 0/1 llvm types.

This just avoids having two copies of these.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

ac/nir: move lds declaration/load/store into shared code.

This was duplicated between both drivers, share here.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

st/mesa: enable nir path for all shaders.

There is no reason to block this here, if a driver enables
it, let it handle it.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

st/program: add support for gs/tes/tcs nir shaders.

This probably needs more work but this just add the initial
code to convert gs/tcs/tes nir based shaders in the state tracker.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

st/program: rework basic variant interface

This just passes st_common_program and uses it.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

anv/entrypoints: Dump useful data if mako throws an exception

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

nir/opt_intrinsics: Rework progress

This commit fixes two issues:  First, we were returning false regardless
of whether or not the function made progress.  Second, we were calling
nir_metadata_preserve far more often than needed; we only need to call
it once per impl.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/compiler: Call nir_lower_system_values in brw_preprocess_nir

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

i965/program: Move nir_lower_system_values higher up

We want this to get called before nir_lower_subgroups which is going in
brw_preprocess_nir.  Now that nir_lower_wpos_ytransform can handle
system values, this should be safe to do.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

nir/lower_wpos_ytransform: Support system value intrinsics

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv/pipeline: Call nir_lower_system_valaues after brw_preprocess_nir

We currently have a bug where nir_lower_system_values gets called before
nir_lower_var_copies so it will miss any system value uses which come
from a copy_var intrinsic.  Moving it to after brw_preprocess_nir fixes
this problem.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org

anv/pipeline: Drop nir_lower_clip_cull_distance_arrays

We already handle it in brw_preprocess_nir

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

anv/pipeline: Dump shader immedately after spirv_to_nir

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/eu: Use EXECUTE_1 for JMPI

The PRM says "The execution size must be 1."  In 73137997e23ff6c11, the
execution size was set to 1 when it should have been BRW_EXECUTE_1
(which maps to 0).  Later, in dc2d3a7f5c217a7cee9, JMPI was used for
line AA on gen6 and earlier and we started manually stomping the
exeution size to BRW_EXECUTE_1 in the generator.  This commit fixes the
original bug and makes brw_JMPI just do the right thing.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: 73137997e23ff6c1145d036315d1a9ad96651281

i965/fs: Add brw_reg_type_from_bit_size utility method

Returns the brw_type for a given ssa.bit_size, and a reference type.
So if bit_size is 64, and the reference type is BRW_REGISTER_TYPE_F,
it returns BRW_REGISTER_TYPE_DF. The same applies if bit_size is 32
and reference type is BRW_REGISTER_TYPE_HF it returns BRW_REGISTER_TYPE_F

v2 (Jason Ekstrand):
 - Use better unreachable() messages
 - Add Q types

Signed-off-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965/fs/nir: Use the nir_src_bit_size helper

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

intel/fs: Handle flag read/write aliasing in needs_src_copy

In order to implement the ballot intrinsic, we do a MOV from flag
register to some GRF.  If that GRF is used in a SEL, cmod propagation
helpfully changes it into a MOV from the flag register with a cmod.
This is perfectly valid but when lower_simd_width comes along, it simply
splits into two instructions which both have conditional modifiers.
This is a problem since we're reading the flag register.  This commit
makes us check whether or not flags_written() overlaps with the flag
values that we are reading via the instruction source and, if we have
any interference, will force us to emit a copy of the source.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

clover: Fix compilation after clang r315871

v2: use a more generic compat function
v3: rename and formatting cleanup

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103388
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
CC: <mesa-stable@lists.freedesktop.org>

glsl_to_tgsi: remove unused glsl_version variable

trivial

radv: Compute ac keys from pipeline key.

The beginning of the end for the shader keys. Not entirely sure
what I'm going to replace them with for the compiler though, so this
is the first step.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: Add single pipeline cache key.

To decouple the key used for info gathering and the cache from
whatever we pass to the compiler.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

radv: Don't compute as_ls/as_es before hashing.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl_to_nir: Zero nir_constant in constant_copy for valgrind & nir_serialize

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

glsl_to_nir: Zero nir_variable struct for valgrind & nir_serialize

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

nir: Zero nir_load_const_instr::value for valgrind & nir_serialize

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel/nir: Zero local index const struct for valgrind & nir_serialize

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

nir: Zero local_size const struct for valgrind & nir_serialize

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

glsl: Add field initializers for glsl_struct_field default constructor

This helps valgrind when encode_type_to_blob is used.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

compiler/types: Support [de]serializing void types

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

nir/intrinsics: Set the correct num_indices for load_output

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: move shader_cache type handling to glsl_types

Not sure if this is the best place to put it, but we're going to need
this for NIR too.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

vulkan: Update headers and registry to 1.0.64

Acked-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Smith <asmith@feralinteractive.com>

ac/nir: generate correct instruction for atomic min/max on unsigned images

v2: fix silly typo

Cc: "17.2 17.3" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

gallium/util: remove some block alignment assertions

These assertions were revisited a couple of times in the past, and they
still weren't quite right.
The problem I was seeing (with some other state tracker) was a copy between
two 512x512 s3tc textures, but from mip level 0 to mip level 8. Therefore,
the destination has only size 2x2 (not a full block), so the box width/height
was only 2, causing the assertion to trigger for src alignment.
As far as I can tell, such a copy is completely legal, and because a correct
assertion would get ridiculously complicated just get rid of it for good.

Reviewed-by: Brian Paul <brianp@vmware.com>

meson: be explicit about the version required

This way, we know what we're allowed to use (no nested include lists
for instance) and users get immediate feedback when trying to use
unsupported versions, rather than a cryptic crash or things being
silently not built correctly.

Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

meson: add opt-out of libunwind

Libunwind has some issues on some platforms, so let's allow people
who have issues to opt-out. This is similar to what we do in automake,
and the implementation is modelled after our opt-out for valgrind.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

gles2: support for GL_EXT_occlusion_query_boolean

Following test checking entrypoints passes:
   dEQP-EGL.functional.get_proc_address.extension.gl_ext_occlusion_query_boolean

Piglit test 'ext_occlusion_query_boolean-any-samples' passes with these changes.

No changes/regression observed in WebGL occlusion tests or Intel CI.

v2: add es2="2.0" for glapi entrypoints, clean up xml
    dispatch_sanity changes (fix 'make check')

Signed-off-by: Harish Krupo <harish.krupo.kps@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

mesa: enum checks for GL_EXT_occlusion_query_boolean

Some of the checks are valid for generic ES 3.2 as well.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

radv: print NIR before LLVM IR and disassembly

It's still printed after linking, but it makes more sense to
have SPIRV->NIR->LLVM IR->ASM.

Fixes: f0a2bbd1a4 (radv: move nir print after linking is done)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: Fix truncation issue hexifying the cache uuid for the disk cache.

Going from binary to hex has a 2x blowup.

Fixes: 14216252923 'radv: create on-disk shader cache'
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: enable lower to scalar nir pass

This will allow dead components of varyings to be removed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac: add support for explicit component packing

This is needed for RADV to support explicit component packing.

This is also required to use the new NIR component splitting /
packing passes.

V2:
 - add commponent packing support for interpolate_at* intrinsics
 - improve store packing support when not all varyings are scalar
   as spotted by Bas the store source was incorrectly offset.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

i965: fix unused var warnings in release build

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

radv: use device name in cache creation like radeonsi.

Not sure how useful this is, but it makes it more consistent.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: use a define for the transition point between cp and compute shader

For certain buffer meta ops we can use the CP or a compute shader,
we should use a define to rather than hardcoding 4096, allows
for easier testing and more consistency.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

docs: Mark GL_KHR_no_error as done.

Drivers have supported KHR_no_error for a while.  We'd been leaving it
marked as "in progress" because there's a zillion places that could get
slightly more optimized.  But, Timothy and Samuel have already done
piles of work, and I think we have a solid implementation at this point.

Let's check it off the list.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

i965: Call gen6_upload_push_constants() even when the stage is disabled.

This properly sets stage_state->push_constant_dirty = true, so that we
emit 3DSTATE_CONSTANT_XS to disable the constant buffer for the shader
stage.  It also sets stage_state->push_const_size = 0.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Drop a bunch of downcasting and upcasting of gl_program pointers.

We have a gl_program and we want a gl_program.  There's no point in
converting to brw_program and back again.  This probably made more
sense in the old days before Tim dropped a layer of subclassing.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Move _mesa_shader_write_subroutine_indices down a level.

Now we call it in one place instead of making every caller do it.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

radv: only emit dfsm packets if dfsm is allowed.

radeonsi only emits these when dfsm is enabled, so for now
just hinge them on a flag we never set.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>