Caio Marcelo de Oliveira Filho [Mon, 16 Sep 2019 21:07:00 +0000 (14:07 -0700)]
spirv: Implement SPV_KHR_non_semantic_info
Do nothing for OpExtInst from extended instruction sets that name
start with "NonSemantic.".
Since they can be used within the "preamble" to annotate global
decorations, also don't stop iterating when one of them is found.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3154>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3154>
Jonathan Marek [Thu, 19 Dec 2019 17:43:42 +0000 (12:43 -0500)]
turnip: disable B8G8R8 vertex formats
Looks like swap doesn't work as expected on these, disable them.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170>
Jonathan Marek [Thu, 19 Dec 2019 17:35:40 +0000 (12:35 -0500)]
util/format: add missing vulkan formats
Add some missing vulkan formats to util/format, this solves all the missing
pipe format cases for the formats that turnip supports.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3170>
Jonathan Marek [Thu, 19 Dec 2019 23:03:09 +0000 (18:03 -0500)]
turnip: minor warning fixes
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3177>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3177>
Andreas Baierl [Thu, 19 Dec 2019 21:17:45 +0000 (22:17 +0100)]
lima: Rotate dump files after each finished pp frame
This rotates the dump files like the mali-syscall-tracker does.
After each finished pp frame a new file is generated. They are
numbered like lima.dump.0000, lima.dump.0001 ...
The filename and path can be given with the new environment
variable LIMA_DUMP_FILE.
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Andreas Baierl <ichgeh@imkreisrum.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3175>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3175>
Vasily Khoruzhick [Sun, 24 Nov 2019 22:37:32 +0000 (14:37 -0800)]
lima: drop suballocator
Since we're using a separate per-draw BO for GP outputs we don't
need suballocator anymore.
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3158>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3158>
Vasily Khoruzhick [Sun, 24 Nov 2019 22:34:44 +0000 (14:34 -0800)]
lima: use single BO for GP outputs
Varyings, gl_Position and gl_PointSize are all GP outputs, so we
can use a single BO for them all. Also that allows us to get rid
of suballocator.
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3158>
Jonathan Marek [Sun, 15 Dec 2019 23:50:29 +0000 (18:50 -0500)]
nir: fix assign_io_var_locations for vertex inputs
Also fixes fragment inputs using the wrong "base" value (which was working
only because FRAG_RESULT_DATA0 is less than VARYING_SLOT_VAR0)
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3108>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3108>
Jonathan Marek [Thu, 12 Dec 2019 22:06:14 +0000 (17:06 -0500)]
turnip: implement secondary command buffers
Uses a new "tu_cs_add_entries" function because tu_cs_emit_call doesn't
work inside draw_cs (which is already called by tu_cs_emit_call).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
Jonathan Marek [Mon, 16 Dec 2019 21:42:35 +0000 (16:42 -0500)]
turnip: compute gmem offsets at renderpass creation time
This makes it easier to implement secondary command buffers, since we no
longer need to know the render area to set the gmem offsets for input
attachments and CmdClearAttachments.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3075>
Jonathan Marek [Thu, 19 Dec 2019 03:38:09 +0000 (22:38 -0500)]
turnip: emit_compute_driver_params fixes
Offset was wrong, it is in vec4 not dwords.
There's a hole between DP_NUM_WORK_GROUPS_Z and DP_LOCAL_GROUP_SIZE_X so
use the IR3 enums.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
Jonathan Marek [Thu, 19 Dec 2019 03:35:51 +0000 (22:35 -0500)]
turnip: emit base instance vs driver param
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
Jonathan Marek [Sun, 17 Nov 2019 17:17:47 +0000 (12:17 -0500)]
freedreno/ir3: support load_base_instance
Not supported by hardware, uses same mechanism as base vertex.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
Jonathan Marek [Thu, 19 Dec 2019 03:19:15 +0000 (22:19 -0500)]
freedreno/registers: document vertex/instance id offset bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3162>
Neha Bhende [Thu, 19 Dec 2019 19:11:49 +0000 (00:41 +0530)]
st/mesa: release tgsi tokens for shader states
Since we are using st_common_variant while creating variant for vertext
program, we can release tokens created in st_create_vp_variant which
are already stored in respective states.
This fix memory leak found with piglit tests
Fixes
bc99b22a305b ('st/mesa: use a separate VS variant for the draw module')
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Juan A. Suarez Romero [Thu, 19 Dec 2019 19:01:16 +0000 (20:01 +0100)]
Revert "nir/lower_double_ops: relax lower mod()"
This reverts commit
8172b1fa03fe74165728bfb182c98a3e62193d2b.
This commit was done taking in account Vulkan spec, but did not realize
it was affecting OpenGL too.
Closes: #2252
Kristian H. Kristensen [Fri, 22 Nov 2019 06:48:32 +0000 (22:48 -0800)]
freedreno/a6xx: Set up multisample sysmem MRTs correctly
We had an extra factor of num_samples in the stride.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Tue, 26 Nov 2019 19:38:47 +0000 (11:38 -0800)]
freedreno/a6xx: Rewrite compressed blits in a helper function
Similar to how we handle zs blits.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Tue, 26 Nov 2019 18:57:56 +0000 (10:57 -0800)]
freedreno/a6xx: Move handle_rgba_blit() up
If we move this function up, we don't have to forward declare it.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Thu, 21 Nov 2019 19:35:48 +0000 (11:35 -0800)]
freedreno/a6xx: Handle srgb blits on the blitter
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Thu, 21 Nov 2019 19:40:20 +0000 (11:40 -0800)]
freedreno/a6xx: Use A6XX_SP_2D_SRC_FORMAT_MASK macro
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Thu, 12 Dec 2019 01:05:57 +0000 (17:05 -0800)]
freedreno/a6xx: RB6_R8G8B8 is actually 32 bit RGBX
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Thu, 21 Nov 2019 17:14:40 +0000 (09:14 -0800)]
freedreno/a6xx: Use blitter for resolve blits
We have a SAMPLES_AVERAGE bit that does what we need for resolving
multisample buffers - let's use it.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Thu, 28 Nov 2019 00:06:59 +0000 (16:06 -0800)]
freedreno/a6xx: Add fd_resource_swap() helper
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Tue, 26 Nov 2019 05:50:57 +0000 (21:50 -0800)]
freedreno/a6xx: Pick blitter swap based on resource tiling
The linear levels in a tiled resource are stored in the canonical
swap, WZYX. We need to pick the swap based on whether or not the
resource is tiled, not whether the the level in question is tiled.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Tue, 26 Nov 2019 00:40:37 +0000 (16:40 -0800)]
freedreno/a6xx: Program sampler swap based on resource tiling
It doesn't matter whether or not the level in question is linear.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Tue, 26 Nov 2019 05:14:31 +0000 (21:14 -0800)]
freedreno: Add debug flag for forcing linear layouts
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Kristian H. Kristensen [Thu, 21 Nov 2019 19:41:15 +0000 (11:41 -0800)]
freedreno/a6xx: Make DEBUG_BLIT_FALLBACK only dump fallbacks
Use new macro, DEBUG_BLIT, for dumping all blits.
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2848>
Jonathan Marek [Thu, 19 Dec 2019 15:40:35 +0000 (10:40 -0500)]
freedreno/ir3: fix vertex shader sysvals with pre_assign_inputs
The first pre_assign_inputs loop doesn't pre-assign sysvals, so skip the
second part for sysvals.
The sysvals don't need to be pre-assigned since the state for those isn't
shared between binning / nonbinning shaders.
Fixes assert failures in cases where the sysvals didn't end up in the same
registers for binning / nonbinning.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3168>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3168>
Thong Thai [Wed, 18 Dec 2019 22:02:02 +0000 (17:02 -0500)]
st/va: Convert interlaced NV12 to progressive
In vlVaDeriveImage, convert interlaced NV12 buffers to progressive.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1193
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3157>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3157>
Alyssa Rosenzweig [Wed, 18 Dec 2019 00:05:35 +0000 (19:05 -0500)]
pan/midgard: Add uniform/work heuristic
Uniform/work registers are partitioned on a shader-by-shader basis as
determined by the compiler. We add a simple heuristic here running
before scheduling that prioritizes mitigating spilling at all costs.
A more sophisticated heuristic should run *after* scheduling, doing a
dry run of the register allocator itself to determine spilling. Fitting
this into our current scheduling model is difficult, so while this
heuristic does hurt some shaders, overall the results are acceptable:
total instructions in shared programs: 50065 -> 38747 (-22.61%)
instructions in affected programs: 37187 -> 25869 (-30.44%)
helped: 59
HURT: 77
helped stats (abs) min: 1 max: 757 x̄: 198.46 x̃: 151
helped stats (rel) min: 0.48% max: 62.89% x̄: 32.95% x̃: 36.27%
HURT stats (abs) min: 1 max: 9 x̄: 5.08 x̃: 6
HURT stats (rel) min: 0.92% max: 14.29% x̄: 6.71% x̃: 4.60%
95% mean confidence interval for instructions value: -111.15 -55.29
95% mean confidence interval for instructions %-change: -14.33% -6.67%
Instructions are helped.
total bundles in shared programs: 30606 -> 19157 (-37.41%)
bundles in affected programs: 23907 -> 12458 (-47.89%)
helped: 58
HURT: 74
helped stats (abs) min: 6 max: 757 x̄: 203.09 x̃: 152
helped stats (rel) min: 5.19% max: 77.00% x̄: 49.38% x̃: 53.79%
HURT stats (abs) min: 1 max: 9 x̄: 4.46 x̃: 5
HURT stats (rel) min: 1.85% max: 26.32% x̄: 11.70% x̃: 9.57%
95% mean confidence interval for bundles value: -115.46 -58.01
95% mean confidence interval for bundles %-change: -20.87% -9.41%
Bundles are helped.
total quadwords in shared programs: 31305 -> 32027 (2.31%)
quadwords in affected programs: 20471 -> 21193 (3.53%)
helped: 0
HURT: 133
HURT stats (abs) min: 1 max: 9 x̄: 5.43 x̃: 5
HURT stats (rel) min: 0.76% max: 15.15% x̄: 5.47% x̃: 4.65%
95% mean confidence interval for quadwords value: 5.00 5.86
95% mean confidence interval for quadwords %-change: 4.85% 6.08%
Quadwords are HURT.
total registers in shared programs: 2256 -> 2545 (12.81%)
registers in affected programs: 708 -> 997 (40.82%)
helped: 0
HURT: 95
HURT stats (abs) min: 1 max: 8 x̄: 3.04 x̃: 3
HURT stats (rel) min: 12.50% max: 100.00% x̄: 39.41% x̃: 37.50%
95% mean confidence interval for registers value: 2.64 3.45
95% mean confidence interval for registers %-change: 34.62% 44.19%
Registers are HURT.
total threads in shared programs: 1776 -> 1709 (-3.77%)
threads in affected programs: 134 -> 67 (-50.00%)
helped: 0
HURT: 67
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: -1.00 -1.00
95% mean confidence interval for threads %-change: -50.00% -50.00%
Threads are HURT.
total spills in shared programs: 3868 -> 2 (-99.95%)
spills in affected programs: 3868 -> 2 (-99.95%)
helped: 60
HURT: 0
total fills in shared programs: 6456 -> 4 (-99.94%)
fills in affected programs: 6456 -> 4 (-99.94%)
helped: 60
HURT: 0
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3150>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3150>
Samuel Pitoiset [Wed, 18 Dec 2019 13:23:26 +0000 (14:23 +0100)]
ac: declare an enum for the OOB select field on GFX10
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>
Samuel Pitoiset [Wed, 18 Dec 2019 12:29:39 +0000 (13:29 +0100)]
radv/gfx10: fix the out-of-bounds check for vertex descriptors
When stride is 0, it should check against the offset not the index.
This fixes black character models with Beat Saber and missing snow
with Dragon Quest.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2233
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1975
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3147>
Juan A. Suarez Romero [Thu, 28 Nov 2019 16:58:45 +0000 (16:58 +0000)]
nir/lower_double_ops: relax lower mod()
Currently when lowering mod() we add an extra instruction so if
mod(a,b) == b then 0 is returned instead of b, as mathematically
mod(a,b) is in the interval [0, b).
But Vulkan spec has relaxed this restriction, and allows the result to
be in the interval [0, b].
This commit takes this in account to remove the extra instruction
required to return 0 instead.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2922>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2922>
Erik Faye-Lund [Tue, 17 Dec 2019 20:17:09 +0000 (21:17 +0100)]
zink: implement nir_texop_txd
This lets us enable PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD, which in turns
gives us ARB_shader_texture_lod.
Still fails one piglit test on ANV, namely
spec@arb_shader_texture_lod@execution@arb_shader_texture_lod-texgradcube,
but with 33 new passing tests, I think this is worth it.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3140>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3140>
Erik Faye-Lund [Wed, 18 Dec 2019 14:37:01 +0000 (15:37 +0100)]
zink: enable PIPE_CAP_MIXED_COLORBUFFER_FORMATS
This just works in Vulkan, there's no work neeed to enable it.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3148>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3148>
Jonathan Marek [Tue, 17 Dec 2019 23:15:45 +0000 (18:15 -0500)]
turnip: don't set SP_FS_CTRL_REG0_VARYING if only fragcoord is used
Fixes artifacts in the subpasses demo, which has a shader using fragcoord
without any varyings. It looks like setting this bit when there are no
varyings can cause weirdness in some cases (without this change, if the
previous shader had <= 8 varyings it would work, but with 9 varyings it
would have artifacts).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
Jonathan Marek [Tue, 17 Dec 2019 22:59:45 +0000 (17:59 -0500)]
turnip: add cache invalidate to fix input attachment cases
Fixes artifacts in the subpasses demo.
Workaround texture cache with input attachments from GMEM by adding a cache
invalidate between subpasses.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3143>
Lionel Landwerlin [Wed, 18 Dec 2019 15:48:26 +0000 (17:48 +0200)]
loader: fix close on uninitialized file descriptor value
Using a drm syscall layer faking a kernel driver :
==581460== Conditional jump or move depends on uninitialised value(s)
==581460== by 0x48A4C2B: close (drm-hooks.cpp:185)
==581460== by 0x5A815F1: dri3_alloc_render_buffer (loader_dri3_helper.c:1469)
==581460== by 0x5A82050: dri3_get_buffer (loader_dri3_helper.c:1827)
==581460== by 0x5A82662: loader_dri3_get_buffers (loader_dri3_helper.c:2028)
==581460== by 0x6C78109: intel_update_image_buffers (brw_context.c:1870)
==581460== by 0x6C77805: intel_update_renderbuffers (brw_context.c:1499)
==581460== by 0x6C7789D: intel_prepare_render (brw_context.c:1520)
==581460== by 0x6C773D4: intelMakeCurrent (brw_context.c:1341)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 069fdd5f9fac ("egl/x11: Support DRI3 v1.1")
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3152>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3152>
Connor Abbott [Tue, 17 Dec 2019 12:02:56 +0000 (13:02 +0100)]
freedreno: Fix CP_MEM_TO_REG flag definitions
These actually mean something completely different, at least on A5xx
and A6xx. The only other usage of the old flags on something older than
A6xx was a typo, so I don't know if it was always this way, but at the
same time it means that we don't have to worry too much about that.
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
Connor Abbott [Mon, 16 Dec 2019 16:45:02 +0000 (17:45 +0100)]
freedreno: Use new macros for CP_WAIT_REG_MEM and CP_WAIT_MEM_GTE
Similar to the existing usage for CP_COND_WRITE5, this makes it clear
what each of the magic parameters are for.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
Connor Abbott [Mon, 16 Dec 2019 16:17:38 +0000 (17:17 +0100)]
a6xx: Add more CP packets
And add fields uncovered by looking at the firmware. I think this covers
all the memory, register, and scratch manipulation opcodes that exist on
A6xx, plus one additional nice find for Vulkan and describing a
previously unknown opcode and documenting CP_WAIT_REG_MEM.
Note that the bits for the CP_REG_TO_MEM count, as well as the formula
for computing the actual count for both CP_REG_TO_MEM and CP_MEM_TO_REG,
are changed because the A630 SQE firmware actually does something
different. I haven't investigated older microcodes to see whether this
extends back to A5xx and A4xx, but the only non-A6xx uses of this
field result in the same bit-pattern when using the A6xx bit range and
formula, so it should be safe to change the definition universally.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3116>
Bas Nieuwenhuizen [Wed, 18 Dec 2019 09:21:40 +0000 (10:21 +0100)]
radv: Limit workgroup size to 1024.
Fixes a hang with geekbench.
The existence of RX 580 and NAVI10 results shows that the generations
before and after this do not have the issue. (They show up on the
website). So this is likely a GFX9 only issue.
This is not something weird like LDS size since none of the shaders
seem to use LDS.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3145>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3145>
Dylan Baker [Wed, 18 Dec 2019 19:25:32 +0000 (11:25 -0800)]
docs: Add release notes, news, and update calendar for 19.2.8
Dylan Baker [Wed, 18 Dec 2019 19:22:52 +0000 (11:22 -0800)]
docs/relnotes/19.2.8: Add SHA256 sum
Dylan Baker [Wed, 18 Dec 2019 19:01:53 +0000 (11:01 -0800)]
docs: add relnotes for 19.2.8
Dylan Baker [Wed, 18 Dec 2019 18:58:54 +0000 (10:58 -0800)]
docs: Add release notes, update calendar, and add news for 19.3.1
Dylan Baker [Wed, 18 Dec 2019 18:56:33 +0000 (10:56 -0800)]
dcos: add releanse notes for 19.3.1
Lionel Landwerlin [Mon, 16 Dec 2019 14:11:40 +0000 (16:11 +0200)]
i965/iris/perf: factor out frequency register capture
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3113>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3113>
Jonathan Marek [Tue, 17 Dec 2019 21:03:07 +0000 (16:03 -0500)]
freedreno/ir3: update prefetch input_offset when packing inlocs
If the input location changes then prefetch input_offset needs to change.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3141>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3141>
Eric Anholt [Tue, 17 Dec 2019 19:19:07 +0000 (11:19 -0800)]
ci: Fix caselist results archiving after parallel-deqp-runner rename.
Noticed while reviewing some lava parallel-deqp-runner changes.
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3138>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3138>
Kristian H. Kristensen [Mon, 16 Dec 2019 20:59:16 +0000 (12:59 -0800)]
freedreno/a6xx: Document the CP_SET_DRAW_STATE enable bits
There are bits for binning, gmem and sysmem.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3131>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3131>
Caio Marcelo de Oliveira Filho [Mon, 16 Dec 2019 23:12:14 +0000 (15:12 -0800)]
anv/gen12: Temporarily disable VK_KHR_buffer_device_address (and EXT)
For the sake of our testing infrastructure, disable this extension
for TGL until we can sort out a hang in Vulkan CTS.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Caio Marcelo de Oliveira Filho [Mon, 16 Dec 2019 22:43:53 +0000 (14:43 -0800)]
intel/vec4: Fix lowering of multiplication by 16-bit constant
Existing code was ignoring whether the type of the immediate source
was signed or not. If the source was signed, it would ignore small
negative values but it also would wrongly accept values between
INT16_MAX and UINT16_MAX, causing the atual value to later be
reinterpreted as a negative number (under 16-bits).
Fixes tests/shaders/glsl-mul-const.shader_test in Piglit for older
platforms that don't support MUL with 32x32 types and use vec4.
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Mon, 16 Dec 2019 21:37:41 +0000 (13:37 -0800)]
intel/fs: Fix lowering of dword multiplication by 16-bit constant
Existing code was ignoring whether the type of the immediate source
was signed or not. If the source was signed, it would ignore small
negative values but it also would wrongly accept values between
INT16_MAX and UINT16_MAX, causing the atual value to later be
reinterpreted as a negative number (under 16-bits).
Fixes tests/shaders/glsl-mul-const.shader_test in Piglit for platforms
that don't support MUL with 32x32 types, including ICL and TGL.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2186
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Alyssa Rosenzweig [Mon, 16 Dec 2019 22:14:04 +0000 (17:14 -0500)]
pan/midgard: Set Z to shadow comparator for 2D
We still need to generalize for other types of (non-2D / array) shadow
samplers, but this is enough for sampler2DShadow to work with initial
dEQP tests passing.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Alyssa Rosenzweig [Mon, 16 Dec 2019 22:13:46 +0000 (17:13 -0500)]
pan/midgard: Set .shadow for shadow samplers
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Alyssa Rosenzweig [Mon, 16 Dec 2019 22:02:36 +0000 (17:02 -0500)]
pan/midgard: Hoist temporary coordinate for cubemaps
We'll reuse some of this code for shadow samplers, which are represented
by a distinct source in NIR.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Alyssa Rosenzweig [Mon, 16 Dec 2019 21:53:52 +0000 (16:53 -0500)]
pan/midgard: Use a reg temporary for mutiple writes
Bug in texelfetch implementation from inspection.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Alyssa Rosenzweig [Mon, 16 Dec 2019 21:45:28 +0000 (16:45 -0500)]
panfrost: Handle empty shaders
I didn't realize this was in spec, but it fixes a crash in shaderdb.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Alyssa Rosenzweig [Mon, 16 Dec 2019 23:05:21 +0000 (18:05 -0500)]
panfrost: Let precompile imply shaderdb
This cuts down the number of random environmental variables we need
flying around; now PAN_MESA_DEBUG=precompile is sufficient and
MIDGARD_MESA_DEBUG=shaderdb will be implied.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Alyssa Rosenzweig [Fri, 13 Dec 2019 20:13:02 +0000 (15:13 -0500)]
panfrost: Add PAN_MESA_DEBUG=precompile for shader-db
We would like to use run.c for shader-db runs (rather than capturing in
real-time, which is limiting).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3125>
Lionel Landwerlin [Mon, 16 Dec 2019 15:58:41 +0000 (17:58 +0200)]
mesa: avoid triggering assert in implementation
When tearing down a GL context with an active performance query, the
implementation can be confused by a query marked active when it's
being deleted.
This shouldn't happen in the implementation because the context will
already be idle.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2235
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3115>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3115>
Samuel Pitoiset [Tue, 17 Dec 2019 09:01:50 +0000 (10:01 +0100)]
radv/gfx10: fix ngg_get_ordered_id
Ported from RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3133>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3133>
Neil Armstrong [Tue, 17 Dec 2019 10:34:47 +0000 (11:34 +0100)]
ci: Remove T820 from CI temporarily
Our lab will have continuous programmed power cuts until the 6th January 2020,
so it's safer to disable the T820 CI running on the BayLibre kernelCI lab
to avoid breaking CI.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3135>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3135>
Tapani Pälli [Fri, 15 Nov 2019 07:18:10 +0000 (09:18 +0200)]
i965: expose MESA_FORMAT_B8G8R8X8_SRGB visual
Patch adds BGRX sRGB visuals, required format translation information
to the __DRI_IMAGE_FOURCC_SXRGB8888 format and makes all BGRX visuals
sRGB capable just like is done with BGRA.
squashed patches from Yevhenii Kolesnikov:
dri: Add __DRI_IMAGE_FOURCC_SXRGB8888 conversion
i965: force visuals without alpha bits to use sRGB
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1501
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3077>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3077>
Tapani Pälli [Fri, 15 Nov 2019 07:12:15 +0000 (09:12 +0200)]
dri: add __DRI_IMAGE_FORMAT_SXRGB8
Add format definition and required plumbing to create images.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3077>
Gert Wollny [Mon, 16 Dec 2019 20:48:09 +0000 (21:48 +0100)]
virgl: Increase the shader transfer buffer by doubling the size
With only linearly increasing the size of the shader transfer buffer
the transfer of very large shaders may fail, so with each attempt double
the size of the buffer.
CTS:
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.48
for VTK-GL-CTS
b5dcfb9c5 and newer
virglrenderer bug:
https://gitlab.freedesktop.org/virgl/virglrenderer/issues/150
Fixes: a8987b88ff1db4ac00720a9b56c4bc3aeb666537
virgl: add driver for virtio-gpu 3D (v2)
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3121>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3121>
Eric Anholt [Mon, 16 Dec 2019 23:41:16 +0000 (15:41 -0800)]
turnip: Fix support for immutable samplers.
We were setting up the hardware sampler state when updating a combined
image sampler, but never looking at the immutable sampler for in the
separate case.
Fixes failures in
dEQP-VK.binding_model.shader_access.primary_cmd_buf.sampler_immutable.fragment.*
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3127>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3127>
Jonathan Marek [Mon, 16 Dec 2019 16:06:36 +0000 (11:06 -0500)]
turnip: don't set LRZ enable at end of renderpass
Fixes hanging with cases that use more than one renderpass.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3122>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3122>
Jonathan Marek [Sun, 15 Dec 2019 18:43:39 +0000 (13:43 -0500)]
freedreno/ir3: lower pack/unpack ops
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3106>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3106>
Jonathan Marek [Sun, 15 Dec 2019 18:43:07 +0000 (13:43 -0500)]
nir: add option to lower half packing opcodes
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3106>
Eric Anholt [Sat, 14 Dec 2019 06:05:11 +0000 (22:05 -0800)]
turnip: Add support for descriptor arrays.
I had a bigger rework I was working on, but this is simple and gets tests
passing.
Fixes 36 failures in
dEQP-VK.binding_model.shader_access.primary_cmd_buf.sampler_mutable.fragment.*
(now all passing)
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3124>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3124>
Eric Anholt [Sat, 14 Dec 2019 00:52:47 +0000 (16:52 -0800)]
turnip: Drop unused variable.
We really need -Werror in CI.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3124>
Alyssa Rosenzweig [Fri, 13 Dec 2019 19:12:48 +0000 (14:12 -0500)]
panfrost: Don't double-create scratchpad
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 4f7fddbd716 ("panfrost: Pass size to panfrost_batch_get_scratchpad")
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3119>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3119>
Alyssa Rosenzweig [Fri, 13 Dec 2019 17:41:54 +0000 (12:41 -0500)]
panfrost: Simplify sampler upload condition
Makes it more obvious what's going on.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3119>
Icecream95 [Wed, 11 Dec 2019 08:08:41 +0000 (21:08 +1300)]
gallium/auxiliary: Handle count == 0 in u_vbuf_get_minmax_index_mapped
This makes u_vbuf_get_minmax_index_mapped return min = 0 / max = 0
when info->count == 0.
That should never happen anyway, but this commit makes it at least
return a sane value that callers expect, and also allows us - and
GCC - to assume count != 0 for optimization purposes.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3050>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3050>
Icecream95 [Wed, 11 Dec 2019 01:22:19 +0000 (14:22 +1300)]
gallium/auxiliary: Reduce conversions in u_vbuf_get_minmax_index_mapped
With this patch, GCC generates vectorized code that does the comparisons
without converting the indices to 32-bit first.
This optimization makes the aforementioned function almost twice as fast
for ARM NEON, and should speed up vectorised code on other platforms.
Without vectorisation, the function is still a percent or two faster,
but slightly larger.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3050>
Marek Olšák [Wed, 4 Sep 2019 02:38:38 +0000 (22:38 -0400)]
amd/addrlib: update to the latest version
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Jonathan Marek [Sun, 15 Dec 2019 17:00:21 +0000 (12:00 -0500)]
turnip: remove duplicate A6XX_SP_CS_CONFIG_NIBO
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
Jonathan Marek [Sun, 15 Dec 2019 16:57:40 +0000 (11:57 -0500)]
turnip: change emit_ibo to be like emit_textures
Adds missing alignment and error checking.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
Jonathan Marek [Sun, 15 Dec 2019 15:51:39 +0000 (10:51 -0500)]
turnip: fix emit_ibo
Based on the GL driver:
-Compute needs different opcode (this fixes a GPU hang problem)
-REG_A6XX_SP_IBO_LO/REG_A6XX_SP_CS_IBO_LO were swapped
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
Jonathan Marek [Sun, 15 Dec 2019 15:46:03 +0000 (10:46 -0500)]
turnip: remove compute emit_border_color
Current tu6_emit_border_color doesn't work for compute and there's no
example from the GL driver to base it on, so replace it with a finishme.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
Jonathan Marek [Sun, 15 Dec 2019 15:42:23 +0000 (10:42 -0500)]
turnip: fix emit_textures for compute shaders
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3104>
Rafael Antognolli [Mon, 16 Dec 2019 19:07:42 +0000 (11:07 -0800)]
utils/os_socket: Define ssize_t on windows.
Fixes: ef5266ebd50 ("util/os_socket: Add socket related functions.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 14 Dec 2019 05:56:50 +0000 (00:56 -0500)]
radeonsi/gfx10: fix ngg_get_ordered_id
This could have caused issues with NGG streamout.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Thu, 12 Dec 2019 22:13:23 +0000 (17:13 -0500)]
radeonsi: reset more fields in si_llvm_context_set_ir to fix reusing ctx
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Fri, 13 Dec 2019 02:02:13 +0000 (21:02 -0500)]
radeonsi: fix determining whether the VS prolog is needed
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Fri, 13 Dec 2019 02:09:50 +0000 (21:09 -0500)]
radeonsi: allow generating VS prologs with 0 inputs
If "ls_vgpr_fix" is set, we use a prolog, but it can have 0 inputs.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Fri, 13 Dec 2019 01:17:41 +0000 (20:17 -0500)]
radeonsi/gfx10: don't insert NGG streamout atomics if they are never used
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Thu, 12 Dec 2019 22:11:40 +0000 (17:11 -0500)]
radeonsi: don't wrap the VS prolog in if (ES thread) .. endif
We can execute it unconditionally and the values computed for disabled
threads won't be used anyway.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Fri, 6 Dec 2019 02:29:32 +0000 (21:29 -0500)]
radeonsi: set is_monolithic for VS prologs when the shader is really monolithic
This fixes a bug with NGG that is probably harmless.
Basically, !is_monolithic makes the VS prolog emit
llvm.amdgcn.init.exec.from.input, which sets the EXEC mask to only enable
ES threads. In the NGG non-GS case, the GS threads <= ES threads, so it was
never an issue.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Fri, 6 Dec 2019 00:37:59 +0000 (19:37 -0500)]
radeonsi: disallow compute-based culling if polygon mode is enabled
Polygon mode can generate thick points or lines.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Thu, 5 Dec 2019 01:27:46 +0000 (20:27 -0500)]
radeonsi: deduplicate ES and GS thread enablement code
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Thu, 12 Dec 2019 22:01:39 +0000 (17:01 -0500)]
ac: fix the return value in cull_bbox when bbox culling is disabled
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Marek Olšák [Thu, 12 Dec 2019 22:00:51 +0000 (17:00 -0500)]
ac: fix ac_get_i1_sgpr_mask for Wave32
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3095>
Alyssa Rosenzweig [Thu, 12 Dec 2019 16:30:20 +0000 (11:30 -0500)]
panfrost: Remove asserts in panfrost_pack_work_groups_compute
It's a hot routine and these are exceedingly unlikely to break.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3067>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3067>
Alyssa Rosenzweig [Thu, 12 Dec 2019 16:28:08 +0000 (11:28 -0500)]
panfrost: Pack invocation_shifts manually instead of a bit field
gcc generates exceptionally bad code for panfrost_pack_work_groups_fused
otherwise ... although that routine is somehow still hot ...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3067>
Iván Briano [Fri, 13 Dec 2019 00:09:00 +0000 (16:09 -0800)]
anv: Export VK_KHR_buffer_device_address only when really supported
Fixes: 1b6991ba1d8 ("anv: Implement VK_KHR_buffer_device_address")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3071>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3071>
Iván Briano [Fri, 13 Dec 2019 00:07:19 +0000 (16:07 -0800)]
anv: Export filter_minmax support only when it's really supported
Fixes: bea4d4c78c3 ("anv: add VK_EXT_sampler_filter_minmax support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3071>