Nicolai Hähnle [Fri, 20 Nov 2015 11:58:55 +0000 (12:58 +0100)]
radeon: re-prepare query buffers on begin_query for predicate queries
The point of prepare_buffer is to ensure that the query buffer contains valid
initial data for conditional rendering: as long as the buffer is initialized
correctly, the GPU is able to tell whether query results have been written
already (and wait or fall back to unconditional rendering if desired).
This means prepare_buffer needs to be called again when a buffer is reused.
Conversely, for queries that cannot be used for conditional rendering
(notably pipeline statistics), we can re-use buffers immediately, and they
do not need to be initialized.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Nicolai Hähnle [Fri, 20 Nov 2015 10:46:26 +0000 (11:46 +0100)]
radeon: reset query buffers for PIPE_QUERY_TIMESTAMP
Since begin_query is not called for this query type, we need to reset the
query buffer state in end_query instead.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93015
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Tested-by: Mathias Tillman <master.homer@gmail.com>
Brian Paul [Fri, 20 Nov 2015 17:19:16 +0000 (10:19 -0700)]
mesa: update some old-style (K&R?) function pointer calls
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Brian Paul [Fri, 20 Nov 2015 21:05:55 +0000 (14:05 -0700)]
docs: mention GL 3.3 support for VMware driver in Mesa 11.1 relnotes
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 19 Nov 2015 17:39:49 +0000 (10:39 -0700)]
svga: add num-bytes-uploaded HUD query
To graph the number of bytes uploaded to GPU per frame (vertex buffer data,
constant buffer data, texture data, etc).
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Thu, 19 Nov 2015 17:39:09 +0000 (10:39 -0700)]
svga: add some sanity check assertions in svga_buffer_transfer_map()
Make sure y and z values of buffers are as expected.
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Timothy Arceri [Thu, 5 Nov 2015 11:17:36 +0000 (22:17 +1100)]
docs: mark compile-time constant expressions as done
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sun, 8 Nov 2015 22:34:40 +0000 (09:34 +1100)]
glsl: add subroutine index qualifier support
ARB_explicit_uniform_location allows the index for subroutine functions
to be explicitly set in the shader.
This patch reduces the restriction on the index qualifier in
validate_layout_qualifiers() to allow it to be applied to subroutines
and adds the new subroutine qualifier validation to ast_function::hir().
ast_fully_specified_type::has_qualifiers() is updated to allow the
index qualifier on subroutine functions when explicit uniform locations
is available.
A new check is added to ast_type_qualifier::merge_qualifier() to stop
multiple function qualifiers from being defied, before this patch this
would cause a segfault.
Finally a new variable is added to ir_function_signature to store the
index. This value is validated and the non explicit values assigned in
link_assign_subroutine_types().
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Timothy Arceri [Sat, 14 Nov 2015 04:13:28 +0000 (15:13 +1100)]
glsl: add support for complie-time constant expressions
This patch replaces the old interger constant qualifiers with either
the new ast_layout_expression type if the qualifier requires merging
or ast_expression if the qualifier can't have mulitple declarations
or if all but the newest qualifier is simply ignored.
We also update the process_qualifier_constant() helper to be
similar to the one in the ast_layout_expression class, but in
this case it will be used to process the ast_expression qualifiers.
Global shader layout qualifier validation is moved out of the parser
in this change as we now need to evaluate any constant expression
before doing the validation.
V2: Fix minimum value check for vertices (Emil)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sun, 8 Nov 2015 20:48:46 +0000 (07:48 +1100)]
glsl: add new type for compile time constants
In this patch we introduce a new ast type for holding the new
compile-time constant expressions. The main reason for this is that
we can no longer do merging of layout qualifiers before they have been
converted into GLSL IR so we need to store them to be proccessed later.
The new type has two helper functions:
- process_qualifier_constant()
Used to merge and then evaluate qualifier expressions
- merge_qualifier()
Simply appends a qualifier to a list to be merged later by
process_qualifier_constant()
In order to avoid cascading error messages the process_qualifier_constant()
helpers return a bool
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 14 Nov 2015 03:05:30 +0000 (14:05 +1100)]
glsl: call set_shader_inout_layout() earlier
This will allow us to add error checking to this function
in a later patch, if we don't move it the error messages
will go missing.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 14 Nov 2015 13:42:44 +0000 (00:42 +1100)]
glsl: replace binding layout min boundary check
Use new helper that will in a later patch allow for
compile time constants.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 14 Nov 2015 13:55:29 +0000 (00:55 +1100)]
glsl: encapsulate binding validation and setting
This change moves the binding layout handing code into an apply
function to be consistent with other helper functions in the ast
code, and to encapsulate the code so that when we introduce
compile time constants the code will be much cleaner.
One small downside is for unnamed interface blocks we will now
be revalidating the binding for each member its applied to.
However this seems a small sacrifice in order to have code which
is readable.
We also remove the incorrect comment in the named interface code
about propagating bindings to members which seems to have been
copied from the unnamed interface code.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 14 Nov 2015 03:32:38 +0000 (14:32 +1100)]
glsl: move stream layout max validation
This validation is moved later so we can validate the
max value when compile time constant support is added in a
later patch.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Fri, 13 Nov 2015 07:47:55 +0000 (18:47 +1100)]
glsl: move stream layout qualifier validation
We are moving this out of the parser in preparation for compile
time constant support.
The reason a validation function is used rather than an apply
function like what is used with bindings is because glsl allows
streams to be defined on members of blocks even though they must
match the stream thats associated with the current block, this
means we need access to the value after validation to do this
comparision.
V2: Fix typo in comment (Emil)
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 14 Nov 2015 02:09:46 +0000 (13:09 +1100)]
glsl: replace index layout min boundary check
Use new helper that will in a later patch allow for
compile time constants.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Fri, 13 Nov 2015 04:16:20 +0000 (15:16 +1100)]
glsl: remove duplicate validation for index layout qualifier
The minimum value for index is validated in apply_explicit_location()
and we want to remove validation from the parser so we can add
compile time constant support.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Fri, 13 Nov 2015 04:10:57 +0000 (15:10 +1100)]
glsl: move location layout qualifier validation
We are moving this out of the parser in preparation for compile
time constant support.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 14 Nov 2015 01:22:49 +0000 (12:22 +1100)]
glsl: add process_qualifier_constant() helper
For now this just validates that a qualifier is inside its
minimum boundary, in a later patch we will expand it to
evaluate compile time constants.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Samuel Pitoiset [Tue, 10 Nov 2015 00:08:28 +0000 (01:08 +0100)]
docs: mark GL_AMD_performance_monitor for nv50
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Tue, 10 Nov 2015 00:40:00 +0000 (01:40 +0100)]
nv50: expose two groups of compute-related MP perf counters
This turns on GL_AMD_performance_monitor.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ben Widawsky [Wed, 14 Oct 2015 03:50:27 +0000 (20:50 -0700)]
i965/gen9: Support fast clears for 32b float
SKL supports the ability to do fast clears and resolves of 32b RGBA as both
integer and floats. This patch only enables float color clears because we
haven't yet enabled integer color clears, (HW support for that was added in
BDW).
v2: Remove LUMINANCE16F and INTENSITY16F special cases since they are now
handled by Neil's patch to disable MSAA fast clears.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Ben Widawsky [Wed, 14 Oct 2015 03:50:24 +0000 (20:50 -0700)]
Revert "i965/gen9: Enable rep clears on gen9"
This reverts commit
8a0c85b25853decb4a110b6d36d79c4f095d437b.
It's not a strict revert because I don't want to bring back the gen < 9 check at
this point in time.
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Ben Widawsky [Wed, 14 Oct 2015 03:50:23 +0000 (20:50 -0700)]
Revert "i965/gen9: Disable MCS for 1x color surfaces"
This reverts commit
dcd59a9e322edeea74187bcad65a8e56c0bfaaa2.
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Ben Widawsky [Wed, 14 Oct 2015 03:50:22 +0000 (20:50 -0700)]
i965/meta/gen9: Individually fast clear color attachments
The impetus for this patch comes from a seemingly benign statement within the
spec (quoted within the patch).
It is very important for clearing multiple color buffer attachments and can be
observed in the following piglit tests:
spec/arb_framebuffer_object/fbo-drawbuffers-none glclear
spec/ext_framebuffer_multisample/blit-multiple-render-targets 0
v2: Doing the framebuffer binding only once (Chad)
Directly use the renderbuffers from the mt (Chad)
v3: Patch from Neil whose feedback I originally missed.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Ben Widawsky [Wed, 14 Oct 2015 03:50:21 +0000 (20:50 -0700)]
i965/skl: skip fast clears for certain surface formats
Some of the information originally in this commit message is now in the patch
before this.
SKL adds compressible render targets and as a result mutates some of the
programming for fast clears and resolves. There is a new internal surface type
called the CCS. The old AUX_MCS bit becomes AUX_CCS_D. "Auxiliary Surfaces For
Sampled Tiled Resource".
The formats which are supported are defined in the table titled "Render Target
Surface Types [SKL+]". There is no PRM yet to reference. The previously
implemented helper function already does the right thing provided the table is
correct.
v2: Use better English in commit message (Matt)
s/compressable/compressible/ (Matt)
Don't compare bools to true (Matt)
Use the helper function and don't increase the context size - this is mostly
implemented in the patch just before this (Chad, Neil)
Remove an "invalid" assert (Chad)
Fix assertion to check num_samples > 1, instead of num_samples (Chad)
v3:
Use Matt's code as Requested-by: Chad. I didn't even look at it since Chad said
he was fine with that, and presumably Matt is fine with it.
v4: Use better quote from spec (Topi)
Cc: Chad Versace <chad.versace@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ben Widawsky [Tue, 10 Nov 2015 20:16:54 +0000 (12:16 -0800)]
i965: Add lossless compression to surface format table
Background: Prior to Skylake and since Ivybridge Intel hardware has had the
ability to use a MCS (Multisample Control Surface) as auxiliary data in
"compression" operations on the surface. This reduces memory bandwidth. This
hardware was either used for MSAA compression, or fast clear operations. On
Gen8, a similar mechanism exists to allow the hiz buffer to be sampled from, and
therefore this feature is sometimes referred to more generally as "AUX buffers".
Skylake adds the ability to have the display engine directly source compressed
surfaces on top of the ability to sample from them. Inference dictates that
enabling this display features adds a restriction to the formats which could
actually be compressed. This is backed up by a blurb in the AUX_CCS_D section
from the RENDER_SURFACE_STATE: "In addition, if the surface is bound to the
sampling engine, Surface Format must be supported for Render Target Compression
for surfaces bound to the sampling engine." The current set of surfaces seems
to be a subset as compared to previous gens (see the next patch). Also, if I had
to guess I would guess that future gens add support for more surface formats. To
make handling this a bit easier to read, and more future proof, the support for
this is moved into the surface formats table.
Along with the modifications to the table, a helper function is also provided to
determine if a surface is CCS_E compatible. Because fast clears are currently
disabled on SKL, we can plumb the helper all the way through here, and not
actually have anything break.
v2:
- rename ccs to ccs_e; Requested-by: Chad
- rename lossless_compression to lossless_compression Requested-by: Chad
- change meaning of brw_losslessly_compressible_format Requested-by: Chad
- related changes to the code to reflect this.
- remove excess ccs (Chad)
v3:
- Commit message changes (Topi)
- Const some things which could be const (Topi)
Requested-by: Chad Versace <chad.versace@intel.com>
Requested-by: Neil Roberts <neil@linux.intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Ben Widawsky [Tue, 14 Apr 2015 21:57:51 +0000 (14:57 -0700)]
i965/skl: Add fast color clear infrastructure
Patch was originally called:
i965/skl: Enable fast color clears on SKL
Skylake introduces some differences in the way that fast clears are programmed
and in the restrictions for using fast clears. Since some of these are
non-obvious, and fast clears are currently disabled globally, we can enable the
simple stuff here and leave the weirder stuff and separately reviewable work.
Based on a patch originally from Kristian.
Note that within this patch the change in scaling factors could be achieved with
this hunk instead. I've opted to keep things more like how the docs describe it
however.
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -150,9 +150,13 @@ intel_get_non_msrt_mcs_alignment(struct brw_context *brw,
/* In release builds, fall through */
case I915_TILING_Y:
*width_px = 32 / mt->cpp;
- *height = 4;
+ if (brw->gen >= 9)
+ *height = 2;
+ else
+ *height = 4;
v2: Add braces for the multiline (Matt + Chad)
Comment updates (requested by Chad)
Modified commit message
Commit message from Chad explaining the MCS height change (Chad)
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Chad Versace <chad.versace@intel.com>
Ian Romanick [Fri, 20 Nov 2015 19:36:41 +0000 (11:36 -0800)]
docs: Add GL_EXT_shader_samples_identical to the release notes
Trivial
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Leo Liu [Tue, 10 Nov 2015 18:34:17 +0000 (13:34 -0500)]
radeon/vce: disable two pipe mode for stoney
Only one encoding pipe available for Stoney
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Tue, 3 Nov 2015 18:33:03 +0000 (13:33 -0500)]
radeon/vce: add new firmware interface support
Add new interface to create and encode
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Emil Velikov [Fri, 20 Nov 2015 15:12:56 +0000 (15:12 +0000)]
egl: don't forget to ship platform_x11_dri3.h into the tarball
Should have been a part of
f35198badeb
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 20 Nov 2015 14:59:27 +0000 (14:59 +0000)]
glsl: move builtin_type_macros.h into the correct list
Commit
b9b40ef9b76 moved the file, but forgot to update the reference in
the makefile. Thus the out of tree build was busted :\
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Fri, 20 Nov 2015 15:15:18 +0000 (15:15 +0000)]
automake: use static llvm for make distcheck
With llvm 3.7 semi-dropping the autoconf build, we rely on their cmake
build. With the latter of which annoyingly using another (busted?)
SONAME.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Brian Paul [Fri, 20 Nov 2015 16:34:11 +0000 (09:34 -0700)]
mesa: remove unused var in _mesa_PushDebugGroup()
Trivial.
Brian Paul [Thu, 19 Nov 2015 19:41:28 +0000 (12:41 -0700)]
mesa: whitespaces fixes in _mesa_one_time_init_extension_overrides()
Trivial.
Nicolai Hähnle [Wed, 18 Nov 2015 17:40:22 +0000 (18:40 +0100)]
radeon: ensure that timing/profiling queries are suspended on flush
The queries_suspended_for_flush flag is redundant because suspended queries
are not removed from their respective linked list.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 12 Nov 2015 14:09:21 +0000 (15:09 +0100)]
st/mesa: add support for batch driver queries to perfmon
v2 + v3: forgot null-pointer checks (spotted by Samuel Pitoiset)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Tue, 10 Nov 2015 16:04:32 +0000 (17:04 +0100)]
gallium/hud: add support for batch queries
v2 + v3: be more defensive about allocations
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Tue, 10 Nov 2015 13:06:59 +0000 (14:06 +0100)]
gallium: add the concept of batch queries
Some drivers (in particular radeon[si], but also freedreno judging from
a quick grep) may want to expose performance counters that cannot be
individually enabled or disabled.
Allow such drivers to mark driver-specific queries as requiring a new
type of batch query object that is used to start and stop a list of queries
simultaneously.
v3: adjust recently added nv50 queries
v2: documentation for create_batch_query
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Thu, 12 Nov 2015 11:30:23 +0000 (12:30 +0100)]
st/mesa: maintain active perfmon counters in an array
It is easy enough to pre-determine the required size, and arrays are
generally better behaved especially when they get large.
v2: make sure init_perf_monitor returns true when no counters are active
(spotted by Samuel Pitoiset)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Thu, 12 Nov 2015 11:02:44 +0000 (12:02 +0100)]
st/mesa: use BITSET_FOREACH_SET to loop through active perfmon counters
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Thu, 12 Nov 2015 10:53:22 +0000 (11:53 +0100)]
st/mesa: store mapping from perfmon counter to query type
Previously, when a performance monitor was initialized, an inner loop through
all driver queries with string comparisons for each enabled performance
monitor counter was used. This hurts when a driver exposes lots of queries.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Fri, 6 Nov 2015 13:19:54 +0000 (14:19 +0100)]
st/mesa: map semantic driver query types to underlying type
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Tue, 10 Nov 2015 13:41:52 +0000 (14:41 +0100)]
gallium/hud: remove unused field in query_info
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Nicolai Hähnle [Tue, 10 Nov 2015 12:35:01 +0000 (13:35 +0100)]
gallium: remove pipe_driver_query_group_info field type
This was only used to implement an unnecessarily restrictive interpretation
of the spec of AMD_performance_monitor. The spec says
A performance monitor consists of a number of hardware and software
counters that can be sampled by the GPU and reported back to the
application.
I guess one could take this as a requirement that counters _must_ be sampled
by the GPU, but then why are they called _software_ counters? Besides,
there's not much reason _not_ to expose all counters that are available,
and this simplifies the code.
v3: add a missing change in the nouveau driver (thanks Samuel Pitoiset)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Roland Scheidegger [Fri, 20 Nov 2015 03:49:23 +0000 (04:49 +0100)]
gallivm: use sampler index 0 for texel fetches
texel fetches don't use any samplers. Previously we just set the same
number for both texture and sampler unit (as per "ordinary" gl style
sampling where the numbers are always the same) however this would trigger
some assertions checking that the sampler index isn't over PIPE_MAX_SAMPLERS
limit elsewhere with d3d10, so just set to 0.
(Fixing the assertion instead isn't really an option, the sampler isn't
really used but might still pass an out-of-bound pointer around and even
copy some things from it.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Ilia Mirkin [Fri, 20 Nov 2015 00:17:04 +0000 (19:17 -0500)]
freedreno/a4xx: add BPTC support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
François Tigeot [Tue, 17 Nov 2015 17:54:01 +0000 (18:54 +0100)]
xmlconfig: Add support for DragonFly
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Mauro Rossi [Sat, 7 Nov 2015 00:23:46 +0000 (01:23 +0100)]
android: export the path of glsl nir headers
The change is necessary to avoid building errors in glsl and i965
modules due to missing glsl_types.h header
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Boyan Ding [Fri, 20 Nov 2015 11:11:19 +0000 (11:11 +0000)]
mesa: re-enable KHR_debug for ES contexts
With the earlier issues resolved we can expose the extension.
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Boyan Ding [Sun, 8 Nov 2015 09:56:40 +0000 (17:56 +0800)]
main: Don't restrict several KHR_debug enum to desktop GL
In preparation for supporting GL_KHR_debug in OpenGL ES
v2: add a missing hunk in _mesa_IsEnabled (Emil)
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Thu, 5 Nov 2015 20:22:25 +0000 (20:22 +0000)]
mesa: use the correct string for the ES GL_KHR_debug functions
As defined in the spec
when implemented in an OpenGL ES context, all entry points defined
by this extension must have a "KHR" suffix.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Gregory Hainaut [Sun, 25 Oct 2015 14:01:36 +0000 (15:01 +0100)]
glsl: avoid linker and user varying location to overlap
Current behavior on the interface matching:
layout (location = 0) out0; // Assigned to VARYING_SLOT_VAR0 by user
out1; // Assigned to VARYING_SLOT_VAR0 by the linker
New behavior on the interface matching:
layout (location = 0) out0; // Assigned to VARYING_SLOT_VAR0 by user
out1; // Assigned to VARYING_SLOT_VAR1 by the linker
v4:
* Fix variable name in assert
Signed-off-by: Gregory Hainaut <gregory.hainaut@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Emil Velikov [Fri, 6 Nov 2015 23:39:01 +0000 (23:39 +0000)]
auxiliary/vl/dri2: coding style fixes
Rewrap long(ish) lines, add space between struct foo and *.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:25:59 +0000 (11:25 +0000)]
auxiliary/vl/dri2: hide internal functions
Analogous to previous commit. While we're here prefix all functions
identically -> vl_dri2_foo
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:24:35 +0000 (11:24 +0000)]
auxiliary/vl/drm: hide internal functions
As of last commit everyone is using the vl_screen dispatch, thus we can
hide this function from the headers and make it static.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Fri, 6 Nov 2015 23:12:13 +0000 (23:12 +0000)]
st/vdpau: use the vl_screen dispatch
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Fri, 6 Nov 2015 23:02:14 +0000 (23:02 +0000)]
st/xvmc: use the vl_screen dispatch
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:23:37 +0000 (11:23 +0000)]
st/va: use the vl_screen dispatch
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Fri, 6 Nov 2015 22:45:38 +0000 (22:45 +0000)]
st/omx: use the vl_screen dispatch
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Fri, 6 Nov 2015 22:40:34 +0000 (22:40 +0000)]
auxiliary/vl/dri2: setup the dispatch
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:34:48 +0000 (11:34 +0000)]
auxiliary/vl/drm: use a label for the error path
... just like every other place in gallium.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:18:14 +0000 (11:18 +0000)]
auxiliary/vl/drm: setup the dispatch
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Fri, 6 Nov 2015 22:34:01 +0000 (22:34 +0000)]
auxiliary/vl: add dispatch table
As mentioned previously, it will allow us to use different vl backend in
a generic way from either video state-tracker.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:17:07 +0000 (11:17 +0000)]
auxiliary/vl: rename vl_screen_create to vl_dri2_screen_create
In a preparation of having proper multi-platform/backend handling in VL.
With follow up commits we'll introduce a dispatch within vl_screen
similar to the one in pipe_screen. This way any VL state-tracker can
operate seamlessly, considering the backend/platform is properly setup.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:14:56 +0000 (11:14 +0000)]
st/va: trivial cleanup
Drop the temporary variable and fold the two conditional.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Mon, 9 Nov 2015 11:03:01 +0000 (11:03 +0000)]
st/omx: straighten get/put_screen
The current code is busted in a number of ways.
- initially checks for omx_display (rather than omx_screen), which may
or may not be around.
- blindly feeds the empty env variable string to loader_open_device()
- reads the env variable every time get_screen is called
- the latter manifests into memory leaks, and other issues as one sets
the variable between two get_screen calls.
Additionally it cleans up a couple of extra bits
- drops unneeded set/check of omx_display.
- make the teardown (put_screen) order was not symmetrical to the setup
(get_screen)
v2: Drop the "is empty string" check (Leo)
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Emil Velikov [Thu, 19 Nov 2015 15:36:03 +0000 (15:36 +0000)]
automake: loader: don't create an empty dri3 helper
Seems that creating an empty one does not fair too well with MacOSX's
ar. Considering that all the users of the helper include it only when
needed, let's reshuffle the makefile.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92985
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 19 Nov 2015 15:34:20 +0000 (15:34 +0000)]
automake: loader: honour the XCB_DRI3 cflags
Without this the compilation will fail, as the headers are installed in
a non-default location.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 19 Nov 2015 15:50:50 +0000 (15:50 +0000)]
automake: egl: add symbols test
Should help us catch issues where we expose any extra symbols by
mistake. Just like the ones fixes with previous commit.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Matt Turner <mattst88@gmail.com>
Emil Velikov [Thu, 19 Nov 2015 15:31:06 +0000 (15:31 +0000)]
automake: loader: rework the CPPFLAGS
Rather than duplicating things, just use the generic AM_CPPFLAGS. This
has the fortunate side-effect of adding VISIBILITY_CFLAGS for the dri3
helper. The latter of which was erroneously exposing some internal
symbols.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Tested-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Wed, 18 Nov 2015 01:57:08 +0000 (17:57 -0800)]
i965: Enable EXT_shader_samples_identical
On the vec4 backend, textureSamplesIdentical() will always return
false. There are currently no test cases for the vec4 backend, so we
don't have much confidence in any implementation. We also don't think
anyone is likely to miss it.
v2: Handle immediate value for MCS smarter. Rebase on changes to
nir_texop_sampels_identical (missing second parameter). Suggested by
Jason.
v3: Add Neil's code to handle 16x MSAA in the FS. Also rebase on top of
f9a9ba5e. Stub out the vec4 implementation.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Neil Roberts <neil@linux.intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com> [v2]
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz> [v2]
Ian Romanick [Wed, 18 Nov 2015 03:31:39 +0000 (19:31 -0800)]
i965/vec4: Handle nir_tex_src_ms_index more like the scalar
v2: Rebase on top of
f9a9ba5e.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ian Romanick [Wed, 18 Nov 2015 01:09:09 +0000 (17:09 -0800)]
nir: Add nir_texop_samples_identical opcode
This is the NIR analog to GLSL IR ir_samples_identical.
v2: Don't add the second nir_tex_src_ms_index parameter. Suggested by
Ken and Jason.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ian Romanick [Wed, 18 Nov 2015 00:59:40 +0000 (16:59 -0800)]
glsl: Add textureSamplesIdenticalEXT built-in functions
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ian Romanick [Wed, 18 Nov 2015 00:54:31 +0000 (16:54 -0800)]
glsl: Add ir_samples_identical opcode
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ian Romanick [Tue, 17 Nov 2015 23:36:15 +0000 (15:36 -0800)]
glsl: Extension tracking for EXT_shader_samples_indentical
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ian Romanick [Tue, 17 Nov 2015 23:32:10 +0000 (15:32 -0800)]
mesa: Extension tracking for EXT_shader_samples_indentical
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Ian Romanick [Tue, 17 Nov 2015 23:26:27 +0000 (15:26 -0800)]
Import current draft of EXT_shader_samples_identical spec
v2: Add Neil to the list of contributors. I meant to do that before,
but Matt reminded me.
v3: Fix typos noticed by Nicolai.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Rob Clark [Thu, 5 Nov 2015 15:23:48 +0000 (10:23 -0500)]
nir: add nir_ssa_for_alu_src()
Using something like:
numer = nir_ssa_for_src(bld, alu->src[0].src,
nir_ssa_alu_instr_src_components(alu, 0));
for alu src's with swizzle, like:
vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
vec2 ssa_2 = udiv ssa_10.xx, ssa_11
ends up turning into something like:
vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
vec2 ssa_13 = imov ssa_10
...
because nir_ssa_for_src() ignore's the original nir_alu_src's swizzle.
Instead for alu instructions, nir_src_for_alu_src() should be used to
ensure the original alu src's swizzle doesn't get lost in translation:
vec1 ssa_10 = intrinsic load_uniform () () (0, 0)
vec2 ssa_11 = intrinsic load_uniform () () (1, 0)
vec2 ssa_13 = imov ssa_10.xx
...
v2: check for abs/neg, and re-use existing nir_alu_src
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Rob Clark [Wed, 4 Nov 2015 21:10:52 +0000 (16:10 -0500)]
nir: fix missing increments of num_inputs/num_outputs
Note: not quite perfect, we should use type_size vfunc (in
compiler_options or nir_shader?) to determine how much we
increment num_inputs/outputs/uniforms. But we don't have
that yet, so let's at least fix things for the existing
users of these passes.
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Rob Clark [Wed, 4 Nov 2015 15:05:32 +0000 (10:05 -0500)]
nir/print: show # of uniforms/inputs/outputs
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Rob Clark [Mon, 26 Oct 2015 17:29:45 +0000 (13:29 -0400)]
nir/print: show shader name/label if set
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Rob Clark [Mon, 19 Oct 2015 15:57:51 +0000 (11:57 -0400)]
nir: add nir_var_all enum
Otherwise, passing -1 gets you:
error: invalid conversion from 'int' to 'nir_variable_mode' [-fpermissive]
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Ilia Mirkin [Thu, 19 Nov 2015 06:37:14 +0000 (01:37 -0500)]
freedreno/a4xx: fix 5_5_5_1 texture sampler format
This fixes teximage-colors, fbo-generatemipmap-formats, and probably
others (in relation to the RGB5 formats, others still fail).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Ilia Mirkin [Thu, 19 Nov 2015 05:32:39 +0000 (00:32 -0500)]
freedreno/a4xx: add depth clamp and halfz clip
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 19 Nov 2015 05:06:46 +0000 (00:06 -0500)]
freedreno/a4xx: allow seamless cubemap filtering to be enabled per-texture
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Thu, 19 Nov 2015 04:54:25 +0000 (23:54 -0500)]
freedreno/a4xx: support lod_bias
The lower layers assume that we support this, and it's been core since
GL 1.4. This fixes a slew of piglit tests, especially around
tex-miplevel-selection.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Samuel Pitoiset [Thu, 19 Nov 2015 08:51:03 +0000 (09:51 +0100)]
nv50: allow using inline vertex data submit when gl_VertexID is used
The hardware can actually generates vertexid when vertices come from
a client-side buffer like when glDrawElements is used.
This doesn't fix (or break) any piglit tests but it improves the
previous attempt of Ilia (
c830d19 "nv50: avoid using inline vertex
data submit when gl_VertexID is used")
The only disadvantage is that only works on G84+, but we don't really
care of that weird and old NV50 chipset.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Samuel Pitoiset [Thu, 19 Nov 2015 08:51:02 +0000 (09:51 +0100)]
nv50: add NV84_3D macro
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Matt Turner [Mon, 2 Nov 2015 20:25:24 +0000 (12:25 -0800)]
i965: Drop IMM fs_reg/src_reg -> brw_reg conversions.
The previous two commits make this unnecessary.
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Mon, 2 Nov 2015 20:12:44 +0000 (12:12 -0800)]
i965/vec4: Replace src_reg(imm) constructors with brw_imm_*().
Cuts 1.5k of .text.
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Mon, 2 Nov 2015 19:28:35 +0000 (11:28 -0800)]
i965/fs: Use brw_imm_uw().
W/UW immediates are 16-bits, but those 16-bits must be replicated
in the high 16-bits of the 32-bit field.
Remove the useless W/UW immediate saturating code, since we'll now be
using the appropriate immediate (and W/UW immediates in the IR can now
no longer be larger than 16-bits).
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Mon, 2 Nov 2015 19:26:16 +0000 (11:26 -0800)]
i965/fs: Replace fs_reg(imm) constructors with brw_imm_*().
Cuts 10k of .text, of which only 776 bytes are the fs_reg constructor
implementations themselves.
text data bss dec hex filename
5204535 214112 27784
5446431 531b1f i965_dri.so before
5193977 214112 27784
5435873 52f1e1 i965_dri.so after
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Mon, 2 Nov 2015 18:29:45 +0000 (10:29 -0800)]
i965: Make brw_imm_vf4() take 8-bit restricted floats.
This partially reverts commit
bbf8239f92ecd79431dfa41402e1c85318e7267f.
I didn't like that commit to begin with -- computing things at compile
time is fine -- but for purposes of verifying that the resulting values
are correct, looking up 0x00 and 0x30 in a table is a lot better than
evaluating a recursive function.
Anyway, by making brw_imm_vf4() take the actual 8-bit restricted floats
directly (instead of only integral values that would be converted to
restricted float), we can use this function as a replacement for the
vector float src_reg/fs_reg constructors.
brw_float_to_vf() is not currently an inline function, so it will not be
evaluated at compile time. I'll address that in a follow-up patch.
Reviewed-by: Emil Velikov <emil.velikov@collabora.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Nanley Chery [Wed, 18 Nov 2015 23:01:44 +0000 (15:01 -0800)]
mesa: Add test for sorted extension table
Enable developers to know if the table's alphabetical sorting
is maintained or lost.
v2: Move "*" next to pointer name (Matt)
Include extensions_table.h instead of extensions.h (Ian)
Remove extra " *" in comment (Ian)
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Nanley Chery [Wed, 18 Nov 2015 23:01:43 +0000 (15:01 -0800)]
mesa/extensions: Sort the extension table alphabetically
Make it easier to determine where to add new extensions.
Performed with the vim sort command.
v2: Insert newline after last #define (Matt)
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ilia Mirkin [Thu, 19 Nov 2015 17:25:53 +0000 (12:25 -0500)]
docs: GL3.1 for a3xx and a4xx
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ryan Houdek [Thu, 5 Nov 2015 17:07:08 +0000 (11:07 -0600)]
mesa: enable EXT_blend_func_extended if the driver supports the ARB version
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>