i965/vec4: Rewrite dead code elimination to use live in/out.

Improves 359 shaders by >=10%
         114 shaders by >=20%
          91 shaders by >=30%
          82 shaders by >=40%
          22 shaders by >=50%
           4 shaders by >=60%
           2 shaders by >=80%

total instructions in shared programs: 5845346 -> 5822422 (-0.39%)
instructions in affected programs:     364979 -> 342055 (-6.28%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Track liveness of the flag register.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Remove opt_drop_redundant_mov_to_flags().

Dead code elimination now handles this.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Use const fs_reg & rather than a copy or pointer.

Also while we're touching var_from_reg, just make it an inline function.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Dead code eliminate instructions writing the flag.

Most prominently helps Natural Selection 2, which has a surprising
number shaders that do very complicated things before drawing black.

instructions in affected programs:     21052 -> 16978 (-19.35%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Track liveness of the flag register.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Use local pointer to block_data in live intervals.

The next patch will be simplified because of this, and makes reading the
code a lot easier.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Make live_intervals part of the vec4_visitor class.

Like in fs_visitor.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Treat the FB_WRITE as predicated if we're discarding.

Pre-Haswell hardware couldn't actually predicate it, but it's easier to
pretend as if it's predicated in the visitor since it will generate a
MOV from f0.1.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Don't treat IF or WHILE with cmod as writing the flag.

Sandybridge's IF and WHILE instructions can do an embedded comparison
with conditional mod.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/disasm: Disassemble tdr and tm registers properly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

main, glsl: Bump max known desktop glsl version to 4.50

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl/cs: Change gl_WorkGroupSize from ivec3 to uvec3

As documented in:

https://www.opengl.org/registry/specs/ARB/compute_shader.txt

  const uvec3 gl_WorkGroupSize;

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: avoid anonymous struct in float <-> VF conversions

Anonymous structures are only supported with newer versions of
GCC.  They will not work with GCC 4.2.1 used by OpenBSD or
GCC 4.4.7 shipped with RHEL6 going by a commit to fix a similiar
problem in radeonsi earlier in the year
(74388dd24bc7fdb9e62ec18096163f5426e03fbf).

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>

mesa: fix arithmetic error in _mesa_compute_compressed_pixelstore()

We need parenthesis around the expression which computes the number of
blocks per row.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>

vbo: also print buffer object pointer in vbo_print_vertex_list()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: some improvements for print_list()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: inline/remove _mesa_polygon_stipple()

Was not called from any other place.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

svga: fix comment typo

mesa: remove unused functions in prog_execute.c

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: update glext.h to version 20141118

gallium: add include path to fix building of pipe-loader code

The pipe-loader code wasn't finding util/u_atomic.h

Reviewed-by: Matt Turner <mattst88@gmail.com>

graw: Avoid 'near'/'far' variables.

They are defined by windows.h, which got included slightly more
frequently than before with u_atomic.h

i965/fs: Clean up some whitespace in reg_allocate.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

ra: Don't use regs as the ralloc context.

The i965 backends pass something out of 'screen', which is allocated
per-process, making using this as a ralloc context not thread-safe.

All callers ra_alloc_interference_graph() already ralloc_free() its
return value.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

i965: Initialize INTEL_DEBUG once per process.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

i965: Initialize compaction tables once per process.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

glsl: Initialize static temporaries_allocate_names once per process.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

util/u_atomic: Fix the unlocked implementation.

It was totally broken:

- p_atomic_dec_zero() was returning the negation of the expected value

- p_atomic_inc_return()/p_atomic_dec_return() was
  post-incrementing/decrementing, hence returning the old value instead
  of the new

- p_atomic_cmpxchg() was returning the new value on success, instead of
  the old

It is clear this never used in the past. I wonder if it wouldn't be better to
yank it altogether.

Reviewed-by: Matt Turner <mattst88@gmail.com>

util/u_atomic: Add a simple test.

It was much easier for me to verify things build and run as expected
with this simple test, than building and testing whole Mesa.

With scons the test can be build and run merely by doing:

  scons u_atomic_test

Building the test with autotools is left as a future exercise.

Reviewed-by: Matt Turner <mattst88@gmail.com>

util: Make u_atomic.h typeless.

like how C11's stdatomic.h provides generic functions. GCC's __sync_*
builtins already take a variety of types, so that's simple.

MSVC and Sun Studio don't, but we can implement it with something that
looks a little crazy but is actually quite readable.

Thanks to Jose for some MSVC fixes!

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util: Use stdbool.h's bool rather than "boolean".

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util: Remove u_atomic.h's GCC inline assembly.

GCC >= 4.1 support the __sync_* intrinsics. That seems like a
sufficiently old baseline.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util: Remove u_atomic.h's MSVC inline assembly.

There was already an intrinsics path that implemented all of the same
functions, plus more.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util: Remove u_atomic.h's Gallium dependence.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util: s/INLINE/inline/ in u_atomic.h.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

util: Move u_atomic.h to src/util.

To be shared outside of Gallium.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

vc4: Introduce scheduling of QPU instructions.

This doesn't reschedule much currently, just tries to fit things into the
regfile A/B write-versus-read slots (the cause of the improvements in
shader-db), and hide texture fetch latency by scheduling setup early and
results collection late (haven't performance tested it).  This
infrastructure will be important for doing instruction pairing, though.

shader-db2 results:
total instructions in shared programs: 61874 -> 59583 (-3.70%)
instructions in affected programs:     50677 -> 48386 (-4.52%)

vc4: Drop the explicit scoreboard wait.

This is actually implicitly handled by the TLB operations.

vc4: Also deal with VPM reads at thread end.

Prevents a regression with QPU scheduling, which happens to put the no-op
reads for unused VPM contents end up at the end of the program.

vc4: Fix assertion about SFU versus texturing.

We're supposed to be checking that nothing else writes r4, which is done
by the TMU result collection signal, not the coordinate setup.

Avoids a regression when QPU instruction scheduling is introduced.

vc4: Add another check for invalid TLB scoreboard handling.

This was caught by an assertion in the simulator.

freedreno/a4xx: invalidate cache when vbo's change

Otherwise vertex shader can see stale cache data.  This in particular
happens when the same vbo is updated and reused.  Not sure yet if vbo's
at differing addresses but bound to same vertex buffer slot could have
issues, but seems safest to flush whenever new vertex buffers are bound.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

st/mesa: avoid exposing EXT_texture_integer for pre-GLSL 1.30

For drivers building up to GL(ES)3, only expose the actual extension if
the API will let it be used (e.g. via overrides/debug flags that enable
higher versions).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

freedreno/a3xx: add missing integer formats and enable rendering

The mesa state tracker doesn't fall back on similar integer formats, so
they must all be provided. Remove the restriction against integer color
rendering.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: enable sampling from integer textures

We need to produce a u32 destination type on integer sampling
instructions, so keep that in a shader key set based on the
currently-bound textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno: allow each generation to hook into sampler view setting

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: don't use half precision shaders for int/float32

Integer outputs end up getting mangled due to cov.f32f16, and float32
loses precision. Use full precision shaders in both of those cases.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: disable blending for integer formats

Also add support for the BLENDABLE bind flag, similarly predicated on
non-int formats.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: remove blend clamp enables from gmem/clears

Just pass the data through unmolested. This probably has no effect since
blending isn't actually enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add format to emit info, use to set sint/uint flags

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/a3xx: add 16-bit unorm/snorm texture formats

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/ir3: remove unused arg parameter

Leaving it around in the struct in case we want to use it later.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/ir3: fix UMAD

Looks like none of the mad variants do u16 * u16 + u32, so just add in
the extra value "by hand".

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>

freedreno/a4xx: stencil fixes

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno: update generated headers

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/a4xx: add render target format to fd4_emit

This lets us move emitting SP_FS_MRT_REG back to fd4_program_emit.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno/a3xx: unify vertex/texture formats into a single table

The table contains all the relevant information about each format. The
helper functions now just do lookups in the table.

Note that this adds support for a lot of formats that were previously
unsupported. Additionally it adds disabled support for integer render
buffers, which will require more work to actually enable.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>

freedreno/a3xx: rename vertex/texture format enums to be more consistent

Switch both of them from independently inconsistent conventions to having
UINT/SINT/UNORM/SNORM/FLOAT/FIXED suffixes.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>

freedreno/a3xx: fd3_util -> fd3_format

All the "util" helpers are actually format-related

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robclark@freedesktop.org>

freedreno/a3xx: only enable blend clamp for non-float formats

This fixes arb_color_buffer_float-render GL_RGBA16F.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Rob Clark <robclark@freedesktop.org>

i965: Add _CACHE_ in brw_cache_id enum names.

BRW_CACHE_VS_PROG is more easily associated with program caches than
plain BRW_VS_PROG.

While we're at it, rename BRW_WM_PROG to BRW_CACHE_FS_PROG, to move away
from the outdated Windowizer/Masker name.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Move CACHE_NEW_SAMPLER to BRW_NEW_SAMPLER_STATE_TABLE.

This flag signifies that we've emitted a new SAMPLER_STATE table.
Given that we haven't cached those in years, CACHE_NEW_SAMPLER isn't
a great name.  Putting it in the BRW_NEW_* hierarchy would make more
sense; BRW_NEW_SAMPLER_STATE_TABLE better reflects its actual purpose.

When this flag is raised, the pointer to the SAMPLER_STATE table has
changed, so we need to re-issue any packets which point to it (unit
state on Gen4-5, 3DSTATE_SAMPLER_STATE_POINTERS on Gen6, and the
per-stage variants on Gen7+).

Saves 2 * sizeof(void *) bytes per context, as we remove useless
aux_compare/aux_free function pointers.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Move some /* CACHE_NEW_SAMPLER */ comments.

Marking brw_stage_state::sampler_count as CACHE_NEW_SAMPLER is wrong.

The number of samplers used by each program is actually computed at
draw time (brw_try_draw_prims), based purely on the currently bound
shader programs (gl_program::SamplersUsed).

CACHE_NEW_SAMPLER means that we've emitted a new SAMPLER_STATE table.
Although this could indicate that the number of samplers has changed,
it could also simply mean that the contents of the table has changed
(i.e. we've bound different textures).

The real reason these atoms depend on CACHE_NEW_SAMPLER is because they
include a pointer to the SAMPLER_STATE table.  This was not commented.

So, move the comments to the appropriate place.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Move CACHE_NEW_*_VP flags to BRW_NEW_*_VP.

We've been streaming these out for ages, so they basically have nothing
to do with brw_state_cache.c.

Saves 6 * sizeof(void *) bytes per context, as we won't have useless
aux_compare/aux_free functions for them.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Fold the gen7_cc_viewport_state_pointer atom into brw_cc_vp.

These always happen together; the extra atom just means another item to
iterate through, flags to check, and a call through a function pointer.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Combine CACHE_NEW_*_UNIT into BRW_NEW_GEN4_UNIT_STATE.

On Gen4-5, unit state is specified as indirect state, rather than
commands.  If any unit state changes, we upload it via brw_state_batch
and arrange for 3DSTATE_PIPELINED_POINTERS to be re-emitted, which
updates pointers to all unit state at once.

Since there's only one command and state atom (brw_psp_urb_cs) that
needs to know about this, there's no benefit to having six separate
flags.  We can combine CACHE_NEW_*_UNIT into a single flag.

We also haven't cached these in a long time, so it doesn't make sense
to use the "CACHE_NEW_" prefix.  Instead, use the "BRW_NEW_" prefix.

This also saves 12 * sizeof(void *) bytes of memory per context, as
we remove useless aux_compare/aux_free functions for each CACHE bit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Alphabetize brw_tracked_state flags and use a consistent style.

Most of the dirty flags were listed in some arbitrary order.  Some used
bonus parenthesis.  Some put multiple flags on one line, others put one
per line.  Some used tabs instead of spaces...but only on some lines.

This patch settles on one flag per line, in alphabetical order, using
spaces instead of tabs, and sheds the unnecessary parentheses.

Sorting was mostly done with vim's visual block feature and !sort,
although I alphabetized short lists by hand; it was pretty manual.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

nv50/ir/tgsi: handle TGSI_OPCODE_ARR

This instruction is used by st/nine.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.4" <mesa-stable@lists.freedesktop.org>

i965: Set prog_data->uses_kill if simulating alpha test via discards.

When using MRT on Gen4-5, we have to simulate GL's alpha test feature
by emitting discards in the fragment shader.  In this case, it makes
sense to set prog_data->uses_kill, which means the fragment shader may
kill pixels via the discard mechanism.

This saves us from having to look an extra key value in a couple of
places, including in the generator.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Use brw_wm_prog_data::uses_kill, not gl_fragment_program::UsesKill

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Pass key->render_to_fbo via src1 of FS_OPCODE_DDY_*.

This means the generator doesn't have to look at the key, which is a
little nicer - we're pretty close to no key dependencies at all.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/fs: Handle derivative quality decisions in the front-end.

Kristian noted that there's very little use of brw_wm_prog_key in the
generator, and that it basically just generates what it's told, without
caring about what stage it's handling.

One exception to this is derivative handling.  When handling dFdxCoarse
and dFdxFine, we packed an enum value in a second source register,
explicitly telling the generator what to do.  For dFdx, we specified an
enum value of "please use the hint", then checked the program key in the
generator level code.

A natural method is to define separate FS_OPCODE_DD[XY]_{COARSE,FINE}
opcodes, and have the front-end (which already decides what IR to
generate based on the program key) decide which dPdx/dPdy should
correspond to.  This consolidates the decision making in one place.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Create prog_data temporary variables in PS state upload code.

prog_data->foo is a bit more readable than brw->wm.prog_data->foo.
The local variable definition is also a great location to put the
obligatory /* CACHE_NEW_WM_PROG */ comment.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Fix missing CACHE_NEW_WM_PROG in 3DSTATE_PS_EXTRA.

brw->wm.prog_data is covered by CACHE_NEW_WM_PROG, not
BRW_NEW_FRAGMENT_PROGRAM.  So, we should listen to it.

However, I believe that BRW_NEW_FRAGMENT_PROGRAM is sufficient to cover
all the necessary cases - CACHE_NEW_WM_PROG happens in a subset of
cases.  So, the code being wrong shouldn't have triggered bugs.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

nv50: remove ancient map of rt formats

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

freedreno/ir3: don't pass consts to madsh.m16 in MOD logic

madsh.m16 can't handle a const in src1, make sure to unconst it

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>

docs: Set llvmpipe and softpipe note only for MSAA.

Right now, in mesamatrix.net, the footnote is set so that it seems to be
for all the features, while actually it only applies to MSAA.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

glsl: Use | action in the lexer source to avoid duplicating the float action

Flex and lex have a special action ‘|’ which means to use the same action as
the next rule. We can use this to reduce a bit of code duplication in the
rules for the various float literal formats.

Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Disallow float literals with the 'f' suffix but no point or exponent

According to the GLSL spec float literals like ‘1f’ shouldn't be allowed
without adding a decimal point or an exponent. Apparently the AMD driver also
disallows this so it seems unlikely that anything would be relying on it.

Reviewed-by: Matt Turner <mattst88@gmail.com>

r600g: make llvm code compile this time

Actually compiling the code helps make it compile.

Cc: "10.3 10.4" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600g: fix fallout from last patch

I accidentally rebased from the wrong machine and missed some
fixes that were on my r600 box.

doh.

this fixes a bunch of geom shader textureSize tests on rv635
from gpu reset to pass.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86760
Reported-by: wolput@onsneteindhoven.nl
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

r600g: merge the TXQ and BUFFER constant buffers (v1.1)

We are using 1 more buffer than we have, although in the future the
driver should just end up using one buffer in total probably, this
is a good first step, it merges the txq cube array and buffer info
constants on r600 and evergreen.

This should in theory fix geom shader tests on r600.

v1.1: fix comments from Glenn.

Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
Cc: "10.4 10.3" <mesa-stable@lists.freedesktop.org
Signed-off-by: Dave Airlie <airlied@redhat.com>

glapi: Remove dead mesadef.py.

Dead since commit 4e120c97, in which apiparser (which mesadef.py imports)
was removed.

Reviewed-by: José Fonseca <jfonseca@vmware.com>

mesa/gdi: Don't pretend mesa.def is auto generated.

Just use the same entrypoints we use for st/wgl's opengl32.dll.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

st/wgl: Don't export wglGetExtensionsStringARB.

It's not exported by the official opengl32.dll neither.  Applications are
supposed to get it via wglGetProcAddress(), not GetProcAddress().

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

mapi/glapi: Fix dll linkage of GLES1 symbols.

This fixes several MSVC warnings like:

  warning C4273: 'glClearColorx' : inconsistent dll linkage

In fact, we should avoid using `declspec(dllexport)` altogether, and use
exclusively the .DEF instead, which gives more precise control of which
symbols must be exported, but all the public GL/GLES headers practically
force us to pick between `declspec(dllexport)` or
`declspec(dllimport)`.

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

util/u_snprintf: Don't redefine HAVE_STDINT_H as 0.

We now always guarantee availability of stdint.h on MSVC -- if MSVC
doesn't supply one we use our own.

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: Removed unused variable.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

draw,gallivm,llvmpipe: Avoid implicit casts of 32-bit shifts to 64-bits.

Addresses MSVC warnings "result of 32-bit shift implicitly converted to
64 bits (was 64-bit shift intended?)", which can often be symptom of
bugs, but in these cases were all benign.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

scons: Generate SSE2 floating-point arithmetic.

- SSE2 is available on all x86 processors we care about.

- It's recommended by Intel:

  https://software.intel.com/en-us/blogs/2012/09/26/gcc-x86-performance-hints

- And has been the default since MSVC 2012:

  http://msdn.microsoft.com/en-us/library/7t5yh4fd(v=vs.110).aspx

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

scons: Remove dead code/comments.

- Remove no-op if-clause.

- -mstackrealign has been enabled again on MinGW for quite some time and
  appears to work alright nowadays.

- Drop -mmmx option as it is implied my -msse, and we don't use MMX
  intrinsics anyway.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

st/nine: fix formatting in query9 (cosmetic)

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: Fix setting of the shift modifier in nine_shader

It is an sint_4, but it was stored in a uint_8...
The code using it was acting as if it was signed.

Problem found thanks to Coverity

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Tested-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: remove unused pipe_viewport_state::translate[3] and scale[3]

2efabd9f5a711a7f6cd1846630244b7814bf25b3 removed them as unused.

This caused random memory overwrites (reported by Coverity).

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: David Heidelberg <david@ixit.cz>

st/nine: fix wrong variable reset

Error detected by Coverity (COPY_PASTE_ERROR)

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: David Heidelberg <david@ixit.cz>

st/nine: return GetAvailableTextureMem in bytes as expected (v2)

PIPE_CAP_VIDEO_MEMORY returns the amount of video memory in megabytes,
so need to converted it to bytes.

Fixed Warframe memory detection.

v2: also prepare for cards with more than 4GB memory

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Tested-by: Yaroslav Andrusyak <pontostroy@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: David Heidelberg <david@ixit.cz>

st/nine: Add pool check to SetTexture (v2)

D3DPOOL_SCRATCH is disallowed according to spec.
D3DPOOL_SYSTEMMEM should be allowed but we don't handle it right for now.

v2: Fixes segfault in SetTexture when unsetting the texture

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Tested-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: propertly declare constants (v2)

Fixes "Error : CONST[20]: Undeclared source register" when running
dx9_alpha_blending_material. Also artifacts on ilo.

v2: also remove unused MISC_CONST

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Tested-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Axel Davy <axel.davy@ens.fr>

st/nine: call DBG() at more external entry points

Cc: "10.4" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Stanislaw Halik <sthalik@misaki.pl>