docs: Add MD5 checksum, etc. for 10.1 release

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit 28d41e409d74aabe35f1031e759179e82cb760b4)

gk110/ir: emit saturate flag on fadd when needed

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

gk110/ir: fix slct emission

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

st/mesa: remove extra calculation of sampler count

This code was originally introduced to fix https://bugs.freedesktop.org/show_bug.cgi?id=53617. The comment says you need to pass NULL in order to unref old views however cso_set_sampler_views() already takes care of old views with the second for loop. Also as of 2355a6441435b8e66a032c44f0794066338e30a3 cso_set_sampler_views() passes the max of the old and new views to the driver for all state trackers making this code obsolete.

Signed-off-by: Timothy Arceri <t_arceri@yahoo.com.au>
Reviewed-by: Brian Paul <brianp@vmware.com>

gk110/ir: fix interp mode emission

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

gk110/ir: fix ISAD emission with register args

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

gk110/ir: fix quadon opcode emission

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nvc0: don't bother trying to set up compute for gk110+

The nouveau fw currently prints a bunch of errors. No point in seeing
those all the time, esp since compute doesn't really work in the first
place.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

gk110: add in forgotten code for gk110 isa

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

gk110/ir: emit texbar the same way that the blob does

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

scons: Search only for mingw-w64 cross-compilers.

Some distros still ship the non-mingw-w64 cross-compilers, but they are
can't build Mesa properly, as Jakob pointed out.

i915g: Remove 4444 and 5551 formats

They don't seem to work 100%, I need to investigate but in the
meantime let's remove them.

nvc0/ir: Handle OP_POPCNT when folding constant expressions

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: make sure to only fold 1-arg popcnt in opnd]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0/ir: Handle OP_BFIND when folding constant expressions

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50/ir: clear subop when folding constant expressions

Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF) might have a subop set.
After folding, make sure that it is cleared

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

i965: Support GL_CLAMP natively on Broadwell.

The new hardware actually supports this OpenGL 1.x feature natively,
so we can finally drop our shader workarounds.

Not many applications use GL_CLAMP, and most use it unintentionally, but
it's trivial to do right, so we should.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965: Pass brw to translate_wrap_mode().

This lets us do generation checks.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965: use _mesa_align_malloc in intel_miptree_map_movntdqa

This fixes case where we have 1x1 size buffer and misalignment is 0.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79616

i965/fs: Allow array dereference of HW_REG.

When dereferencing an element of gl_SampleMaskIn[], the source register
here will be a HW_REG rather than a VGRF because the payload slot is
now exposed directly.

Fixes an assertion failure in the Piglit test:

   tests/spec/arb_gpu_shader5/execution/samplemaskin-basic

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

st/omx/enc: enable b frames

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

radeon/vce: implement h264 profile support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/omx/enc: implement h264 profile support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

vl: add more avc profiles

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

wgl: Disable CRT message boxes when Windows system error messages boxes are disabled.

At least on MSVC we statically link against the CRT, so we must disable
the CRT message boxes if we want unattended testing.

The messages are convenient when running manually, so let them be if the
system error message boxes are not disabled.

glapi: Note apparent gap in numbering from ARB_multi_draw_indirect

This is defined in the same included file as ARB_draw_indirect.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

docs: Mark off gs5/overload resolution

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

glsl: Implement overload resolution for ARB_gpu_shader5

V3: Move spec citation into the code.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: Add support for comparing function parameter conversions

The ARB_gpu_shader5 spec says:

"To determine whether the conversion for a single argument in one match is
better than that for another match, the following rules are applied, in
order:

  1. An exact match is better than a match involving any implicit
     conversion.

  2. A match involving an implicit conversion from float to double is
     better than a match involving any other implicit conversion.

  3. A match involving an implicit conversion from either int or uint to
     float is better than a match involving an implicit conversion from
     either int or uint to double.

If none of the rules above apply to a particular pair of conversions,
neither conversion is considered better than the other."

V3: Add spec citation, including oddball difference between gs5 and GLSL
4.0; comment a bit better as per Jordan's suggestions.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: Build a list of inexact function matches

This will facilitate GLSL 4.0 / ARB_gpu_shader5's enhanced overload
resolution rules, and also possibly better error reporting for ambiguous
function calls.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

docs: Mark off gs5/implicit conversions

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

glsl: Allow int -> uint implicit conversions on function parameters

V2: Fix crashes during linking, where the parse state is NULL. In this
case, all required checks have already been done, so we assume the
extension is enabled.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Pass parse state to can_implicitly_convert_to()

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Pass parse state to parameter_lists_match()

The available implicit conversions depend on the GLSL version we're
compiling.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Add support for int -> uint implicit conversions

This is required for ARB_gpu_shader5.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Clean up apply_implicit_conversion

We're about to add new implicit conversions, first for ARB_gpu_shader5,
and then later for ARB_gpu_shader_fp64. Pull out the opcode
determination into its own function, and get rid of the bool -> float
case that could never be hit anyway [since it fails the is_numeric()
check].

V2: Retain the vector width mangling. It turns out this is necessary for
the conversions done (and then thrown away) when determining the return
type of arithmetic operators.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

docs: Update `precise` qualifier status in GL3.txt

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: Allow `precise` as a parameter qualifier

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: Disallow `precise` redeclarations of vars from outer scopes

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: Add support for `precise` redeclarations

This works like glsl-1.20+'s invariant redeclarations, but with fewer
restrictions, since `precise` is allowed on pretty much anything.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: add support for `precise` in type_qualifier

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl: remove outdated comment, move sample to correct block

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Fix copy and pasted values in Broadwell code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

glsl: Make most ir_instruction::as_subclass() functions non-virtual.

There are several common ways to check whether an object is a particular
subclass: dynamic_cast<>, the as_subclass() pattern, or explicit enum
tags.  We originally used the virtual as_subclass methods, but later
added enum tags as they are much nicer for debugging.

Since we have the enum tags, we don't necessarily need to use virtual
functions to implement the as_subclass() methods.  We can just check the
tag and return the pointer or NULL.

This saves 18 entries in the vtable, and instead of two pointer
dereferences per as_subclass() call most are only three inline
instructions.

Compile time of sam3/112.frag (the longest compile in a recent shader-db
run) is reduced by 5% from 348 to 329 ms (n=500).

perf stat of this workload shows:
   24.14% reduction in iTLB-loads:       285,543 -> 216,606
   42.55% reduction in iTLB-load-misses:  18,785 ->  10,792

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

glsl: Move ir_type_unset to end of enumeration.

Now that the constructors set a type, ir_type_unset is not very useful.
Move it to the end of the enum (specifically out of position 0) so that
enums checks for dereferences and rvalues can save an instruction.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

glsl: Reorder ir_type_* enum for easier comparisons.

Makes checking whether an object is an ir_dereference, an ir_rvalue, or
an ir_jump simpler. Since ir_dereference is a subclass or ir_rvalue,
list its subtypes first so that they can both generate nice code.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

glsl: Remove useless call to as_rvalue().

The type returned by hir() is already an ir_rvalue pointer.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>

glsl: Set ir_instruction::ir_type in the base class constructor

This has the added perk that if you forget to set ir_type in the
constructor of a new subclass (or a new constructor of an existing
subclass) the compiler will tell you... instead of relying on
ir_validate or similar run-time detection.

Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

egl: Check for NULL native_window in eglCreateWindowSurface

We have customers using NULL as a way to test the robustness of the API.
Without this check, EGL will segfault trying to dereference
dri2_surf->wl_win->private because wl_win is NULL.

This fix adds a check and sets EGL_BAD_NATIVE_WINDOW

v2: Incorporated feedback from idr - moved the check to a higher level
function.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

r600g,radeonsi: don't use hardware MSAA resolve if dst is fast-cleared

It doesn't work and our docs say so too.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: BlitFramebuffer should follow render condition

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

r600g: BlitFramebuffer should follow render condition

r300g: BlitFramebuffer should follow render condition

r600g,radeonsi: disable fast clear if render condition is on

For some reason, CP DMA doesn't follow the predicate bit if I enable it,
so this is the only option.

This fixes piglit: spec/NV_conditional_render/clear

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

mesa: Make glGetIntegerv(GL_*_ARRAY_SIZE) return GL_BGRA.

Same as b026b6bbfe3f15c8a7296ac107dc3d31f74e401e, but
COLOR_ARRAY_SIZE/SECONDARY_COLOR_ARRAY_SIZE.

Ideally we wouldn't munge the incoming state, so that we wouldn't need
to unmunge it back on glGet*.  But the array size state is copied and
referred in many places, many of which couldn't take an GLenum like
GL_BGRA instead of a plain integer.  So just hack around on glGet*,
to ensure there is no risk of introducing regressions elsewhere.

This bug causes problems to Apitrace, resulting in wrong traces.  See
https://github.com/apitrace/apitrace/issues/261 for details.

Tested with piglit arb_vertex_array_bgra-get, which was created for this
purpose.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

mesa/main: Make get_hash.c values constant.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

i965: Add _default_ name changes to test_eu_compact.c.

These were missed in commit e374809819d82f2e3e946fe809c4d46061ddc5b5.

Fixes 'make check'.

  CC       test_eu_compact.o
test_eu_compact.c: In function ‘gen_f0_0_MOV_GRF_GRF’:
test_eu_compact.c:222:4: error: implicit declaration of function ‘brw_set_predicate_control’ [-Werror=implicit-function-declaration]
    brw_set_predicate_control(p, true);
    ^
test_eu_compact.c: In function ‘run_tests’:
test_eu_compact.c:270:6: error: implicit declaration of function ‘brw_set_access_mode’ [-Werror=implicit-function-declaration]
      brw_set_access_mode(p, BRW_ALIGN_16);
      ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>

i965/gen8: Print number of instructions directly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Emit compaction stats without walking the assembly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move program header printing to end of generate_code().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move annotation info into generate code.

Suggested by Ken as a way to cut down lines of code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Put '_default_' in the name of functions that set default state.

Eventually we're going to use functions to set bits on an instruction.
Putting 'default' in the name of functions that alter default state will
help distinguins them.

This patch was generated entirely mechanically, by the following:

for file in brw*.{cpp,c,h}; do
   sed -i \
   -e 's/brw_set_mask_control/brw_set_default_mask_control/g' \
   -e 's/brw_set_saturate/brw_set_default_saturate/g' \
   -e 's/brw_set_access_mode/brw_set_default_access_mode/g' \
   -e 's/brw_set_compression_control/brw_set_default_compression_control/g' \
   -e 's/brw_set_predicate_control/brw_set_default_predicate_control/g' \
   -e 's/brw_set_predicate_inverse/brw_set_default_predicate_inverse/g' \
   -e 's/brw_set_flag_reg/brw_set_default_flag_reg/g' \
   -e 's/brw_set_acc_write_control/brw_set_default_acc_write_control/g' \
   $file;
done

No manual changes were done after running that command.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Delete brw_set_conditionalmod.

This removes the ability to set the default conditional modifier on all
future instructions.  Nothing uses it, and it's not really a sensible
thing to do anyway.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Eliminate brw_set_conditionalmod from the Gen4-5 compilers.

With the predication changes eliminated, all this does is set the
conditional modifier on a single instruction.  Doing that directly is
easy, and avoids mucking about with default state.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Don't use brw_set_conditionalmod in the FS and vec4 compilers.

brw_set_conditionalmod and brw_next_insn work together to set the
conditional modifier for the next instruction, then turn it off.
The Gen8+ generators don't implement this: we just set it for all future
instructions, and whack it for each fs_inst/vec4_instruction.

Both approaches work out because we only set conditional_mod on
IR instructions like CMP, AND, and so on, which correspond to exactly
one assembly instruction.  The Gen8 generators would break if we had
an IR instruction that generated multiple instructions, and the Gen4-7
EU emit layer would do...something.

To safeguard against this, assert that we only generated one instruction
if conditional_mod is set, and just set the flag directly on that
instruction rather than altering default state.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Stop setting predication from brw_set_conditionalmod.

brw_set_conditionalmod has traditionally been complex: it causes
conditionalmod to be set for the next instruction, and then predication
to be set on all future instructions after that.

We may want to generate a flag condition and not use it immediately,
due to instruction scheduling or the like.  Even if not, it's easy
to set things explicitly, and that's clearer.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Drop unnecessary brw_set_conditionalmod() before brw_CMP().

brw_CMP already takes a conditional modifier as a parameter, and sets it
accordingly.  brw_set_conditionalmod() also makes everything after the
next instruction predicated, but we don't need that: we always emit an
IF instruction after load_clip_distance(), and that's already
predicated.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965/clip: Use the new brw_last_inst macro instead of temporaries.

It wasn't too bad before, but the macro is going to be nicer once I
start modifying a lot more instructions in this pattern.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Create a "brw_last_inst" convenience macro.

Often times, we want to emit an instruction, then set one field on it,
such as predication or a conditional modifier.  Normally, we'd have to
declare "struct brw_instruction *inst;" and then use "inst =
brw_FOO(...)" to emit the instruction, which can hurt readability.

The new "brw_last_inst" macro refers to the most recently emitted
instruction, so you can just do:

    brw_ADD(...)
    brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL;

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Make brw_JMPI set predicate_control based on a parameter.

We use both predicated and unconditional JMPI instructions.  But in each
case, it's clear which we want.  It's simpler to just specify it as a
parameter, rather than relying on default state.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Remove the dst and src0 parameters from brw_JMPI.

In all cases, we set both dst and src0 to brw_ip_reg().  This is no
accident: according to the ISA reference, both are required to be the IP
register.  So, we may as well drop the parameters.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

egl/main: Fix eglMakeCurrent when releasing context from current thread.

EGL 1.4 Specification says that
eglMakeCurrent(display, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT)
can be used to release the current thread's ownership on the surfaces
and context.

MESA's egl implementation was only accepting the parameters when the
KHR_surfaceless_context extension is supported.

[chadv] Add quote from the EGL 1.4 spec.
Cc: "10,1, 10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

radeonsi: enable ARB_sample_shading

radeonsi: implement SAMPLEMASK fragment shader output

radeonsi: interpolate varyings at sample when full sample shading is enabled

radeonsi: implement SAMPLEPOS fragment shader input

The sample positions are read from a constant buffer.

radeonsi: implement SAMPLEID fragment shader input

radeonsi: implement set_min_samples

This is how per-sample shading is enabled.

radeon: add basic register setup for per-sample shading

Only for Cayman, SI, CIK.

radeon: split cayman_emit_msaa_state into 2 functions

The other function will be split up from the framebuffer state.

Revert "glx: load dri driver with RTLD_LOCAL so dlclose never fails to unload"

This reverts commit e3cc0d90e14e62a0a787b6c07a6df0f5c84039be.

It breaks too many apps and completely breaks my desktop too.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79469

We'll probably need to re-release all stable versions after this is committed.

Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>

r600g: use TGSI_PROPERTY to disable viewport and clipping

v2 get rid of magic value, use DEFINES
v3 update clip_disable together with vs_position_window_space

Big thanks to Marek Olšák!

Signed-off-by: David Heidelberger <david.heidelberger@ixit.cz>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

gallium: create TGSI_PROPERTY to disable viewport and clipping

Marek v2: add a cap

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: remove assert on draw with count == 0

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: HW bug workaround for TGSI_OPCODE_BREAKC

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: implement TGSI_OPCODE_BREAKC

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: support all channels of TGSI_FILE_ADDRESS

It's allowed in SM3.

v2: fix multi-component tgsi_r600_arl (FLT_TO_INT is trans-only)

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: check for PIPE_BIND_BLENDABLE in is_format_supported

v2: added !util_format_is_depth_or_stencil(format)

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

r600g: handle PIPE_QUERY_GPU_FINISHED

Signed-off-by: Marek Olšák <marek.olsak@amd.com>

i965/fs: Add fs_inst constructor that takes a list of sources.

Also add an emit() function that calls it.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Add a function to resize fs_inst's sources array.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Clean up fs_inst constructors.

In a fashion suggested by Ken.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Loop from 0 to inst->sources, not 0 to 3.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Store the number of sources an fs_inst has.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: ralloc fs_inst's fs_reg sources.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Disable fs_inst assignment operator.

The fs_reg src array is going to turn into a pointer and we'd rather not
consider the implications of shallow copying fs_insts.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Add and use an fs_inst copy constructor.

Will get more complicated when fs_reg src becomes a pointer.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Skip IR annotations with INTEL_DEBUG=noann.

Running shader-db with INTEL_DEBUG=noann reduces the runtime
from ~90 to ~80 seconds on my machine. It also reduces the disk space
consumed by the .out files from 660 MB (676 on disk) to 343 MB (358 on
disk).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Debug the optimization passes by dumping instr to file.

With INTEL_DEBUG=optimizer, write the output of dump_instructions() to a
file each time an optimization pass makes progress. This lets you easily
diff successive files to see what an optimization pass did.

Example filenames written when running glxgears:
   fs8-0000-00-start
   fs8-0000-01-04-opt_copy_propagate
   fs8-0000-01-06-dead_code_eliminate
   fs8-0000-01-12-compute_to_mrf
   fs8-0000-02-06-dead_code_eliminate
        |   |  |   |
        |   |  |   `-- optimization pass name
        |   |  |
        |   |  `-- optimization pass number in the loop
        |   |
        |   `-- optimization loop interation
        |
        `-- shader program number

Note that with INTEL_DEBUG=optimizer, we disable compact_virtual_grfs,
so that we can diff instruction lists across loop interations without
the register numbers being changes.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Give dump_instructions() a filename argument.

This will allow debugging code to dump the IR after an optimization pass
makes progress (the next patch). Only let it open and write to a file if
the effective user isn't root.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>