mesa.git
7 years agoi965: Use brw_emit_reloc() instead of drm_bacon_bo_emit_reloc().
Kenneth Graunke [Tue, 28 Mar 2017 21:41:39 +0000 (14:41 -0700)]
i965: Use brw_emit_reloc() instead of drm_bacon_bo_emit_reloc().

I'm about to make brw_emit_reloc do actual work, so everybody needs
to start using it and not the raw drm_bacon function.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Change intel_batchbuffer_reloc() into brw_emit_reloc().
Kenneth Graunke [Tue, 28 Mar 2017 22:03:49 +0000 (15:03 -0700)]
i965: Change intel_batchbuffer_reloc() into brw_emit_reloc().

This renames intel_batchbuffer_reloc to brw_emit_reloc and changes the
parameter naming and ordering to match drm_intel_bo_emit_reloc().

For now, it's a trivial wrapper that accesses batch->bo.  When we
rework relocations, it will start doing actual work.

target_offset should be expanded to a uint64_t to match the kernel,
but for now we leave it as its original 32-bit type.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop GEM_SW_FINISH stuff.
Kenneth Graunke [Mon, 3 Apr 2017 06:35:27 +0000 (23:35 -0700)]
i965/drm: Drop GEM_SW_FINISH stuff.

This is only useful when doing an incoherent CPU mapping of the current
scanout buffer.  That's a terrible plan, so we never do it.  We always
use an uncached GTT map.

So, this is useless.  Drop the code.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop code to search for an existing bufmgr.
Kenneth Graunke [Fri, 31 Mar 2017 16:44:54 +0000 (09:44 -0700)]
i965/drm: Drop code to search for an existing bufmgr.

This functionality was added by libdrm commit
743af59669386cb6e063fa4bd85f0a0b2da86295 (intel: make bufmgr_gem
shareable from different API) in an attempt to solve libva/mesa buffer
sharing problems.  Specifically, this was working around an issue hit
by Chromium, which used the same drm_fd for multiple APIs, and shared
buffers between them.

This code attempted to work around that issue by using the same bufmgr
for both libva and Mesa.  It worked because libdrm_intel was loaded by
both libraries.  However, now that Mesa has forked, we don't have a
common library, and this code cannot work.

The correct solution is to have each API open its own file descriptor
(and get a corresponding buffer manager), and then use PRIME export
and import to share BOs across those APIs.  Then the kernel can manage
those shared resources.  According to Chris, the kernel will pass back
the same handle for a prime FD if the lookup is from the same device FD.

We believe Chromium has since moved to this model.

In Mesa, there is already only one screen per FD, and so there will
only be one bufmgr per FD.  We don't need any of this code.

v2: Add a big warning comment written by Chris Wilson.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Unwrap the unnecessary drm_bacon_reloc_target_info struct.
Kenneth Graunke [Wed, 29 Mar 2017 00:25:27 +0000 (17:25 -0700)]
i965/drm: Unwrap the unnecessary drm_bacon_reloc_target_info struct.

This used to have another field, but now it's just a BO pointer.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Switch from uthash to Mesa's hash table.
Kenneth Graunke [Thu, 23 Mar 2017 00:29:39 +0000 (17:29 -0700)]
i965/drm: Switch from uthash to Mesa's hash table.

No performance data has been gathered about this choice.  I just don't
want that many hash tables.  Chris points out that this is not
performance critical - we should not be recreating that many handles
from scratch.  In the past we used a linear list, which became
unreasonable in stress tests that used hundreds of thousands of BOs.
In real usage, it shouldn't matter that much.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop bo_gem::kflags.
Kenneth Graunke [Mon, 3 Apr 2017 07:42:30 +0000 (00:42 -0700)]
i965/drm: Drop bo_gem::kflags.

It's always zero now.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop has_exec_async related API.
Kenneth Graunke [Mon, 3 Apr 2017 06:17:54 +0000 (23:17 -0700)]
i965/drm: Drop has_exec_async related API.

Mesa doesn't use this yet.  We'll almost certainly want to, but we can
add the functionality back after we clean up the messy drm code.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop softpin support for now.
Kenneth Graunke [Wed, 22 Mar 2017 19:46:08 +0000 (12:46 -0700)]
i965/drm: Drop softpin support for now.

We may want this eventually, but simplify for now.  We can add it back
later when we actually intend to use it.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop userptr support for now.
Kenneth Graunke [Wed, 22 Mar 2017 19:42:43 +0000 (12:42 -0700)]
i965/drm: Drop userptr support for now.

We'll want userptr support for GL_AMD_pinned_memory support someday,
and possibly some other upload optimizations.  Chris says "not in this
form" though.  Drop it and simplify for now - we can add it back later
when we're ready to hook it up fully.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Delete engine checks.
Kenneth Graunke [Wed, 22 Mar 2017 19:39:44 +0000 (12:39 -0700)]
i965/drm: Delete engine checks.

This is basically handholding to prevent a bogus caller from trying to
execbuffer on a bogus engine.  i965 already does this correctly.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop intel_chipset.h in favor of using gen_device_info.
Kenneth Graunke [Tue, 4 Apr 2017 18:45:08 +0000 (11:45 -0700)]
i965/drm: Drop intel_chipset.h in favor of using gen_device_info.

This moves the PCI ID detection to intel_screen.c and makes
drm_bacon_bufmgr_gem_init() take a devinfo pointer.

We also drop the HAS_LLC query stuff - devinfo has that info already,
without kernel queries, and it makes no sense to have two has_llc flags
set by different mechanisms.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop deprecated drm_bacon_bo::offset.
Kenneth Graunke [Wed, 22 Mar 2017 18:39:39 +0000 (11:39 -0700)]
i965/drm: Drop deprecated drm_bacon_bo::offset.

This field was the wrong size, so we replaced it with offset64.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop has_wait_timeout.
Kenneth Graunke [Wed, 22 Mar 2017 22:28:07 +0000 (15:28 -0700)]
i965/drm: Drop has_wait_timeout.

The wait-ioctl was introduced in kernel v3.6 (20120930) and that is our
current minimum requirement for screen creation.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Assume aperture size query will work.
Kenneth Graunke [Fri, 24 Mar 2017 04:34:23 +0000 (21:34 -0700)]
i965/drm: Assume aperture size query will work.

This query has been available since 2.6.28.  We require 3.6.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Combine drm_bacon_bufmgr_gem and drm_bacon_bufmgr classes.
Kenneth Graunke [Wed, 22 Mar 2017 07:50:21 +0000 (00:50 -0700)]
i965/drm: Combine drm_bacon_bufmgr_gem and drm_bacon_bufmgr classes.

The distinction was required when the bufmgr was virtualised, now there
is only one class, we no longer need the distraction of pretending it is
a subclass.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Move _drm_bacon_context to intel_bufmgr_gem.c.
Kenneth Graunke [Thu, 30 Mar 2017 21:59:23 +0000 (14:59 -0700)]
i965/drm: Move _drm_bacon_context to intel_bufmgr_gem.c.

This moves us one step closer to killing off intel_bufmgr_priv.h.

We might want to nuke it altogether, since it's basically just a
uint32_t handle, but for now, let's focus on removing files.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop cliprects and dr4 from execbuf variants.
Kenneth Graunke [Tue, 4 Apr 2017 21:51:52 +0000 (14:51 -0700)]
i965/drm: Drop cliprects and dr4 from execbuf variants.

Legacy DRI1 leftovers.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Devirtualize the bufmgr.
Kenneth Graunke [Wed, 22 Mar 2017 00:27:25 +0000 (17:27 -0700)]
i965/drm: Devirtualize the bufmgr.

libdrm_bacon used to have a GEM-based bufmgr and a legacy fake bufmgr,
but that's long since dead (and we never imported it to i965).  So,
drop the extra layer of function pointers.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Check INTEL_DEBUG & DEBUG_BUFMGR directly.
Kenneth Graunke [Wed, 22 Mar 2017 05:40:04 +0000 (22:40 -0700)]
i965/drm: Check INTEL_DEBUG & DEBUG_BUFMGR directly.

Eliminates some API around this, and more importantly, the last
field in one bufmgr class.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Use Mesa's macros.h instead of duplicating them.
Kenneth Graunke [Wed, 22 Mar 2017 05:42:43 +0000 (22:42 -0700)]
i965/drm: Use Mesa's macros.h instead of duplicating them.

Replace the duplicated macros imported from libdrm:

   ARRAY_SIZE, MAX2, ALIGN, STATIC_ASSERT

and remove unused ROUND_UP_TO and ROUND_UP_TO_MB.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Use ALIGN, not ROUND_UP_TO.
Kenneth Graunke [Wed, 22 Mar 2017 18:12:27 +0000 (11:12 -0700)]
i965/drm: Use ALIGN, not ROUND_UP_TO.

ROUND_UP_TO handles a NPOT alignment, but all the alignments we use
are power of two anyway, so there's no need.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Delete execbuf1 support.
Kenneth Graunke [Wed, 22 Mar 2017 00:31:24 +0000 (17:31 -0700)]
i965/drm: Delete execbuf1 support.

execbuf2 has been around since v2.6.33.  We require v3.6.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Remove Gen2-3 fence accounting.
Kenneth Graunke [Thu, 30 Mar 2017 18:46:05 +0000 (11:46 -0700)]
i965/drm: Remove Gen2-3 fence accounting.

Since gen4, we do not use fence registers for any GPU access and so
never have to account for the fence during batch construction. All the
related fence functions are unused.

Based on Kristian Høgsberg's patch; commit message by Chris Wilson.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Remove some unused functions and macros.
Kenneth Graunke [Fri, 24 Mar 2017 04:19:24 +0000 (21:19 -0700)]
i965/drm: Remove some unused functions and macros.

Mesa doesn't use these functions or macros, so we can delete them,
and save work refactoring and cleaning them up.  We'll delete a lot
more later, too.

Based on a patch by Kristian Høgsberg.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Switch to util/list.h instead of libdrm_lists.h.
Kenneth Graunke [Tue, 21 Mar 2017 23:10:08 +0000 (16:10 -0700)]
i965/drm: Switch to util/list.h instead of libdrm_lists.h.

Both are kernel style lists, so this is trivial.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Port to Mesa's atomic header.
Kenneth Graunke [Tue, 21 Mar 2017 21:54:07 +0000 (14:54 -0700)]
i965/drm: Port to Mesa's atomic header.

Drop xf86atomic.h in favor of Mesa's util/u_atomic.h.  We replace the
atomic_t wrapper struct with a bare integer, switch to the 'p_atomic'
naming conventions, and move over the one extra helper.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Use our internal libdrm (drm_bacon) rather than the real one.
Kenneth Graunke [Mon, 20 Mar 2017 23:42:55 +0000 (16:42 -0700)]
i965/drm: Use our internal libdrm (drm_bacon) rather than the real one.

Now we can actually test our changes.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: s/drm_intel/drm_bacon/g
Kenneth Graunke [Thu, 23 Mar 2017 01:51:42 +0000 (18:51 -0700)]
i965/drm: s/drm_intel/drm_bacon/g

Using drm_intel_* as a prefix is hazardous - we don't want to conflict
with the actual libdrm_intel symbols.  In particular, I think we could
get into trouble during the final megadrivers linking.

So, rename everything to an different yet arbitrary prefix.  bacon and
intel are the same number of characters, so we don't have to reindent
the world.  It's also an homage to Ian's "Bacon Trail" platform.

I was going to use "drm_relic" to poke fun at libdrm being ancient,
and so we could explain the name with a "historical reasons" pun,
but it sounds too much like ralloc.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Drop libpciaccess dependencies.
Kenneth Graunke [Thu, 23 Mar 2017 22:29:43 +0000 (15:29 -0700)]
i965/drm: Drop libpciaccess dependencies.

i965 doesn't use drm_intel_get_aperture_sizes(), so we can delete
support for it.  This avoids a build dependency on libpciaccess.

Chris also notes:

"There's a really old bug that hopefully has been closed already
 (although as far as I can tell, it has never been fixed) about
 how using libpciaccess from libdrm_intel breaks the world (since
 libpciaccess uses a singleton that is torn down at the first request
 rather than upon the last user)."

This bug should go away in two commits when we switch over to our
internal copy of libdrm_intel.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84325
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: Make libdrm_lists.h compile by defining typeof.
Kenneth Graunke [Tue, 21 Mar 2017 22:55:29 +0000 (15:55 -0700)]
i965/drm: Make libdrm_lists.h compile by defining typeof.

typeof doesn't seem to exist, so this won't compile (but we don't yet
try).  Define it to __typeof__.  This code is going to die soon anyway.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965/drm: remove legacy defines, aub functions, and decoder prototypes
Kenneth Graunke [Fri, 31 Mar 2017 17:06:24 +0000 (10:06 -0700)]
i965/drm: remove legacy defines, aub functions, and decoder prototypes

We never imported any of this code, so drop the prototypes, unused
enums, and defines.

Based on patches by Emil Velikov.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Import libdrm_intel.
Kenneth Graunke [Mon, 20 Mar 2017 23:40:01 +0000 (16:40 -0700)]
i965: Import libdrm_intel.

This imports commit 19c4cfc54918d361f2535aec16650e9f0be667cd of
libdrm/intel/*.[ch], minus a few files that we're never going to use
(and would immediately delete), plus a few necessary dependencies.

We rename intel_bufmgr.h to brw_bufmgr.h to avoid #include conflicts.
We also fix UTF-8 symbol problems in intel_bufmgr_gem.c comments
because vim keeps trying to fix that every time I edit the file,
and we may as well fix it right away.

Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Make sure we don't use CPU maps for the scanout buffer.
Kenneth Graunke [Mon, 3 Apr 2017 07:03:01 +0000 (00:03 -0700)]
i965: Make sure we don't use CPU maps for the scanout buffer.

Using an incoherent CPU map on the active scanout buffer is really
sketchy - we may need extra flushing via GEM_SW_FINISH, or using
drmModeDirtyFB() and kernel commit a6a7cc4b7db6d (4.10+).

Chris suggests "never ever do that", which seems like a wise plan!

intel_miptree_map_raw() uses CPU maps on linear buffers.

Having a linear scanout buffer should be really rare, and mapping the
front buffer should be similarly rare.  Together, it should basically
never happen.  But, in case it does somehow...make sure that mapping
the scanout buffer always goes through an uncached GTT map.

v2: Add a giant comment written by Chris Wilson.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
7 years agoi965: Stop calling drm_intel_bufmgr_gem_enable_fenced_relocs().
Kenneth Graunke [Wed, 22 Mar 2017 00:08:20 +0000 (17:08 -0700)]
i965: Stop calling drm_intel_bufmgr_gem_enable_fenced_relocs().

This does nothing on Gen4+, which is the only hardware we support.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agoi965: Fix GLX_MESA_query_renderer video memory on 32-bit.
Kenneth Graunke [Thu, 30 Mar 2017 20:52:46 +0000 (13:52 -0700)]
i965: Fix GLX_MESA_query_renderer video memory on 32-bit.

On modern systems with 4GB apertures, the size in bytes is 4294967296,
or (1ull << 32).  The kernel gives us the aperture size as a __u64,
which works out great.

Unfortunately, libdrm "helpfully" returns the data as a size_t, which
on 32-bit systems means it truncates the aperture size to 0 bytes.
We've happily reported this value as 0 MB of video memory via
GLX_MESA_query_renderer since it was originally exposed.

This patch bypasses libdrm and calls the ioctl ourselves so we can
use a proper uint64_t, avoiding the 32-bit integer overflow.  We now
report a proper video memory size on 32-bit systems.

Chris points out that the aperture size (CPU mappable size limit)
isn't really the right thing to be checking.  But libdrm_intel uses
it to fail execbuffer, so it is an actual limit for now.  Once that's
fixed we can probably move to something else.  In the meantime, fix
the obvious typecasting bug.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agogallium/radeon: add HUD queries for GPU temperature and clocks
Samuel Pitoiset [Mon, 10 Apr 2017 09:49:05 +0000 (11:49 +0200)]
gallium/radeon: add HUD queries for GPU temperature and clocks

Only the Radeon kernel driver exposed the GPU temperature and
the shader/memory clocks, this implements the same functionality
for the AMDGPU kernel driver.

These queries will return 0 if the DRM version is less than 3.10,
I don't explicitely check the version here because the query
codepath is already a bit messy.

v2: - rebase on top of master

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoconfigure.ac: require libdrm_amdgpu 2.4.79
Samuel Pitoiset [Mon, 10 Apr 2017 09:49:04 +0000 (11:49 +0200)]
configure.ac: require libdrm_amdgpu 2.4.79

The sensor info requires amdgpu_query_sensor_info().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add new si_check_render_feedback_texture() helper
Samuel Pitoiset [Wed, 5 Apr 2017 22:07:35 +0000 (00:07 +0200)]
radeonsi: add new si_check_render_feedback_texture() helper

For bindless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add new si_decompress_color_texture() helper
Samuel Pitoiset [Wed, 5 Apr 2017 22:07:34 +0000 (00:07 +0200)]
radeonsi: add new si_decompress_color_texture() helper

For bindless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add new depth_needs_decompression() helper
Samuel Pitoiset [Wed, 5 Apr 2017 22:07:33 +0000 (00:07 +0200)]
radeonsi: add new depth_needs_decompression() helper

v2: - rename to depth_needs_decompression() instead

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: add a 'break' in si_check_render_feedback_*()
Samuel Pitoiset [Wed, 5 Apr 2017 22:07:32 +0000 (00:07 +0200)]
radeonsi: add a 'break' in si_check_render_feedback_*()

No need to check all color buffers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: re-use 'desc' in si_set_shader_image()
Samuel Pitoiset [Wed, 5 Apr 2017 22:07:31 +0000 (00:07 +0200)]
radeonsi: re-use 'desc' in si_set_shader_image()

No need to compute the offset in the descriptor twice.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoac: add unreachable() in ac_build_image_opcode()
Samuel Pitoiset [Fri, 7 Apr 2017 16:44:16 +0000 (18:44 +0200)]
ac: add unreachable() in ac_build_image_opcode()

To silent the following compiler warning:

common/ac_llvm_build.c: In function ‘ac_build_image_opcode’:
common/ac_llvm_build.c:1080:3: warning: ‘name’ may be used uninitialized in this function [-Wmaybe-uninitialized]
   snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.v4f32.%s.v8i32",
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    name,
    ~~~~~
    a->compare ? ".c" : "",
    ~~~~~~~~~~~~~~~~~~~~~~~
    a->bias ? ".b" :
    ~~~~~~~~~~~~~~~~
    a->lod ? ".l" :
    ~~~~~~~~~~~~~~~
    a->deriv ? ".d" :
    ~~~~~~~~~~~~~~~~~
    a->level_zero ? ".lz" : "",
    ~~~~~~~~~~~~~~~~~~~~~~~~~~~
    a->offset ? ".o" : "",
    ~~~~~~~~~~~~~~~~~~~~~~
    type);
    ~~~~~

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agor600g: get rid of dummy pixel shader
Constantine Kharlamov [Mon, 10 Apr 2017 20:04:37 +0000 (23:04 +0300)]
r600g: get rid of dummy pixel shader

The idea is taken from radeonsi. The code mostly was already checking for null
pixel shader, so little checks had to be added.

Interestingly, acc. to testing with GTAⅣ, though binding of null shader happens
a lot at the start (then just stops), but draw_vbo() never actually sees null
ps.

v2: added a check I missed because of a macros using a prefix to choose
a shader.

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agor600g: add draw_vbo check for a NULL pixel shader
Constantine Kharlamov [Mon, 10 Apr 2017 20:04:36 +0000 (23:04 +0300)]
r600g: add draw_vbo check for a NULL pixel shader

Taken from radeonsi, required to remove dummy pixel shader in the next patch

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agor600g: skip repeating vs, gs, and tes shader binds
Constantine Kharlamov [Mon, 10 Apr 2017 20:04:35 +0000 (23:04 +0300)]
r600g: skip repeating vs, gs, and tes shader binds

The idea is taken from radeonsi. The code lacks some checks for null vs,
and I'm unsure about some changes against that, so I left it in place.

Some statistics for GTAⅣ:
Average tesselation bind skip per frame: ≈350
Average geometric shaders bind skip per frame: ≈260
Skip of binding vertex ones occurs rarely enough to not get into per-frame
counter at all, so I just gonna say: it happens.

v2: I've occasionally removed an empty line, don't do this.
v3: return a check for null tes and gs back, while I haven't figured out
the way to move stride assignment to r600_update_derived_state() (as it
is in radeonsi).

Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa: use single memcpy when strides match in glReadPixels, texstore code
Bartosz Tomczyk [Mon, 10 Apr 2017 18:31:00 +0000 (12:31 -0600)]
mesa: use single memcpy when strides match in glReadPixels, texstore code

v2: fix indentation

Reviewed-by: Brian Paul <brianp@vmware.com>
7 years agointel/blorp: Use ISL for emitting depth/stencil/hiz
Jason Ekstrand [Thu, 30 Mar 2017 06:00:16 +0000 (23:00 -0700)]
intel/blorp: Use ISL for emitting depth/stencil/hiz

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/blorp: Emit 3DSTATE_STENCIL_BUFFER before HIER_DEPTH
Jason Ekstrand [Wed, 5 Apr 2017 23:59:06 +0000 (16:59 -0700)]
intel/blorp: Emit 3DSTATE_STENCIL_BUFFER before HIER_DEPTH

We're about to replace blorp's emit code with ISL and it emits them in
the other order.  This makes diffing the aubs easier.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoanv: Use ISL for emitting depth/stencil/hiz
Jason Ekstrand [Thu, 30 Mar 2017 05:24:50 +0000 (22:24 -0700)]
anv: Use ISL for emitting depth/stencil/hiz

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/isl: Add support for emitting depth/stencil/hiz
Jason Ekstrand [Thu, 30 Mar 2017 04:10:50 +0000 (21:10 -0700)]
intel/isl: Add support for emitting depth/stencil/hiz

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agoamd/addrlib: use correct variable name in header
Thomas Hindoe Paaboel Andersen [Sat, 8 Apr 2017 06:36:36 +0000 (08:36 +0200)]
amd/addrlib: use correct variable name in header

Since the inclusion in 7f160efcde41b52ad78e562316384373dab419e3
the header used x_biased, while the implementation used y_biased.
This changes the header to macth the implementation since the
uses of the function seems to expect y_biased.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/st: take ownership rather than adding reference for new renderbuffers
Timothy Arceri [Sat, 8 Apr 2017 00:54:56 +0000 (10:54 +1000)]
mesa/st: take ownership rather than adding reference for new renderbuffers

This avoids locking in the reference calls and fixes a leak after the
RefCount initialisation was change from 0 to 1.

Fixes: 32141e53d1520 (mesa: tidy up renderbuffer RefCount initialisation)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Bartosz Tomczyk <bartosz.tomczyk86@gmail.com>
7 years agox11: take ownership rather than adding reference for new renderbuffers
Timothy Arceri [Sat, 8 Apr 2017 00:47:12 +0000 (10:47 +1000)]
x11: take ownership rather than adding reference for new renderbuffers

This avoids locking in the reference calls and fixes a leak after the
RefCount initialisation was change from 0 to 1.

Fixes: 32141e53d1520 (mesa: tidy up renderbuffer RefCount initialisation)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoosmesa: tidy up renderbuffer refCount initialisation
Timothy Arceri [Sat, 8 Apr 2017 00:42:57 +0000 (10:42 +1000)]
osmesa: tidy up renderbuffer refCount initialisation

32141e53d1520 changed _mesa_init_renderbuffer() to set it to 1 for
us.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoswrast: take ownership rather than adding reference for new renderbuffers
Timothy Arceri [Sat, 8 Apr 2017 00:35:57 +0000 (10:35 +1000)]
swrast: take ownership rather than adding reference for new renderbuffers

This avoids locking in the reference calls and fixes a leak after the
RefCount initialisation was change from 0 to 1.

Fixes: 32141e53d1520 (mesa: tidy up renderbuffer RefCount initialisation)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoradeon: take ownership rather than adding reference for new renderbuffers
Timothy Arceri [Sat, 8 Apr 2017 00:29:22 +0000 (10:29 +1000)]
radeon: take ownership rather than adding reference for new renderbuffers

This avoids locking in the reference calls and fixes a leak after the
RefCount initialisation was change from 0 to 1.

Fixes: 32141e53d1520 (mesa: tidy up renderbuffer RefCount initialisation)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agonouveau: take ownership rather than adding reference for new renderbuffers
Timothy Arceri [Sat, 8 Apr 2017 00:26:34 +0000 (10:26 +1000)]
nouveau: take ownership rather than adding reference for new renderbuffers

This avoids locking in the reference calls and fixes a leak after the
RefCount initialisation was change from 0 to 1.

Fixes: 32141e53d1520 (mesa: tidy up renderbuffer RefCount initialisation)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoi965: take ownership rather than adding reference for new renderbuffers
Timothy Arceri [Sat, 8 Apr 2017 00:22:16 +0000 (10:22 +1000)]
i965: take ownership rather than adding reference for new renderbuffers

This avoids locking in the reference calls and fixes a leak after the
RefCount initialisation was change from 0 to 1.

Fixes: 32141e53d1520 (mesa: tidy up renderbuffer RefCount initialisation)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agoi915: take ownership rather than adding reference for new renderbuffers
Timothy Arceri [Sat, 8 Apr 2017 00:13:24 +0000 (10:13 +1000)]
i915: take ownership rather than adding reference for new renderbuffers

This avoids locking in the reference calls and fixes a leak after the
RefCount initialisation was change from 0 to 1.

Fixes: 32141e53d1520 (mesa: tidy up renderbuffer RefCount initialisation)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
7 years agomesa: create _mesa_attach_renderbuffer_without_ref() helper
Timothy Arceri [Sat, 8 Apr 2017 00:03:20 +0000 (10:03 +1000)]
mesa: create _mesa_attach_renderbuffer_without_ref() helper

This will be used to take ownership of freashly created renderbuffers,
avoiding the need to call the reference function which requires
locking.

V2: dereference any existing fb attachments and actually attach the
    new rb.

v3: split out validation and attachment type/complete setting into
    a shared static function.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Bartosz Tomczyk <bartosz.tomczyk86@gmail.com>
7 years agonv50/ir: remove unused swizzle field in ValueRef
Ilia Mirkin [Sun, 9 Apr 2017 18:56:59 +0000 (14:56 -0400)]
nv50/ir: remove unused swizzle field in ValueRef

The nv50 ir is scalar. Perhaps this was from some early attempts to
integrate the simd aspects of nv30. However at this point it's entirely
unused.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonouveau: enable ARB_shader_clock on nv50 and nvc0
Boyan Ding [Tue, 4 Apr 2017 14:44:47 +0000 (22:44 +0800)]
nouveau: enable ARB_shader_clock on nv50 and nvc0

v2: Also enable support on nv50

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agonv50/ir: Handle TGSI_OPCODE_CLOCK
Boyan Ding [Tue, 4 Apr 2017 14:44:46 +0000 (22:44 +0800)]
nv50/ir: Handle TGSI_OPCODE_CLOCK

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
[imirkin: make zero mov non-fixed]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agogm107/ir: Emit SV_CLOCK system value
Boyan Ding [Fri, 31 Mar 2017 02:33:05 +0000 (10:33 +0800)]
gm107/ir: Emit SV_CLOCK system value

Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agogbm: Assert modifiers and count are copacetic
Ben Widawsky [Wed, 5 Apr 2017 17:31:45 +0000 (10:31 -0700)]
gbm: Assert modifiers and count are copacetic

The API/entry point in mesa already checks the correct behavior,
however, it's possible to be handled by another implementation and those
implementations should not be able to abuse a weird combination of count
and pointer.

This fixes CID 1403193

Cc: Mark Janes <mark.a.janes@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agost/mesa: Use compressed fog mode for atifs.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:33 +0000 (20:09 +0200)]
st/mesa: Use compressed fog mode for atifs.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Use compressed TexEnv Combine state.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:32 +0000 (20:09 +0200)]
mesa/main/ff_frag: Use compressed TexEnv Combine state.

Along the way, add missing GL_ONE source support and drop non-existing
GL_ZERO and GL_ONE operand support.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Use compressed fog mode.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:31 +0000 (20:09 +0200)]
mesa/main/ff_frag: Use compressed fog mode.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main: Maintain compressed TexEnv Combine state.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:30 +0000 (20:09 +0200)]
mesa/main: Maintain compressed TexEnv Combine state.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main: Maintain compressed fog mode.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:29 +0000 (20:09 +0200)]
mesa/main: Maintain compressed fog mode.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Don't retrieve format if not necessary.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:28 +0000 (20:09 +0200)]
mesa/main/ff_frag: Don't retrieve format if not necessary.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Use gl_texture_object::TargetIndex.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:27 +0000 (20:09 +0200)]
mesa/main/ff_frag: Use gl_texture_object::TargetIndex.

Instead of computing it once again using _mesa_tex_target_to_index.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Store nr_enabled_units only once.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:26 +0000 (20:09 +0200)]
mesa/main/ff_frag: Store nr_enabled_units only once.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Simplify get_fp_input_mask.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:25 +0000 (20:09 +0200)]
mesa/main/ff_frag: Simplify get_fp_input_mask.

Change it into filter_fp_input_mask transform function that instead of
returning a mask, transforms input.

Also, simplify the case of vertex program handling by assuming that
fp_inputs is always a combination of VARYING_BIT_COL* and VARYING_BIT_TEX*.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Don't bother with VARYING_BIT_FOGC.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:24 +0000 (20:09 +0200)]
mesa/main/ff_frag: Don't bother with VARYING_BIT_FOGC.

It's not used.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Remove unused struct.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:23 +0000 (20:09 +0200)]
mesa/main/ff_frag: Remove unused struct.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Reduce the size of nr_enabled_units.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:22 +0000 (20:09 +0200)]
mesa/main/ff_frag: Reduce the size of nr_enabled_units.

Since it holds values from 0 to 8, 4 bits will suffice.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Remove enabled_units.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:21 +0000 (20:09 +0200)]
mesa/main/ff_frag: Remove enabled_units.

Its only usage is easily replaced by nr_enabled_units. As for cache key
part, unit[i].enabled should be enough.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agomesa/main/ff_frag: Use correct constant.
Gustaw Smolarczyk [Thu, 30 Mar 2017 18:09:20 +0000 (20:09 +0200)]
mesa/main/ff_frag: Use correct constant.

Since fixed-function shaders are restricted to MAX_TEXTURE_COORD_UNITS
texture units, use this constant instead of MAX_TEXTURE_UNITS. This
reduces the array size from 32 to 8.

Signed-off-by: Gustaw Smolarczyk <wielkiegie@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agointel/isl: Use genx_bits.h instead of a hand-rolled table
Jason Ekstrand [Thu, 30 Mar 2017 04:01:48 +0000 (21:01 -0700)]
intel/isl: Use genx_bits.h instead of a hand-rolled table

This gets rid of one piece of ugliness with the way ISL handles surface
emitting surface states.  I've never liked that hand-rolled table but it
was the best we had at the time.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml/bits: Emit per-container _length helpers
Jason Ekstrand [Thu, 30 Mar 2017 03:39:18 +0000 (20:39 -0700)]
intel/genxml/bits: Emit per-container _length helpers

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml/bits: Emit per-field _start helpers
Jason Ekstrand [Thu, 30 Mar 2017 03:40:49 +0000 (20:40 -0700)]
intel/genxml/bits: Emit per-field _start helpers

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml/bits: Pull the function emit code into a helper block
Jason Ekstrand [Thu, 30 Mar 2017 03:21:06 +0000 (20:21 -0700)]
intel/genxml/bits: Pull the function emit code into a helper block

The helper block is extremely general.  It takes an string property name
and an object that supports three methods: has_prop, iter_prop, and
get_prop.  This way we can easily generalize it to emit more different
types of getter functions.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agointel/genxml/bits: Refactor to add a container class
Jason Ekstrand [Thu, 30 Mar 2017 01:39:13 +0000 (18:39 -0700)]
intel/genxml/bits: Refactor to add a container class

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
7 years agonvc0/ir: fix overwriting of offset register with interpolateAtOffset
Ilia Mirkin [Sat, 8 Apr 2017 03:23:25 +0000 (23:23 -0400)]
nvc0/ir: fix overwriting of offset register with interpolateAtOffset

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
7 years agoanv: Use subpass dependencies for flushes
Jason Ekstrand [Sat, 11 Mar 2017 01:50:01 +0000 (17:50 -0800)]
anv: Use subpass dependencies for flushes

Instead of figuring it all out ourselves, just use the information given
to us by the client.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
7 years agoanv/pass: Record required pipe flushes
Jason Ekstrand [Sat, 11 Mar 2017 01:29:24 +0000 (17:29 -0800)]
anv/pass: Record required pipe flushes

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
7 years agoanv/pass: Use anv_multialloc for allocating the anv_pass
Jason Ekstrand [Fri, 7 Apr 2017 05:18:03 +0000 (22:18 -0700)]
anv/pass: Use anv_multialloc for allocating the anv_pass

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
7 years agoanv/descriptor_set: Use anv_multialloc for descriptor set layouts
Jason Ekstrand [Fri, 7 Apr 2017 05:43:40 +0000 (22:43 -0700)]
anv/descriptor_set: Use anv_multialloc for descriptor set layouts

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
7 years agoanv: Add a helper for doing mass allocations
Jason Ekstrand [Fri, 7 Apr 2017 05:15:16 +0000 (22:15 -0700)]
anv: Add a helper for doing mass allocations

We tend to try to reduce the number of allocation calls the Vulkan
driver uses by doing a single allocation whenever possible for a data
structure.  While this has certain downsides (usually code complexity),
it does mean error handling and cleanup is much easier.  This commit
adds a nice little helper struct for getting rid of some of that
complexity.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
7 years agoanv: Add helpers for converting access flags to pipe bits
Jason Ekstrand [Sat, 11 Mar 2017 00:51:07 +0000 (16:51 -0800)]
anv: Add helpers for converting access flags to pipe bits

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
7 years agomesa: simplify and optimise vertex bindings tracking
Timothy Arceri [Thu, 6 Apr 2017 04:47:34 +0000 (14:47 +1000)]
mesa: simplify and optimise vertex bindings tracking

We only need to update it if something changes. Also
_mesa_bind_vertex_buffer() will update the mask when binding to a
NULL or default buffer so no need to do that update here.

Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
7 years agoglsl: fix lower jumps for nested non-void returns
Timothy Arceri [Fri, 7 Apr 2017 01:24:37 +0000 (11:24 +1000)]
glsl: fix lower jumps for nested non-void returns

Fixes the case were a loop contains a return and the loop is
nested inside an if.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
https://bugs.freedesktop.org/show_bug.cgi?id=100303

7 years agogallium: fix some math formulas to display better
Ilia Mirkin [Thu, 9 Feb 2017 23:04:08 +0000 (18:04 -0500)]
gallium: fix some math formulas to display better

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agonvc0/ir: fix LSB/BFE/BFI implementations
Ilia Mirkin [Sat, 8 Apr 2017 00:17:47 +0000 (20:17 -0400)]
nvc0/ir: fix LSB/BFE/BFI implementations

Overwriting the src register is a very bad idea - it logically maps onto
the TGSI registers, and so is effectively overwriting the source values.

Reported-by: Boyan Ding <boyan.j.ding@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
7 years agoutil: fix swizzle of INSTANCEID system value
Nicolai Hähnle [Fri, 7 Apr 2017 10:23:11 +0000 (12:23 +0200)]
util: fix swizzle of INSTANCEID system value

radeonsi added stricter checking for correct swizzles in debug builds.

Reported-by: Michel Dänzer <michel.daenzer@amd.com>
Fixes: 4cf29427770f ("radeonsi: support 64-bit system values")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agost/glx: Add awareness for multisample pixel formats to st/glx-xlib.
Bruce Cherniak [Fri, 7 Apr 2017 16:27:39 +0000 (11:27 -0500)]
st/glx: Add awareness for multisample pixel formats to st/glx-xlib.

In preparation for enabling MSAA in OpenSWR, the state trackers need to
be aware of multisample pixel formats for software renderers.  This patch
allows glx-xlib to query the renderer for support of pixel
formats with multisample, and create multisample resources.

This change is benign to softpipe and llvmpipe, as is_format_supported
returns FALSE for any sample_count > 1.  OpenSWR does the same at the
moment, but that will change soon.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
7 years agoswr: fix unused variable warnings
Tim Rowley [Fri, 7 Apr 2017 00:09:23 +0000 (19:09 -0500)]
swr: fix unused variable warnings

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>