mesa.git
4 years agov3d/compiler: fix spill offset
Iago Toral Quiroga [Fri, 26 Jun 2020 10:25:01 +0000 (12:25 +0200)]
v3d/compiler: fix spill offset

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Fixes: 97566efe5cac0ff11b ("v3d: Rematerialize MOVs of uniforms instead of spilling them.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5664>

4 years agoradv: add support for MRTs compaction to avoid holes
Samuel Pitoiset [Thu, 11 Jun 2020 19:54:01 +0000 (21:54 +0200)]
radv: add support for MRTs compaction to avoid holes

SPI_SHADER_COL_FORMAT allocates export memory and CB_SHADER_MASK
map them to higher MRTs if necessary. The hardware allows to remap
MRTs to avoid holes somehow.

For example, if we have a scenario where MRT0 is unused and only
MRT1 and MRT2 are used, SPI_SHADER_COL_FORMAT is 0x77 and
CB_SHADER_MASK/CB_TARGET_MASK are 0x770 (this assumes
SPI_SHADER_UINT16_ABGR is set).

This allows us to remove one workaround that was added for fixing
GPU hangs with DXVK. I think this is because SPI_SHADER_COL_FORMAT
expects contiguous MRTs to be allocated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>

4 years agoradv: use SPI_SHADER_ZERO for non-written color attachments
Samuel Pitoiset [Thu, 11 Jun 2020 19:51:42 +0000 (21:51 +0200)]
radv: use SPI_SHADER_ZERO for non-written color attachments

When colorWriteMask is 0 we can assume that this color attachment
is unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>

4 years agoradv: rework 8/16-bit color attachment formats detection
Samuel Pitoiset [Thu, 25 Jun 2020 07:40:16 +0000 (09:40 +0200)]
radv: rework 8/16-bit color attachment formats detection

To prepare for MRTs compaction.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>

4 years agoradv: adjust CB_SHADER_MASK for dual-source blending in the shader info pass
Samuel Pitoiset [Thu, 11 Jun 2020 15:14:27 +0000 (17:14 +0200)]
radv: adjust CB_SHADER_MASK for dual-source blending in the shader info pass

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5434>

4 years agoradv: enable VK_AMD_shader_ballot on GFX6-7 with both compiler backends
Samuel Pitoiset [Fri, 26 Jun 2020 07:36:46 +0000 (09:36 +0200)]
radv: enable VK_AMD_shader_ballot on GFX6-7 with both compiler backends

It gives +1-2 FPS with Doom Eternal on Pitcairn.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5659>

4 years agonir: Add new rules to optimize NOOP pack/unpack pairs
Boris Brezillon [Fri, 19 Jun 2020 15:24:44 +0000 (17:24 +0200)]
nir: Add new rules to optimize NOOP pack/unpack pairs

nir_load_store_vectorize_test.ssbo_load_adjacent_32_32_64_64 expectations
need to be fixed accordingly.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5589>

4 years agogallivm/nir: fix const loading on big endian systems
Dave Airlie [Sun, 28 Jun 2020 21:40:13 +0000 (07:40 +1000)]
gallivm/nir: fix const loading on big endian systems

The code was expecting the lower 32-bits of the 64-bit to be
what it wanted, don't be implicit, pull the value from the union.

This should fix rendering on big endian systems since NIR was
introduced.

Fixes: 44a6b0107b37 ("gallivm: add nir->llvm translation (v2)")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5677>

4 years agofreedreno/ir3: fix resinfo wrmask
Jonathan Marek [Sun, 28 Jun 2020 01:50:17 +0000 (21:50 -0400)]
freedreno/ir3: fix resinfo wrmask

resinfo always writes 3 components, which was not being taken into account

Fixes these tests:
dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_3
dEQP-VK.renderpass.suballocation.attachment_sparse_filling.input_attachment_7

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5674>

4 years agodocs: use ref-links for internal references
Erik Faye-Lund [Sat, 27 Jun 2020 08:00:10 +0000 (10:00 +0200)]
docs: use ref-links for internal references

Ref-link have two benefits over generic links:

1. They produce the right result for non-HTML outputs
2. They get validated at build-time

So let's use them for internal references instead.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>

4 years agodocs: fix internal references
Erik Faye-Lund [Sat, 27 Jun 2020 08:21:45 +0000 (10:21 +0200)]
docs: fix internal references

It seems last time I tried to fix these, I missed a few spots. So let's
try to get things right this time.

Fixes: 429ff054917 ("docs/relnotes: update internal references")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>

4 years agodocs: restore accidentally dropped labels
Erik Faye-Lund [Sat, 27 Jun 2020 07:48:48 +0000 (09:48 +0200)]
docs: restore accidentally dropped labels

These were accidentally dropped when cleaning up the TOC, making links to
them dead. Because we used plain links, sphinx didn't inform us that
these became dead. Let's restore them.

Fixes: 14f2a81b6f6 ("docs: drop open-coded toc for articles")
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>

4 years agodocs: remove non-existent reference
Erik Faye-Lund [Sat, 27 Jun 2020 08:31:18 +0000 (10:31 +0200)]
docs: remove non-existent reference

The section referenced here was removed a while ago, but it was always
empty anyway. Let's just remove it instead of trying to fix it up.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5671>

4 years agomeson: Do not require shader cache for radv.
Bas Nieuwenhuizen [Thu, 25 Jun 2020 16:06:42 +0000 (18:06 +0200)]
meson: Do not require shader cache for radv.

We fixed the compile error a while ago.

Fixes: cc10b34e9ed "util/disk_cache: Fix disk_cache_get_function_timestamp with disabled cache."
Reviewed-by: Drew Davenport <ddavenport@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5649>

4 years agorbug: Fix rbug_delete_vs_state lock acquisition.
Vinson Lee [Sun, 24 May 2020 22:40:39 +0000 (15:40 -0700)]
rbug: Fix rbug_delete_vs_state lock acquisition.

Fix warning reported by Coverity Scan.

Double unlock (LOCK)
double_unlock: mtx_unlock unlocks rb_pipe->call_mutex while it is
unlocked.

Fixes: 07838ff990a7 ("rbug: Use the call mutex")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3023
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jakob Bornecrantz <jakob@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5196>

4 years agov3d: moving v3d simulator to src/broadcom
Alejandro Piñeiro [Fri, 29 Nov 2019 10:17:18 +0000 (11:17 +0100)]
v3d: moving v3d simulator to src/broadcom

So it could be used by both the OpenGL and the Vulkan driver.

In addition to the move, some small changes were needed to be made on
the API. For example, the simulator was receiving v3d_screen on
initialization, and that code setted v3d_screen->sim_file. Now it
returns the new sim_file created.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5666>

4 years agoturnip: Put VK_KHR_external_fence_fd stubs back
Kristian H. Kristensen [Fri, 26 Jun 2020 23:29:15 +0000 (16:29 -0700)]
turnip: Put VK_KHR_external_fence_fd stubs back

tu_ImportFenceFdKHR is used by tu_AcquireImageANDROID, which may or
may not work, but let's at least keep things compiling until somebody
has time to tie up the loose ends on the Android side.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5670>

4 years agoiris: Implement pipe->texture_subdata directly
Kenneth Graunke [Thu, 14 Mar 2019 08:21:16 +0000 (01:21 -0700)]
iris: Implement pipe->texture_subdata directly

Chris Wilson noted that u_default_texture_subdata's transfer path
sometimes results in wasteful double copies.  This patch is based
on an earlier path he wrote, but updated now that we have staging
blits for busy or compressed textures.

Consider the case of idle, non-CCS-compressed, tiled images:

The transfer-based CPU path has to return a "linear" mapping, so upon
map, it mallocs a temporary buffer.  u_default_texture_subdata then
copies the client memory to this malloc'd buffer, and transfer unmap
performs a tiled_memcpy to copy it back into the texture.  By writing
a direct texture_subdata() implementation, we're able to directly do
a tiled_memcpy from the client memory into the destination texture,
resulting in only one copy.

For linear buffers, there is no advantage to doing things directly, so
we simply fall back to u_default_texture_subdata()'s transfer path to
avoid replicating those cases.

We still may want to use GPU staging buffers for busy destinations
(to avoid stalls) or CCS-compressed images (to compress the data),
at which point we also fall back to the existing path.  We thought
to try and use a tiled temporary, but this didn't appear to help.

Improves performance in x11perf -shmput500 by 1.96x on my Icelake.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2500
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3818>

4 years agoturnip: Properly return VK_DEVICE_LOST on queuesubmit failures.
Eric Anholt [Wed, 17 Jun 2020 22:58:33 +0000 (15:58 -0700)]
turnip: Properly return VK_DEVICE_LOST on queuesubmit failures.

The device lost support closely matches the anv code for the same.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>

4 years agoturnip: Fix error handling of DRM_MSM_GEM_INFO ioctls.
Eric Anholt [Wed, 17 Jun 2020 19:33:07 +0000 (12:33 -0700)]
turnip: Fix error handling of DRM_MSM_GEM_INFO ioctls.

drmCommandWriteRead gives us a -errno, and we only checked for -1 (-EPERM,
incidentally).  All the callers wanted 0 for errors, which they were
getting by the fact that req.value was 0-initialized in our stack
allocation (though this only works as long as the kernel doesn't return an
error after setting req.value to something), and -EPERM not really being
an answer we would expect from an ioctl at this stage in the driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>

4 years agoturnip: Do better TU_DEBUG=startup logging of drmGetDevices2() failure.
Eric Anholt [Wed, 17 Jun 2020 18:25:17 +0000 (11:25 -0700)]
turnip: Do better TU_DEBUG=startup logging of drmGetDevices2() failure.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>

4 years agoturnip: semaphore support.
Bas Nieuwenhuizen [Sun, 17 Nov 2019 05:23:15 +0000 (06:23 +0100)]
turnip: semaphore support.

There is only one queue for now, so for non-shared semaphores, the
implementation is basically a no-op. For shared semaphores, this
always uses syncobjs. This depends on syncobj support in the msm
kernel driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>

4 years agoci/baremetal: Bump the kernel to a recent drm-msm-fixes for msm semaphores.
Eric Anholt [Tue, 16 Jun 2020 19:05:23 +0000 (12:05 -0700)]
ci/baremetal: Bump the kernel to a recent drm-msm-fixes for msm semaphores.

We need this to test the new VK feature we're about to land.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2769>

4 years agoaco: fix partial copies on GFX6/7
Daniel Schürmann [Fri, 26 Jun 2020 11:13:20 +0000 (12:13 +0100)]
aco: fix partial copies on GFX6/7

While we don't allow partial subdword copies,
we still need to be able to split 64bit registers

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5663>

4 years agomapi: x86: Fix dynamic entries in x86 tsd stubs.
Lepton Wu [Mon, 22 Jun 2020 22:33:32 +0000 (15:33 -0700)]
mapi: x86: Fix dynamic entries in x86 tsd stubs.

We need to update dynamic entries related code after updating
asm stubs.

Fixes: 45206d7673a ("mapi: Adapted libglvnd x86 tsd changes")
Signed-off-by: Lepton Wu <lepton@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5598>

4 years agoci/bare-metal: Fail early when we get stuck powering on a cheza.
Eric Anholt [Thu, 25 Jun 2020 18:10:07 +0000 (11:10 -0700)]
ci/bare-metal: Fail early when we get stuck powering on a cheza.

I think I've seen about 3 of this error total so far, but waiting 60
minutes for the scripts to give up wastes marge time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5651>

4 years agofreedreno/ir3: move nir finalization to after cache miss
Rob Clark [Tue, 23 Jun 2020 17:09:30 +0000 (10:09 -0700)]
freedreno/ir3: move nir finalization to after cache miss

In cases where every variant is a shader-cache-hit, we never need the
post-finalize round of nir opt/lowering passes.  So defer this until
the first shader-cache-miss to avoid doing pointless work.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agofreedreno/ir3: disk-cache support
Rob Clark [Fri, 5 Jun 2020 17:05:45 +0000 (10:05 -0700)]
freedreno/ir3: disk-cache support

Adds a shader disk-cache for ir3 shader variants.  Note that builds with
`-Dshader-cache=false` have no-op stubs with `disk_cache_create()` that
returns NULL.

Binning pass variants are serialized together with their draw-pass
counterparts, due to shared const-state.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agofreedreno/ir3: build binning variant at same time as draw variant
Rob Clark [Sat, 20 Jun 2020 19:53:36 +0000 (12:53 -0700)]
freedreno/ir3: build binning variant at same time as draw variant

For shader-cache, we are going to want to serialize them together.
Which is awkward if the two related variants are not compiled together.

This also decouples allocation and compile, which will simplify adding
shader-cache (which still needs to allocate, but can skip compile).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agofreedreno/a6xx+ir3: stop generating pointless binning shaders
Rob Clark [Sat, 20 Jun 2020 19:39:14 +0000 (12:39 -0700)]
freedreno/a6xx+ir3: stop generating pointless binning shaders

Currently we always do sysmem if there is tess.  And for GS, the binning
pass VS ends up identical to the draw pass VS, so no point in compiling
it twice.  (For GS what we should do someday is generate a binning pass
GS, and possibly if we can do cross-stage linking opts, an optimized
binning pass VS, but the required outputs would somehow have to end up
in the shader variant key.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agofreedreno/ir3: shuffle some variant fields
Rob Clark [Fri, 5 Jun 2020 19:07:02 +0000 (12:07 -0700)]
freedreno/ir3: shuffle some variant fields

Just to group together the parts that will get serialized when we have
shader disk-cache.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agofreedreno/ir3: add ir3_compiler_destroy()
Rob Clark [Thu, 4 Jun 2020 19:55:41 +0000 (12:55 -0700)]
freedreno/ir3: add ir3_compiler_destroy()

Use ir3_compiler_destroy() rather than open-coding ralloc_free().  This
will give us a place to add more compiler related cleanup code in the
following patches.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agofreedreno/ir3: move finalize_nir to pscreen hook
Rob Clark [Mon, 15 Jun 2020 21:37:24 +0000 (14:37 -0700)]
freedreno/ir3: move finalize_nir to pscreen hook

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agofreedreno/ir3: add ir3_finalize_nir()
Rob Clark [Mon, 15 Jun 2020 21:24:00 +0000 (14:24 -0700)]
freedreno/ir3: add ir3_finalize_nir()

The next step is to hook this into pscreen->finalize_nir() so it can
come before the state tracker's shader-caching.

Unfortunately we still need to do lower_io after mesa/st, so that is
split out into a post-finalize pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

4 years agozink: use OpFUnordNotEqual for nir_op_fne
Mike Blumenkrantz [Thu, 25 Jun 2020 13:25:45 +0000 (09:25 -0400)]
zink: use OpFUnordNotEqual for nir_op_fne

we want to detect NaNs here, and OpFUnordNotEqual is the variant which does this

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agozink: set lower_mul_high and lower_rotate in ntv compiler options
Mike Blumenkrantz [Mon, 22 Jun 2020 14:33:32 +0000 (10:33 -0400)]
zink: set lower_mul_high and lower_rotate in ntv compiler options

we don't implement these

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agozink: handle isign alu in ntv
Mike Blumenkrantz [Tue, 16 Jun 2020 15:17:47 +0000 (11:17 -0400)]
zink: handle isign alu in ntv

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agozink: handle ixor in ntv
Mike Blumenkrantz [Tue, 16 Jun 2020 15:14:19 +0000 (11:14 -0400)]
zink: handle ixor in ntv

fixes spec@glsl-1.30@execution@built-in-functions@fs-op-assign-bitxor tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agozink: lower byte/word extract ops in nir
Mike Blumenkrantz [Mon, 15 Jun 2020 17:52:02 +0000 (13:52 -0400)]
zink: lower byte/word extract ops in nir

we don't implement these, and pre-optimizing them breaks things in ntv->vtn

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agozink: add bitfield_reverse handling to ntv
Mike Blumenkrantz [Fri, 12 Jun 2020 14:19:56 +0000 (10:19 -0400)]
zink: add bitfield_reverse handling to ntv

fixes several piglit tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agozink: add ult handling for ntv
Mike Blumenkrantz [Wed, 10 Jun 2020 14:04:36 +0000 (10:04 -0400)]
zink: add ult handling for ntv

fixes shaders@glsl-vs-absolutedifference-uint piglit test

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agozink: handle signed and unsigned min/max ops in ntv
Mike Blumenkrantz [Mon, 8 Jun 2020 17:59:02 +0000 (13:59 -0400)]
zink: handle signed and unsigned min/max ops in ntv

fixes a number of piglit amd_shader_trinary_minmax tests

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>

4 years agoradv: remove the load/store workaround for Monster Hunter World with LLVM
Samuel Pitoiset [Fri, 26 Jun 2020 07:27:46 +0000 (09:27 +0200)]
radv: remove the load/store workaround for Monster Hunter World with LLVM

Now that ACO is default, this is pointless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>

4 years agoradv: remove the shader ballot workaround for Youngblood with LLVM
Samuel Pitoiset [Fri, 26 Jun 2020 07:23:40 +0000 (09:23 +0200)]
radv: remove the shader ballot workaround for Youngblood with LLVM

Now that ACO is default, this is now pointless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5658>

4 years agodocs: update favicon
Erik Faye-Lund [Wed, 17 Jun 2020 10:45:21 +0000 (12:45 +0200)]
docs: update favicon

I created a new and cleaner favicon for mesa3d.org, and it seems like a
good idea to use that one for the docs as well.

While we're at it, replace the original PNG with the original SVG asset
the ICO-file was generated from.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5643>

4 years agoturnip: fix huge scissor min/max case
Jonathan Marek [Thu, 25 Jun 2020 14:55:48 +0000 (10:55 -0400)]
turnip: fix huge scissor min/max case

Now that tu_cs_emit_regs is used for the scissor, it hits an assert when
the scissor is too large. Fixes this dEQP test:

dEQP-VK.draw.scissor.static_scissor_max_int32

Fixes: 9c0ae5704d654108fd36b ("turnip: fix empty scissor case")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5655>

4 years agoturnip: fix VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_FEATURES
Jonathan Marek [Fri, 26 Jun 2020 03:32:20 +0000 (23:32 -0400)]
turnip: fix VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_1_1_FEATURES

My attempt to be clever here backfired, it overwrites the pNext and stops
the loop (causing deqp to fail to query extension features after that).

Fixes: 62de79ac4492ac9e ("turnip: implement VK_KHR_shader_draw_parameters")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5654>

4 years agopanfrost: Add PAN_MESA_DEBUG=gl3 flag
Icecream95 [Sun, 21 Jun 2020 06:22:21 +0000 (18:22 +1200)]
panfrost: Add PAN_MESA_DEBUG=gl3 flag

This flag allows forcing GL 3.3 without having to use
MESA_GL_VERSION_OVERRIDE etc.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5584>

4 years agofreedreno/a6xx: use firstIndex field
Connor Abbott [Thu, 25 Jun 2020 10:32:24 +0000 (12:32 +0200)]
freedreno/a6xx: use firstIndex field

Analogous to the turnip change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>

4 years agotu: Pass firstIndex directly to CP_DRAW_INDX_OFFSET
Connor Abbott [Thu, 25 Jun 2020 10:23:49 +0000 (12:23 +0200)]
tu: Pass firstIndex directly to CP_DRAW_INDX_OFFSET

Saves some minor overhead, cleans things up a bit, and removes one more
unknown. We now program the internal registers in the same way between
direct/indirect draws.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>

4 years agofreedreno/registers: Label firstIndex field in CP_DRAW_INDX_OFFSET
Connor Abbott [Thu, 25 Jun 2020 10:17:31 +0000 (12:17 +0200)]
freedreno/registers: Label firstIndex field in CP_DRAW_INDX_OFFSET

Based on comparing the implementations of CP_DRAW_INDX_OFFSET and
CP_DRAW_INDIRECT, this is what this field is for.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>

4 years agofreedreno: On a5xx+ INDX_SIZE is MAX_INDICES
Connor Abbott [Thu, 25 Jun 2020 13:35:28 +0000 (15:35 +0200)]
freedreno: On a5xx+ INDX_SIZE is MAX_INDICES

This was already done correctly for the indirect variants, and turnip
was setting the correct value, but it seems freedreno missed the change
in the non-indirect variant. Also, fix a misspelling of "indices" and
add a type to INDX_SIZE.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>

4 years agofreedreno: Share constlen between different stages properly
Connor Abbott [Tue, 23 Jun 2020 12:12:09 +0000 (14:12 +0200)]
freedreno: Share constlen between different stages properly

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>

4 years agofreedreno: Refactor ir3_cache shader compilation
Connor Abbott [Tue, 23 Jun 2020 11:19:07 +0000 (13:19 +0200)]
freedreno: Refactor ir3_cache shader compilation

Use an array, which makes it more like turnip and makes implementing the
const limits easier.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>

4 years agotu: Share constlen between different stages properly
Connor Abbott [Wed, 24 Jun 2020 10:56:09 +0000 (12:56 +0200)]
tu: Share constlen between different stages properly

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>

4 years agoir3: Add ir3_trim_constlen()
Connor Abbott [Wed, 24 Jun 2020 10:55:23 +0000 (12:55 +0200)]
ir3: Add ir3_trim_constlen()

This provides the policy for how to handle reducing constlen for some
stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>

4 years agoir3: Support variants with different constlen's
Connor Abbott [Wed, 24 Jun 2020 10:03:59 +0000 (12:03 +0200)]
ir3: Support variants with different constlen's

This provides the mechanism for compiling variants with a reduced
constlen. The next patch provides the policy for choosing which to
reduce.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>

4 years agoir3: Include ir3_compiler from ir3_shader
Connor Abbott [Wed, 24 Jun 2020 10:02:56 +0000 (12:02 +0200)]
ir3: Include ir3_compiler from ir3_shader

I wanted to access the ir3_compiler from a small helper inside
ir3_shader.h, which currently isn't possible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>

4 years agoir3, freedreno: Round up constlen earlier
Connor Abbott [Tue, 23 Jun 2020 15:09:10 +0000 (17:09 +0200)]
ir3, freedreno: Round up constlen earlier

Prevents problems when calculating whether we overflow the shared limit.
Note that on a6xx, the macros handle the assert for us.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>

4 years agov3d/compiler: don't rewrite unused temporaries to point to NOP register
Iago Toral Quiroga [Thu, 25 Jun 2020 09:54:04 +0000 (11:54 +0200)]
v3d/compiler: don't rewrite unused temporaries to point to NOP register

This was assuming that unused temporaries are written but never read,
since the NOP register can only be used as a destination register,
but we can end up here also for temporaries that are read once but
never written.

This was found with a graphicsfuzz test that has a switch with
cases that have unreachable discards. In that test, NIR genrates
code like this:

decl_reg vec3 32 r19
...
r20 = mov r19.z
r21 = mov r19.y
r22 = mov r19.x

Where r19.xyz would generate 3 temporary registers that are read but
never written, so we would rewrite them to point to the NOP register
as QPU instruction sources, which is not allowed and would hit an
assert that expect magic reads to be from [r0,r5] only.

Fixes:
dEQP-VK.graphicsfuzz.unreachable-switch-case-with-discards

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5645>

4 years agov3d: Use stvpmd for non-uniform offsets in GS
Neil Roberts [Tue, 23 Jun 2020 22:16:43 +0000 (00:16 +0200)]
v3d: Use stvpmd for non-uniform offsets in GS

The offset for the VPM write for storing outputs from the geometry
shader isn’t necessarily uniform across all the lanes. This can happen
if some of the lanes don’t emit some of the vertices. In that case the
offset for the subsequent vertices will be different in each lane. In
that case we need to use the stvpmd instruction instead of stvpmv
because it will scatter the values out.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3150
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5621>

4 years agov3d: Add missing macro for stvpmd instruction
Neil Roberts [Tue, 23 Jun 2020 22:15:12 +0000 (00:15 +0200)]
v3d: Add missing macro for stvpmd instruction

stvpmd is like stvpmv but it scatters the output. It can be used with
non-dynamically uniform offsets.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5621>

4 years agoradeonsi: remove tabs
Marek Olšák [Sat, 20 Jun 2020 03:00:15 +0000 (23:00 -0400)]
radeonsi: remove tabs

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoradeonsi: clear per-context buffers at the end of si_create_context
Marek Olšák [Sat, 20 Jun 2020 01:40:18 +0000 (21:40 -0400)]
radeonsi: clear per-context buffers at the end of si_create_context

We don't want any packets before CONTEXT_CONTROL.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoradeonsi: make si_pm4_cmd_begin/end static and simplify all usages
Marek Olšák [Tue, 16 Jun 2020 02:39:00 +0000 (22:39 -0400)]
radeonsi: make si_pm4_cmd_begin/end static and simplify all usages

There is no longer the confusing trailing si_pm4_cmd_end call.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoradeonsi: disallow adding BOs into si_pm4_state except 1 shader BO per state
Marek Olšák [Tue, 16 Jun 2020 02:21:50 +0000 (22:21 -0400)]
radeonsi: disallow adding BOs into si_pm4_state except 1 shader BO per state

The si_shader pointer is already there, so use it and remove the array
of BOs.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoradeonsi: make wait_mem_scratch unmappable
Marek Olšák [Sat, 20 Jun 2020 00:54:58 +0000 (20:54 -0400)]
radeonsi: make wait_mem_scratch unmappable

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoradeonsi: don't add the tess ring buffers into the cs_preamble state
Marek Olšák [Tue, 16 Jun 2020 17:56:10 +0000 (13:56 -0400)]
radeonsi: don't add the tess ring buffers into the cs_preamble state

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoradeonsi: rename init_config states to cs_preamble states
Marek Olšák [Mon, 15 Jun 2020 21:00:09 +0000 (17:00 -0400)]
radeonsi: rename init_config states to cs_preamble states

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoradeonsi: don't add the border color buffer into the init_config state
Marek Olšák [Sat, 23 May 2020 11:13:27 +0000 (07:13 -0400)]
radeonsi: don't add the border color buffer into the init_config state

We might have to replace init_config for preemption.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoac,winsys/amdgpu: align IBs the same as the kernel
Marek Olšák [Sat, 20 Jun 2020 04:24:23 +0000 (00:24 -0400)]
ac,winsys/amdgpu: align IBs the same as the kernel

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agoamd: add proper definitions for NOP packets
Marek Olšák [Thu, 18 Jun 2020 05:04:51 +0000 (01:04 -0400)]
amd: add proper definitions for NOP packets

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>

4 years agogitlab-ci: attach the Fossilize log file as artifact on failure
Samuel Pitoiset [Thu, 25 Jun 2020 09:21:12 +0000 (11:21 +0200)]
gitlab-ci: attach the Fossilize log file as artifact on failure

It might be help.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5627>

4 years agogitlab-ci: append Fossilize stdout/stderr to a file to reduce spam
Samuel Pitoiset [Wed, 24 Jun 2020 12:07:39 +0000 (14:07 +0200)]
gitlab-ci: append Fossilize stdout/stderr to a file to reduce spam

Fossilize is really verbose and it's easy to reach the buffer
limit in GitLab CI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5627>

4 years agogitlab-ci: set the number of Fossilize threads to 4
Samuel Pitoiset [Wed, 24 Jun 2020 10:16:31 +0000 (12:16 +0200)]
gitlab-ci: set the number of Fossilize threads to 4

The shared runners are set up for concurrent jobs ~= CPUs / 4 (x86)
or 8 (ARM).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5627>

4 years agopanfrost: Only copy resources when they are in a pending batch
Icecream95 [Thu, 25 Jun 2020 07:51:37 +0000 (19:51 +1200)]
panfrost: Only copy resources when they are in a pending batch

Fixes a performance regression in alacritty, and rendering is still
fine in GLQuake ports.

Fixes: 361fb38662f ("panfrost: Copy resources when mapping to avoid waiting for readers")
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5642>

4 years agoanv: Align "used" attribute to 64 bits.
Rafael Antognolli [Wed, 24 Jun 2020 18:57:51 +0000 (18:57 +0000)]
anv: Align "used" attribute to 64 bits.

This is a 64 bits value that might not be aligned on 32 bit plaforms.
Since it's used with atomics, let's make sure it gets properly aligned
to avoid any potential performance loss.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5637>

4 years agoiris: Align last_seqnos to 64 bits.
Rafael Antognolli [Wed, 24 Jun 2020 18:52:55 +0000 (18:52 +0000)]
iris: Align last_seqnos to 64 bits.

last_seqnos is used in atomic operations. Specially on 32 bit platorms,
it tends to be slower if it's not aligned to 64 bits (see
cdc331c6f9f6b2ffc035018de4445dba9b67c1f7). This fixes a small regression
on Bioshock.

Fixes: aba3aed96e4 ("iris: fix export of GEM handles")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5637>

4 years agoci: Remove a stray "always" on the freedreno traces job.
Eric Anholt [Thu, 25 Jun 2020 20:48:26 +0000 (13:48 -0700)]
ci: Remove a stray "always" on the freedreno traces job.

This was making it so that the CI would error if the set of files modified
or the pipeline involvd meant the jobs we depend on weren't enabled.  It
was just some misplaced debug leftovers of mine.

Fixes: b88c46fa11ae ("ci: Add a freedreno a630 tracie run.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5653>

4 years agofreedreno/a6xx: Add support for polygon fill mode (as long as front==back).
Eric Anholt [Wed, 10 Jun 2020 20:11:21 +0000 (13:11 -0700)]
freedreno/a6xx: Add support for polygon fill mode (as long as front==back).

Unlike a4xx, we don't seem to have separate back vs front fields any more.
Still, this improves desktop GL conformance (and one of the traces in
traces-db).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5650>

4 years agoturnip: Add support for polygon fill modes.
Eric Anholt [Wed, 10 Jun 2020 20:05:53 +0000 (13:05 -0700)]
turnip: Add support for polygon fill modes.

Passes the new tests in dEQP-VK.rasterization.culling.*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5650>

4 years agofreedreno/a6xx: Define the register fields for polygon fill mode.
Eric Anholt [Wed, 10 Jun 2020 19:59:38 +0000 (12:59 -0700)]
freedreno/a6xx: Define the register fields for polygon fill mode.

Produced by comparing the traces of:
dEQP-VK.rasterization.culling.front_triangles
dEQP-VK.rasterization.culling.front_triangles_point
dEQP-VK.rasterization.culling.front_triangles_line

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5650>

4 years agoci: Add a freedreno a630 tracie run.
Eric Anholt [Mon, 8 Jun 2020 21:51:59 +0000 (14:51 -0700)]
ci: Add a freedreno a630 tracie run.

This job runs in about one minute on the current set of traces, and has
successfully revealed some bugs in our current rendering.  Takes about 7
minutes currently.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoci/tracie: Fix apitrace dump using "less" which isn't in the ARM rootfs.
Eric Anholt [Wed, 24 Jun 2020 17:47:37 +0000 (10:47 -0700)]
ci/tracie: Fix apitrace dump using "less" which isn't in the ARM rootfs.

You would get no output during the "find the last frame" step of the trace
replay.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoci/tracie: Print the path if the trace isn't found.
Eric Anholt [Wed, 10 Jun 2020 02:01:06 +0000 (19:01 -0700)]
ci/tracie: Print the path if the trace isn't found.

I hit this a few times while setting up CI.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoci: Include trace replay support in ARM rootfses.
Rohan Garg [Tue, 28 Jan 2020 14:19:53 +0000 (15:19 +0100)]
ci: Include trace replay support in ARM rootfses.

Builds the renderdoc and apitrace programs so we can replay GL traces on
DUTs.

[Separated out from 5472's commit that also enabled the jobs in LAVA,
dropped unnecessary python packages from arm_build, fixed up arm64_test
build, traces-db in baremetal, new commit message by anholt]

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoci/bare-metal: Don't include dev packages in arm*test.
Eric Anholt [Wed, 10 Jun 2020 21:17:23 +0000 (14:17 -0700)]
ci/bare-metal: Don't include dev packages in arm*test.

We just need these to build our rootfs, clean them out afterwards.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoci/bare-metal: Skip setting of unset variables at startup.
Eric Anholt [Mon, 22 Jun 2020 23:54:10 +0000 (16:54 -0700)]
ci/bare-metal: Skip setting of unset variables at startup.

It's silly to be setting (and logging the setting of!) all the env vars we
*didn't* set in a job.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoci: Move ARM rootfses to stable
Tomeu Vizoso [Mon, 15 Jun 2020 11:29:22 +0000 (13:29 +0200)]
ci: Move ARM rootfses to stable

We build in Debian buster but were currently testing in bullseye-based
ramdisks. This has started being a problem since Python 3.7 was removed
from bullseye.

[ Also bumped arm_test containers, by anholt ]

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoci: Don't call renderdoc's ReplayController.Shutdown()
Tomeu Vizoso [Tue, 14 Apr 2020 13:57:08 +0000 (15:57 +0200)]
ci: Don't call renderdoc's ReplayController.Shutdown()

If we do, Renderdoc will call eglDestroyContext twice, causing crashes
within Mesa.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5433>

4 years agoturnip: implement VK_KHR_shader_draw_parameters
Jonathan Marek [Wed, 24 Jun 2020 20:00:30 +0000 (16:00 -0400)]
turnip: implement VK_KHR_shader_draw_parameters

Note: going by the blob, VFD_INDEX_OFFSET/FD_INSTANCE_START_OFFSET seem
completely unused by indirect draws, so this changes them to only be set
for non-indirect draws (and moves them to the vs_params draw state).

Passes dEQP-VK.draw.shader_draw_parameters.*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5635>

4 years agofreedreno/ir3: add support for load_draw_id
Jonathan Marek [Wed, 24 Jun 2020 19:58:44 +0000 (15:58 -0400)]
freedreno/ir3: add support for load_draw_id

This is part of adding VK_KHR_shader_draw_parameters for turnip.

IR3_DP_VTXID_BASE/IR3_DP_VTXCNT_MAX offsets are changed to match what
CP_DRAW_INDIRECT_MULTI requires.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5635>

4 years agofreedreno/registers: add CP_DRAW_INDIRECT_MULTI
Jonathan Marek [Wed, 24 Jun 2020 19:53:28 +0000 (15:53 -0400)]
freedreno/registers: add CP_DRAW_INDIRECT_MULTI

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5635>

4 years agogitlab-ci: add a list of expected failures for RADV/ACO on NAVI14
Samuel Pitoiset [Thu, 25 Jun 2020 13:28:28 +0000 (15:28 +0200)]
gitlab-ci: add a list of expected failures for RADV/ACO on NAVI14

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5647>

4 years agoradv: enable ACO by default
Daniel Schürmann [Thu, 19 Sep 2019 11:43:35 +0000 (13:43 +0200)]
radv: enable ACO by default

No more dragons have been seen, caution is still required...

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>

4 years agoradv: change use_aco -> use_llvm
Daniel Schürmann [Thu, 11 Jun 2020 09:43:02 +0000 (10:43 +0100)]
radv: change use_aco -> use_llvm

We are about to make ACO the default backend.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>

4 years agoradv: introduce RADV_DEBUG=llvm option
Daniel Schürmann [Fri, 12 Jun 2020 16:55:00 +0000 (17:55 +0100)]
radv: introduce RADV_DEBUG=llvm option

This option enables the LLVM compiler backend to be used
for shader compilation

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>

4 years agozink: unify code for setting resource barriers
Mike Blumenkrantz [Fri, 29 May 2020 18:46:53 +0000 (14:46 -0400)]
zink: unify code for setting resource barriers

no functional changes, this code was just duplicated

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5615>

4 years agoradv: lower 64-bit dfloor on GFX6 for fixing precision issues
Samuel Pitoiset [Wed, 24 Jun 2020 07:15:47 +0000 (09:15 +0200)]
radv: lower 64-bit dfloor on GFX6 for fixing precision issues

GFX6 doesn't support v_floor_f64 and the precision of v_fract_f64
which is used to implement 64-bit floor is less than what Vulkan
requires.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>

4 years agoradv: lower 64-bit drcp/dsqrt/drsq for fixing precision issues
Samuel Pitoiset [Tue, 23 Jun 2020 16:29:22 +0000 (18:29 +0200)]
radv: lower 64-bit drcp/dsqrt/drsq for fixing precision issues

The hardware precision of v_rcp_f64, v_sqrt_f64 and v_rsq_f64
is less than what Vulkan requires.

This lowers using the Goldschmidt's algorithm to improve precision.

Fixes dEQP-VK.glsl.builtin.precision_double.* on both compiler
backends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>