mesa.git
12 years agogallium/tests/trivial: Switch to the pipe loader.
Francisco Jerez [Wed, 25 Apr 2012 20:16:26 +0000 (22:16 +0200)]
gallium/tests/trivial: Switch to the pipe loader.

It simplifies things slightly, and besides, it makes possible to
execute the trivial tests on a hardware device instead of being
limited to software rendering.

Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
12 years agogallium: Add "pipe-loader" target.
Francisco Jerez [Fri, 25 Nov 2011 13:26:00 +0000 (14:26 +0100)]
gallium: Add "pipe-loader" target.

This target generates pipe driver modules intended to be consumed by
auxiliary/pipe-loader.  Most of it was taken from the "gbm" target --
the duplicated code will be replaced with references to this target in
a future commit.

Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
12 years agogallium: Add pipe loader for device enumeration and driver multiplexing.
Francisco Jerez [Wed, 25 Apr 2012 20:16:00 +0000 (22:16 +0200)]
gallium: Add pipe loader for device enumeration and driver multiplexing.

The goal is to have a uniform interface to create winsys and
pipe_screen instances for any driver, exposing the device enumeration
capabilities that might be supported by the operating system (for now
there's a "drm" back-end using udev and a "sw" back-end that always
returns the same built-in devices).

The typical use case of this library will be:
>
> struct pipe_loader_device devs[n];
> struct pipe_screen *screen;
>
> pipe_loader_probe(&devs, n);
>[pick some device from the array...]
>
> screen = pipe_loader_create_screen(dev, library_search_path);
>[do something with screen...]
>
> screen->destroy(screen);
> pipe_loader_release(&devs, N);
>

A part of the code was taken from targets/gbm/pipe_loader.c, which
will be removed and replaced with calls into this library by a future
commit.

12 years agogallium/tgsi/text: Replace open-coded integer parsing with parse_int().
Francisco Jerez [Tue, 20 Mar 2012 21:46:11 +0000 (22:46 +0100)]
gallium/tgsi/text: Replace open-coded integer parsing with parse_int().

12 years agogallium/tgsi/text: Parse immediates of non-float data types.
Francisco Jerez [Tue, 20 Mar 2012 21:39:29 +0000 (22:39 +0100)]
gallium/tgsi/text: Parse immediates of non-float data types.

12 years agogallium/tgsi: Fix tgsi_build_full_immediate() for non-float data types.
Francisco Jerez [Tue, 20 Mar 2012 20:29:36 +0000 (21:29 +0100)]
gallium/tgsi: Fix tgsi_build_full_immediate() for non-float data types.

12 years agogallium/tgsi/text: Make label parsing optional for branch instructions.
Francisco Jerez [Mon, 26 Mar 2012 15:56:29 +0000 (17:56 +0200)]
gallium/tgsi/text: Make label parsing optional for branch instructions.

Structured branch instructions like IF, ELSE, BGNLOOP, ENDLOOP no
longer require a label argument, make it optional for them.

12 years agost/mesa: Use local temporary registers.
Francisco Jerez [Thu, 8 Dec 2011 17:05:25 +0000 (18:05 +0100)]
st/mesa: Use local temporary registers.

Local makes more sense in most places because non-inline function
calls are unimplemented anyway.

12 years agogallium/tgsi/ureg: Support local temporary emission.
Francisco Jerez [Mon, 26 Mar 2012 15:55:30 +0000 (17:55 +0200)]
gallium/tgsi/ureg: Support local temporary emission.

12 years agogallium/tgsi/ureg: Lift the restriction on releasing temporaries over UREG_MAX_TEMP.
Francisco Jerez [Thu, 8 Dec 2011 17:00:17 +0000 (18:00 +0100)]
gallium/tgsi/ureg: Lift the restriction on releasing temporaries over UREG_MAX_TEMP.

12 years agogallium/util: Define util_strchrnul.
Francisco Jerez [Fri, 25 Nov 2011 13:37:07 +0000 (14:37 +0100)]
gallium/util: Define util_strchrnul.

Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
12 years agogallium/compute: Drop TGSI dependency.
Francisco Jerez [Sun, 18 Mar 2012 22:59:33 +0000 (23:59 +0100)]
gallium/compute: Drop TGSI dependency.

Add a shader cap for specifying the preferred shader representation.
Right now the only supported value is TGSI, other enum values will be
added as they are needed.

This is mainly to accommodate AMD's LLVM compiler back-end by letting
it bypass the TGSI representation for compute programs.  Other drivers
will keep using the common TGSI instruction set.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
12 years agogallium/tgsi: Introduce the "LOCAL" register declaration modifier.
Francisco Jerez [Sun, 18 Mar 2012 18:21:36 +0000 (19:21 +0100)]
gallium/tgsi: Introduce the "LOCAL" register declaration modifier.

This change will be useful to implement function parameter passing on
top of TGSI.  As we don't have a proper stack, a register-based
calling convention will be used instead, which isn't necessarily a bad
thing given that GPUs often have plenty of registers to spare.

Using the same register space for local temporaries and
inter-procedural communication caused some inefficiencies, because in
some cases the register allocator would lose the freedom to merge
temporary values together into the same physical register, leading to
suboptimal register (and sometimes, as a side effect, instruction)
usage.

The LOCAL declaration modifier specifies that the value isn't intended
for parameter passing and as a result the compiler doesn't have to
give any guarantees of it being preserved across function boundaries.

Ignoring the LOCAL flag doesn't change the semantics of a valid
program in any way, because local variables are just supposed to get a
more relaxed treatment.  IOW, this should be a backwards-compatible
change.

12 years agogallium/tgsi: Add support for atomic opcodes.
Francisco Jerez [Mon, 30 Apr 2012 18:22:23 +0000 (20:22 +0200)]
gallium/tgsi: Add support for atomic opcodes.

12 years agogallium/tgsi: Add support for barriers.
Francisco Jerez [Mon, 30 Apr 2012 18:21:38 +0000 (20:21 +0200)]
gallium/tgsi: Add support for barriers.

12 years agogallium/tgsi: Define system values used to query the compute grid parameters.
Francisco Jerez [Sun, 18 Mar 2012 17:13:29 +0000 (18:13 +0100)]
gallium/tgsi: Define system values used to query the compute grid parameters.

12 years agogallium/tgsi: Add resource write-back support.
Francisco Jerez [Mon, 30 Apr 2012 18:20:29 +0000 (20:20 +0200)]
gallium/tgsi: Add resource write-back support.

Define a new STORE opcode with a role dual to the LOAD opcode, and add
flags to specify that a shader resource is intended for writing.

12 years agogallium/tgsi: Add support for raw resources.
Francisco Jerez [Mon, 30 Apr 2012 17:08:55 +0000 (19:08 +0200)]
gallium/tgsi: Add support for raw resources.

Normal resource access (e.g. the LOAD TGSI opcode) is supposed to
perform a series of conversions to turn the texture data as it's found
in memory into the target data type.

In compute programs it's often the case that we only want to access
the raw bits as they're stored in some buffer object, and any kind of
channel conversion and scaling is harmful or inefficient, especially
in implementations that lack proper hardware support to take care of
it -- in those cases the conversion has to be implemented in software
and it's likely to result in a performance hit even if the pipe_buffer
and declaration data types are set up in a way that would just pass
the data through.

Add a declaration flag that marks a resource as typeless.  No channel
conversion will be performed in that case, and the X coordinate of the
address vector will be interpreted in byte units instead of elements
for obvious reasons.

This is similar to D3D11's ByteAddressBuffer, and will be used to
implement OpenCL's constant arguments.  The remaining four compute
memory spaces can also be understood as raw resources.

12 years agogallium/tgsi: Define the TGSI_BUFFER texture target.
Francisco Jerez [Mon, 30 Apr 2012 16:28:36 +0000 (18:28 +0200)]
gallium/tgsi: Define the TGSI_BUFFER texture target.

This texture type was already referred to by the documentation but it
was never defined.  Define it as 0 to match the pipe_texture_target
enumeration values.

12 years agogallium/tgsi: Introduce the compute processor.
Francisco Jerez [Sun, 18 Mar 2012 18:09:18 +0000 (19:09 +0100)]
gallium/tgsi: Introduce the compute processor.

12 years agogallium/tgsi: Move interpolation info from tgsi_declaration to a separate token.
Francisco Jerez [Mon, 30 Apr 2012 16:27:52 +0000 (18:27 +0200)]
gallium/tgsi: Move interpolation info from tgsi_declaration to a separate token.

Move Interpolate, Centroid and CylindricalWrap from tgsi_declaration
to a separate token -- they only make sense for FS inputs and we need
room for other flags in the top-level declaration token.

12 years agogallium: Add context hooks for binding shader resources.
Francisco Jerez [Tue, 1 May 2012 00:47:03 +0000 (02:47 +0200)]
gallium: Add context hooks for binding shader resources.

12 years agogallium/tgsi: Split sampler views from shader resources.
Francisco Jerez [Tue, 1 May 2012 00:38:51 +0000 (02:38 +0200)]
gallium/tgsi: Split sampler views from shader resources.

This commit splits the current concept of resource into "sampler
views" and "shader resources":

"Sampler views" are textures or buffers that are bound to a given
shader stage and can be read from in conjunction with a sampler
object.  They are analogous to OpenGL texture objects or Direct3D
SRVs.

"Shader resources" are textures or buffers that can be read and
written from a shader.  There's no support for floating point
coordinates, address wrap modes or filtering, and, unlike sampler
views, shader resources are global for the whole graphics pipeline.
They are analogous to OpenGL image objects (as in
ARB_shader_image_load_store) or Direct3D UAVs.

Most hardware is likely to implement shader resources and sampler
views as separate objects, so, having the distinction at the API level
simplifies things slightly for the driver.

This patch introduces the SVIEW register file with a declaration token
and syntax analogous to the already existing RES register file.  After
this change, the SAMPLE_* opcodes no longer accept a resource as
input, but rather a SVIEW object.  To preserve the functionality of
reading from a sampler view with integer coordinates, the
SAMPLE_I(_MS) opcodes are introduced which are similar to LOAD(_MS)
but take a SVIEW register instead of a RES register as argument.

12 years agogallium: Basic compute interface.
Francisco Jerez [Wed, 25 Apr 2012 20:15:16 +0000 (22:15 +0200)]
gallium: Basic compute interface.

Define an interface that exposes the minimal functionality required to
implement some of the popular compute APIs.  This commit adds entry
points to set the grid layout and other state required to keep track
of the usual address spaces employed in compute APIs, to bind a
compute program, and execute it on the device.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
12 years agoradeonsi: Properly translate vertex format swizzle.
Michel Dänzer [Fri, 11 May 2012 09:52:16 +0000 (11:52 +0200)]
radeonsi: Properly translate vertex format swizzle.

egltri_screen works correctly!

12 years agoradeon/llvm: Remove AMDILMCCodeEmitter.cpp
Tom Stellard [Thu, 10 May 2012 19:54:43 +0000 (15:54 -0400)]
radeon/llvm: Remove AMDILMCCodeEmitter.cpp

12 years agoradeon/llvm: Remove SILowerShaderInstructions.cpp
Tom Stellard [Thu, 10 May 2012 19:31:42 +0000 (15:31 -0400)]
radeon/llvm: Remove SILowerShaderInstructions.cpp

12 years agoradeonsi/llvm: Move lowering of RETURN to ConvertToISA pass
Tom Stellard [Thu, 10 May 2012 19:29:00 +0000 (15:29 -0400)]
radeonsi/llvm: Move lowering of RETURN to ConvertToISA pass

12 years agoradeon/llvm: Add some comments
Tom Stellard [Wed, 9 May 2012 15:06:48 +0000 (11:06 -0400)]
radeon/llvm: Add some comments

12 years agoradeon/llvm: Move util functions into AMDGPU namespace
Tom Stellard [Thu, 10 May 2012 16:49:41 +0000 (12:49 -0400)]
radeon/llvm: Move util functions into AMDGPU namespace

12 years agoi965/hiz: Convert gen{6,7}_hiz.h to gen{6,7}_blorp.h
Paul Berry [Mon, 30 Apr 2012 05:05:28 +0000 (22:05 -0700)]
i965/hiz: Convert gen{6,7}_hiz.h to gen{6,7}_blorp.h

This patch renames the gen6_hiz.h and gen7_hiz.h files to correspond
to the renames of the corresponding .cpp files (see previous commit).

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
12 years agoi965/hiz: Convert gen{6,7}_hiz.c to C++
Paul Berry [Mon, 30 Apr 2012 04:50:22 +0000 (21:50 -0700)]
i965/hiz: Convert gen{6,7}_hiz.c to C++

This patch converts the files gen6_hiz.c and gen7_hiz.c to C++, in
preparation for expanding the HiZ code to support arbitrary blits.

The new files are called gen6_blorp.cpp and gen7_blorp.cpp to reflect
the expanded role that this code will serve--"blorp" stands for "BLit
Or Resolve Pass".

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
12 years agoi965/hiz: Make void pointer type casts explicit
Paul Berry [Thu, 26 Apr 2012 16:29:19 +0000 (09:29 -0700)]
i965/hiz: Make void pointer type casts explicit

Previous to this patch, gen6_hiz.c contained two implicit type casts
from void * to a a non-void pointer type.  This is allowed in C but
not in C++.  This patch makes the type casts explicit, so that
gen6_hiz.c can be converted into a C++ file.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
12 years agointel: Work around differences between C and C++ scoping rules.
Paul Berry [Mon, 30 Apr 2012 04:46:47 +0000 (21:46 -0700)]
intel: Work around differences between C and C++ scoping rules.

In C++, if a struct is defined inside another struct, or its name is
first seen inside a struct or function, the struct is nested inside
the namespace of the struct or function it appears in.  In C, all
structs are visible from toplevel.

This patch explicitly moves the decalartions of intel_batchbuffer to
toplevel, so that it does not get nested inside a namespace when
header files are included from C++.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
12 years agointel: Add extern "C" declarations to headers
Paul Berry [Fri, 27 Apr 2012 14:40:34 +0000 (07:40 -0700)]
intel: Add extern "C" declarations to headers

These declarations are necessary to allow C++ code to call C code
without causing unresolved symbols (which would make the driver fail
to load).

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
12 years agoradeon/llvm: Auto-encode RAT_WRITE_CACHELESS_eg
Tom Stellard [Thu, 10 May 2012 15:52:00 +0000 (11:52 -0400)]
radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_eg

12 years agoradeon/llvm: Delete all instructions that have been custom lowered
Tom Stellard [Thu, 10 May 2012 15:31:52 +0000 (11:31 -0400)]
radeon/llvm: Delete all instructions that have been custom lowered

12 years agoradeonsi: Set NONE format for unused vertex shader position export slots.
Michel Dänzer [Thu, 10 May 2012 11:54:39 +0000 (13:54 +0200)]
radeonsi: Set NONE format for unused vertex shader position export slots.

12 years agoradeonsi: Eliminate one more magic number for texture image resources.
Michel Dänzer [Thu, 10 May 2012 11:54:27 +0000 (13:54 +0200)]
radeonsi: Eliminate one more magic number for texture image resources.

12 years agoradeonsi: Fix vertex buffer resource for stride 0.
Michel Dänzer [Thu, 10 May 2012 11:54:27 +0000 (13:54 +0200)]
radeonsi: Fix vertex buffer resource for stride 0.

12 years agoradeon/llvm: Remove AMDGPUConstants.pm
Tom Stellard [Wed, 9 May 2012 15:50:02 +0000 (11:50 -0400)]
radeon/llvm: Remove AMDGPUConstants.pm

12 years agoradeon/llvm: Don't rely on tablegen for lowering int_AMDGPU_load_const
Tom Stellard [Wed, 9 May 2012 15:44:27 +0000 (11:44 -0400)]
radeon/llvm: Don't rely on tablegen for lowering int_AMDGPU_load_const

12 years agoradeon/llvm: Make sure the LOAD_CONST def uses the isSI predicate
Tom Stellard [Wed, 9 May 2012 15:43:17 +0000 (11:43 -0400)]
radeon/llvm: Make sure the LOAD_CONST def uses the isSI predicate

12 years agosvga: implement CEIL opcode translation
Brian Paul [Wed, 9 May 2012 16:31:07 +0000 (10:31 -0600)]
svga: implement CEIL opcode translation

Reviewed-by: José Fonseca <jfonseca@vmware.com>
12 years agoglsl_to_tgsi: use TGSI_OPCODE_CEIL for ir_unop_ceil
Christoph Bumiller [Sat, 5 May 2012 12:38:09 +0000 (14:38 +0200)]
glsl_to_tgsi: use TGSI_OPCODE_CEIL for ir_unop_ceil

The implementation using FLR was buggy, the second negation could
get lost.

12 years agogallium/drivers: handle TGSI_OPCODE_CEIL
Christoph Bumiller [Sat, 5 May 2012 12:36:40 +0000 (14:36 +0200)]
gallium/drivers: handle TGSI_OPCODE_CEIL

12 years agor600g: Handle TGSI_OPCODE_CEIL (v2)
Kai Wasserbäch [Mon, 7 May 2012 15:59:35 +0000 (17:59 +0200)]
r600g: Handle TGSI_OPCODE_CEIL (v2)

v2: Enabled CEIL on Cayman too.

Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
12 years agogallivm: implement iabs/issg opcode.
Dave Airlie [Mon, 6 Feb 2012 18:33:21 +0000 (18:33 +0000)]
gallivm: implement iabs/issg opcode.

Reimplemented by Olivier Galibert <galibert@pobox.com>

Signed-off-by: Dave Airlie <airlied@redhat.com>
12 years agoi965: fix wrong cube/3D texture layout
Yuanhan Liu [Wed, 2 May 2012 09:29:11 +0000 (17:29 +0800)]
i965: fix wrong cube/3D texture layout

Fix wrong cube/3D texture layout for the tailing levels whose width or
height is smaller than the align unit.

From 965 B-spec http://intellinuxgraphics.org/VOL_1_graphics_core.pdf at
page 135:
   All of the LOD=0 q-planes are stacked vertically, then below that,
   the LOD=1 qplanes are stacked two-wide, then the LOD=2 qplanes are
   stacked four-wide below that, and so on.

Thus we should always inrease pack_x_nr, which results to the pitch of LODn
may greater than the pitch of LOD0. So we should refactor mt->total_width
when needed.

This would fix the following webgl test case on all gen4 platforms:
  conformance/textures/texture-size-cube-maps.html

NOTE: This is a candidate for stable release branches.

Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
12 years agoradeon/llvm: Remove AMDILUtilityFunctions.cpp
Tom Stellard [Tue, 8 May 2012 19:37:59 +0000 (15:37 -0400)]
radeon/llvm: Remove AMDILUtilityFunctions.cpp

12 years agoradeon/llvm: Remove some unused functions from AMDILInstrInfo
Tom Stellard [Tue, 8 May 2012 17:59:27 +0000 (13:59 -0400)]
radeon/llvm: Remove some unused functions from AMDILInstrInfo

12 years agoradeon/llvm: Add some comments and fix coding style
Tom Stellard [Mon, 7 May 2012 18:52:11 +0000 (14:52 -0400)]
radeon/llvm: Add some comments and fix coding style

12 years agoradeon/llvm: Remove the EXPORT_REG instruction
Tom Stellard [Tue, 8 May 2012 17:08:29 +0000 (13:08 -0400)]
radeon/llvm: Remove the EXPORT_REG instruction

12 years agoradeon/llvm: Use a custom inserter to lower RESERVE_REG
Tom Stellard [Tue, 8 May 2012 15:33:05 +0000 (11:33 -0400)]
radeon/llvm: Use a custom inserter to lower RESERVE_REG

12 years agoradeon/llvm: Use a custom inserter to lower STORE_OUTPUT
Tom Stellard [Tue, 8 May 2012 14:27:30 +0000 (10:27 -0400)]
radeon/llvm: Use a custom inserter to lower STORE_OUTPUT

12 years agoradeon/llvm: Remove AMDGPULowerShaderInstructions class
Tom Stellard [Tue, 8 May 2012 14:04:44 +0000 (10:04 -0400)]
radeon/llvm: Remove AMDGPULowerShaderInstructions class

It is no longer used.

12 years agoradeon/llvm: Use a custom inserter to lower LOAD_INPUT
Tom Stellard [Tue, 8 May 2012 14:01:58 +0000 (10:01 -0400)]
radeon/llvm: Use a custom inserter to lower LOAD_INPUT

12 years agoradeon/llvm: Remove the ReorderPreloadInstructions pass
Tom Stellard [Mon, 7 May 2012 19:20:26 +0000 (15:20 -0400)]
radeon/llvm: Remove the ReorderPreloadInstructions pass

12 years agoradeon/llvm: Remove old comment from AMDIL.h
Tom Stellard [Mon, 7 May 2012 18:51:27 +0000 (14:51 -0400)]
radeon/llvm: Remove old comment from AMDIL.h

12 years agoAdd bin/compile to .gitignore
Paul Berry [Tue, 8 May 2012 18:03:55 +0000 (11:03 -0700)]
Add bin/compile to .gitignore

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
12 years agoglsl: Change built-in constant expression evaluation to run the IR.
Olivier Galibert [Wed, 2 May 2012 21:11:42 +0000 (23:11 +0200)]
glsl: Change built-in constant expression evaluation to run the IR.

This removes code duplication with
ir_expression::constant_expression_value and builtins/ir/*.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
12 years agoglsl: Add an origin pointer in the function signature object.
Olivier Galibert [Wed, 2 May 2012 21:11:41 +0000 (23:11 +0200)]
glsl: Add an origin pointer in the function signature object.

This points to the object with the function body, allowing us to map
from a built-in prototype to the actual body with IR code to execute.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
12 years agoglsl: Add methods to copy parts of one ir_constant into another.
Olivier Galibert [Wed, 2 May 2012 21:11:40 +0000 (23:11 +0200)]
glsl: Add methods to copy parts of one ir_constant into another.

- copy_masked_offset copies part of a constant into another,
  assign-like.

- copy_offset copies a constant into (a subset of) another,
  funcall-return like.

These methods are to be used to trace through assignments and function
calls when computing a constant expression.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
12 years agoglsl: Add a constant_referenced method to ir_dereference*
Olivier Galibert [Wed, 2 May 2012 21:11:39 +0000 (23:11 +0200)]
glsl: Add a constant_referenced method to ir_dereference*

The method is used to get a reference to an ir_constant * within the
context of evaluating an assignment when calculating a
constant_expression_value.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
12 years agoglsl: Add a variable context to constant_expression_value().
Olivier Galibert [Wed, 2 May 2012 21:11:38 +0000 (23:11 +0200)]
glsl: Add a variable context to constant_expression_value().

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
12 years agoglsl: Extend ir_constant::zero to handle more types.
Olivier Galibert [Wed, 2 May 2012 21:11:37 +0000 (23:11 +0200)]
glsl: Extend ir_constant::zero to handle more types.

Signed-off-by: Olivier Galibert <galibert@pobox.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]
12 years agoglsl: Fix broken constant expression handling for <, <=, >, and >=.
Kenneth Graunke [Tue, 8 May 2012 19:04:45 +0000 (12:04 -0700)]
glsl: Fix broken constant expression handling for <, <=, >, and >=.

We were looping over all the vector components, but only dealing with
the first one.  This was masked by the fact that constant expression
handling on built-ins went through custom code for the lessThan()
/function/ rather than the ir_binop_less expression operator.

NOTE: This is a candidate for all release branches.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Olivier Galibert <galibert@pobox.com>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
12 years agovbo: add some comments
Brian Paul [Tue, 8 May 2012 17:40:28 +0000 (11:40 -0600)]
vbo: add some comments

12 years agomesa: remove needless casts in save_EdgeFlag()
Brian Paul [Tue, 8 May 2012 15:32:43 +0000 (09:32 -0600)]
mesa: remove needless casts in save_EdgeFlag()

12 years agomesa: minor clean-ups in dlist material code
Brian Paul [Tue, 8 May 2012 15:12:35 +0000 (09:12 -0600)]
mesa: minor clean-ups in dlist material code

12 years agomesa: fix error strings in dlist code
Brian Paul [Tue, 8 May 2012 15:11:04 +0000 (09:11 -0600)]
mesa: fix error strings in dlist code

12 years agomesa: add gl_context::NewDriverState and use it for vertex arrays
Marek Olšák [Mon, 16 Apr 2012 02:56:12 +0000 (04:56 +0200)]
mesa: add gl_context::NewDriverState and use it for vertex arrays

The vbo module recomputes its states if _NEW_ARRAY is set, so it shouldn't use
the same flag to notify the driver. Since we've run out of bits in NewState
and NewState is for core Mesa anyway, we need to find another way.

This patch is the first to start decoupling the state flags meant only
for core Mesa and those only for drivers.

The idea is to have two flag sets:
- gl_context::NewState - used by core Mesa only
- gl_context::NewDriverState - used by drivers only (the flags are defined
                               by the driver and opaque to core Mesa)

It makes perfect sense to use NewState|=_NEW_ARRAY to notify the vbo module
that the user changed vertex arrays, and the vbo module in turn sets
a driver-specific flag to notify the driver that it should update its vertex
array bindings.

The driver decides which bits of NewDriverState should be set and stores them
in gl_context::DriverFlags. Then, Core Mesa can do this:
ctx->NewDriverState |= ctx->DriverFlags.NewArray;

This patch implements this behavior and adapts st/mesa.
DriverFlags.NewArray is set to ST_NEW_VERTEX_ARRAYS.

Core Mesa only sets NewDriverState. It's the driver's responsibility to read
it whenever it wants and reset it to 0.

Reviewed-by: Brian Paul <brianp@vmware.com>
12 years agomesa: move gl_client_array*[] from vbo_draw_func into gl_context
Marek Olšák [Mon, 23 Apr 2012 16:20:56 +0000 (18:20 +0200)]
mesa: move gl_client_array*[] from vbo_draw_func into gl_context

In the future we'd like to treat vertex arrays as a state and
not as a parameter to the draw function. This is the first step
towards that goal. Part of the goal is to avoid array re-validation
for every draw call.

This commit adds:
const struct gl_client_array **gl_context::Array::_DrawArrays.

The pointer is changed in:
* vbo_draw_method
* vbo_rebase_prims - unused by gallium
* vbo_split_prims - unused by gallium
* st_RasterPos

Reviewed-by: Brian Paul <brianp@vmware.com>
12 years agovbo: move vbo_draw_method into vbo_context.h
Marek Olšák [Mon, 23 Apr 2012 16:11:38 +0000 (18:11 +0200)]
vbo: move vbo_draw_method into vbo_context.h

I'll need vbo_context in that function soon.

Reviewed-by: Brian Paul <brianp@vmware.com>
12 years agoradeon/llvm: add suport for cube textures
Vadim Girlin [Mon, 7 May 2012 09:25:08 +0000 (13:25 +0400)]
radeon/llvm: add suport for cube textures

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: add support for CUBE ALU instruction
Vadim Girlin [Mon, 7 May 2012 09:10:09 +0000 (13:10 +0400)]
radeon/llvm: add support for CUBE ALU instruction

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: add support for some ALU instructions
Vadim Girlin [Mon, 7 May 2012 09:06:22 +0000 (13:06 +0400)]
radeon/llvm: add support for some ALU instructions

Add support for IABS, NOT, AND, XOR, OR, UADD, UDIV, IDIV, MOD, UMOD, INEG,
I2F, U2F, F2U, F2I, USEQ, USGE, USLT, USNE, ISGE, ISLT, ROUND, MIN, MAX,
IMIN, IMAX, UMIN, UMAX

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: add missing cases for BREAK/CONTINUE
Vadim Girlin [Mon, 7 May 2012 09:02:46 +0000 (13:02 +0400)]
radeon/llvm: add missing cases for BREAK/CONTINUE

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: add support for AHSR/LSHR/LSHL instructions
Vadim Girlin [Mon, 7 May 2012 08:50:25 +0000 (12:50 +0400)]
radeon/llvm: add support for AHSR/LSHR/LSHL instructions

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: add support for TXQ/TXF/DDX/DDY instructions
Vadim Girlin [Mon, 7 May 2012 08:47:47 +0000 (12:47 +0400)]
radeon/llvm: add support for TXQ/TXF/DDX/DDY instructions

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: add support for VertexID, InstanceID
Vadim Girlin [Mon, 7 May 2012 16:26:32 +0000 (20:26 +0400)]
radeon/llvm: add support for VertexID, InstanceID

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: fix live-in handling for inputs
Vadim Girlin [Mon, 7 May 2012 13:38:01 +0000 (17:38 +0400)]
radeon/llvm: fix live-in handling for inputs

Set the input registers as live-in for entry basic block.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: add support for v4i32
Vadim Girlin [Mon, 7 May 2012 16:24:13 +0000 (20:24 +0400)]
radeon/llvm: add support for v4i32

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: fix ABS_i32 instruction lowering
Vadim Girlin [Mon, 7 May 2012 09:17:00 +0000 (13:17 +0400)]
radeon/llvm: fix ABS_i32 instruction lowering

Swap source operands.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: use integer comparison for IF
Vadim Girlin [Mon, 7 May 2012 09:14:58 +0000 (13:14 +0400)]
radeon/llvm: use integer comparison for IF

Replacing "float equal to 1.0f" with "int not equal to 0".
This should help for further optimization of boolean computations.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agoradeon/llvm: use bitcasts for integers
Vadim Girlin [Mon, 7 May 2012 16:22:29 +0000 (20:22 +0400)]
radeon/llvm: use bitcasts for integers

We're using float as default type, so basically for every instruction that
wants other types for dst/src operands we need to perform the bitcast
to/from default float. Currently bitcast produces no-op MOV instruction,
will be eliminated later.

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
12 years agor600g: Fix out of tree builds that use the LLVM backend
Tom Stellard [Mon, 7 May 2012 19:04:08 +0000 (15:04 -0400)]
r600g: Fix out of tree builds that use the LLVM backend

https://bugs.freedesktop.org/show_bug.cgi?id=49567

12 years agoradeon/llvm: Remove references to DebugFlag and isCurrentDebugType()
Tom Stellard [Mon, 7 May 2012 17:53:40 +0000 (13:53 -0400)]
radeon/llvm: Remove references to DebugFlag and isCurrentDebugType()

These weren't being used at all and they were causing build failures
when LLVM was built with NDEBUG defined and mesa was not.

https://bugs.freedesktop.org/show_bug.cgi?id=49110

12 years agoi965/Gen7: Work around GPU hangs due to misaligned depth coordinate offsets.
Paul Berry [Thu, 26 Apr 2012 13:35:56 +0000 (06:35 -0700)]
i965/Gen7: Work around GPU hangs due to misaligned depth coordinate offsets.

In i965 Gen7, Mesa has for a long time used the "depth coordinate
offset X/Y" settings (in 3DSTATE_DEPTH_BUFFER) to cause the GPU to
render to miplevels other than 0.  Unfortunately, this doesn't work,
because these offsets must be aligned to multiples of 8, and miplevels
in the depth buffer are only guaranteed to be aligned to multiples of
4.  When the offsets aren't aligned to a multiple of 8, the GPU
sometimes hangs.

As a temporary measure, to avoid GPU hangs, this patch smashes the 3
LSB's of "depth coordinate offset X/Y" to 0.  This results in
incorrect rendering to mipmapped depth textures, but that seems like a
reasonable stopgap while we figure out a better solution.

Avoids GPU hangs in piglit test "depthstencil-render-miplevels" at
texture sizes that are not powers of 2.

Reviewed-by: Chad Verace <chad.versace@linux.intel.com>
12 years agoi965/Gen6: Work around GPU hangs due to misaligned depth coordinate offsets.
Paul Berry [Thu, 26 Apr 2012 13:35:56 +0000 (06:35 -0700)]
i965/Gen6: Work around GPU hangs due to misaligned depth coordinate offsets.

In i965 Gen6, Mesa has for a long time used the "depth coordinate
offset X/Y" settings (in 3DSTATE_DEPTH_BUFFER) to cause the GPU to
render to miplevels other than 0.  Unfortunately, this doesn't work,
because these offsets must be aligned to multiples of 8, and miplevels
in the depth buffer are only guaranteed to be aligned to multiples of
4.  When the offsets aren't aligned to a multiple of 8, the GPU
sometimes hangs.

As a temporary measure, to avoid GPU hangs, this patch smashes the 3
LSB's of "depth coordinate offset X/Y" to 0.  This results in
incorrect rendering to mipmapped depth textures, but that seems like a
reasonable stopgap while we figure out a better solution.

(Note that we have only ever observed this GPU hang on Gen6 when HiZ
is enabled, so another possible stopgap would be to disable HiZ).

Avoids GPU hangs in piglit test "depthstencil-render-miplevels" at
texture sizes that are not powers of 2.

Reviewed-by: Chad Verace <chad.versace@linux.intel.com>
12 years agofbo: Only reuse depth/stencil attachments if the parameters match.
Paul Berry [Sat, 14 Apr 2012 04:50:08 +0000 (21:50 -0700)]
fbo: Only reuse depth/stencil attachments if the parameters match.

When the user attaches a texture to one of the depth/stencil
attachment points (GL_STENCIL_ATTACHMENT or GL_DEPTH_ATTACHMENT), we
check to see if the same texture is also attached to the other
attachment point, and if so, we re-use the existing texture
attachment.  This is necessary to ensure that if the user later
queries what is attached to GL_DEPTH_STENCIL_ATTACHMENT, they will not
receive an error.

If, however, the user attaches buffers to the two different attachment
points using different parameters (e.g. a different miplevel), then we
can't re-use the existing texture attachment, because it is pointing
to the wrong part of the texture.  This might occur as a transitory
condition if, for example, if the user attached miplevel zero of a
texture to GL_STENCIL_ATTACHMENT and GL_DEPTH_ATTACHMENT, rendered to
it, and then later attempted to attach miplevel one of the same
texture to GL_STENCIL_ATTACHMENT and GL_DEPTH_ATTACHMENT.

This patch causes Mesa to check that GL_STENCIL_ATTACHMENT and
GL_DEPTH_ATTACHMENT use the same attachment parameters before
attempting to share the texture attachment.

On i965 Gen6, fixes piglit tests
"texturing/depthstencil-render-miplevels 1024 depth_stencil_shared"
and "texturing/depthstencil-render-miplevels 1024
stencil_depth_shared".

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
12 years agoi965: Fix mipmap offsets for HiZ and separate stencil buffers.
Paul Berry [Sun, 15 Apr 2012 17:35:01 +0000 (10:35 -0700)]
i965: Fix mipmap offsets for HiZ and separate stencil buffers.

When rendering to a miplevel other than 0 within a color, depth,
stencil, or HiZ buffer, we need to tell the GPU to render to an offset
within the buffer, so that the data is written into the correct
miplevel.  We do this using a coarse offset (in pages), and a fine
adjustment (the so-called "tile_x" and "tile_y" values, which are
measured in pixels).

We have always computed the coarse offset and fine adjustment using
intel_renderbuffer_tile_offsets() function.  This worked fine for
color and combined depth/stencil buffers, but failed to work properly
when HiZ and separate stencil were in use.  It failed to work because
there is only one set of fine adjustment controls shared by the HiZ,
depth, and stencil buffers, so we need to choose tile_x and tile_y
values that are compatible with the tiling of all three buffers, and
then compute separate coarse offsets for each buffer.

This patch fixes the HiZ and separate stencil case by replacing the
call to intel_renderbuffer_tile_offsets() with calls to two functions:
intel_region_get_tile_masks(), which determines how much of the
adjustment can be performed using offsets and how much can be
performed using tile_x and tile_y, and
intel_region_get_aligned_offset(), which computes the coarse offset.

intel_region_get_tile_offsets() is still used for color renderbuffers,
so to avoid code duplication, I've re-worked it to use
intel_region_get_tile_masks() and intel_region_get_aligned_offset().

On i965 Gen6, fixes piglit tests
"texturing/depthstencil-render-miplevels 1024 X" where X is one of
(depth, depth_and_stencil, depth_stencil_single_binding, depth_x,
depth_x_and_stencil, stencil, stencil_and_depth, stencil_and_depth_x).

On i965 Gen7, the variants of
"texturing/depthstencil-render-miplevels" that contain a stencil
buffer still fail, due to another problem: Gen7 seems to ignore the 3
LSB's of the tile_y adjustment (and possibly also tile_x).

v2: Removed spurious comments.  Added assertions to check
preconditions of intel_region_get_aligned_offset().

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
12 years agointel: Disable ARB_framebuffer_object in ES contexts
Chad Versace [Thu, 3 May 2012 23:02:50 +0000 (16:02 -0700)]
intel: Disable ARB_framebuffer_object in ES contexts

This patch removes ARB_framebuffer_object from the GLES1 and GLES2
extension lists in intel_extensions_es.c.

Fixes a crash in the Android browser on Ice Cream Sandwich.

The Android browser crashed because it did the following, which is legal
in GLES2 but not in ARB_framebuffer_object.
    glGenFramebuffers(1, &fb);
    glBindFramebuffer(GL_FRAMEBUFFER, fb);
    // render render render...
    glDeleteFramebuffers(1, &fb);
    // go do other stuff...
    glBindFramebuffer(GL_FRAMEBUFFER, fb);
    // This bind unexpectedly failed, and the app panics.

The semantics of glBindFramebuffer specified by ARB_framebuffer_object (a
desktop GL extension) and GLES2 specs are incompatible. The ideal solution
to fix this is to create separate API entry points for glBindFramebuffer,
one for GL and the other for GLES2. But, until that work is complete,
disabling ARB_framebuffer_object in GLES2 contexts safely fixes the problem.

Likewise, the semantics of glBindFramebuffer in ARB_framebuffer_object and
of glBindFramebufferOES in OES_framebuffer_object (a GLES1 extension) are
incompatible. Even though the functions have different names, the semantic
difference still results in a bug because both API calls are implemented
by a single function, _mesa_BindFramebufferEXT, which handles the semantic
difference incorrectly. Again, disabling ARB_framebuffer_object in GLES1
contexts safely fixes this problem.

According to the ARB_framebuffer_object spec, the extension is an
amalgamation of
    EXT_framebuffer_object
    EXT_framebuffer_blit
    EXT_packed_depth_stencil
    EXT_framebuffer_multisample
By disabling this extension, however, no functionality is removed from
GLES1 and GLES2 contexts because 1) the first three extensions are
explicitly enabled in Intel's ES extension lists and 2) no functionality
of the last extension is exposed in an ES context.

Note: This is a candidate for the 8.0 branch.
See-also: http://www.mail-archive.com/mesa-dev@lists.freedesktop.org/msg21006.html
CC: Charles Johnson <charles.f.johnson@intel.com>
CC: Sean Kelley <sean.v.kelley@intel.com>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
12 years agomesa: bump version to 8.1.0 in configs/default
Brian Paul [Mon, 7 May 2012 13:30:04 +0000 (07:30 -0600)]
mesa: bump version to 8.1.0 in configs/default

12 years agonv50: handle VP without inputs
Marcin Slusarz [Mon, 7 May 2012 12:05:35 +0000 (14:05 +0200)]
nv50: handle VP without inputs

12 years agonvc0/ir: allow abs,neg source modifiers with ceil,floor,trunc
Christoph Bumiller [Sat, 5 May 2012 15:57:50 +0000 (17:57 +0200)]
nvc0/ir: allow abs,neg source modifiers with ceil,floor,trunc

12 years agonv50/ir/opt: don't lose saturation in tryCollapseChainedMULs
Christoph Bumiller [Sat, 5 May 2012 14:35:49 +0000 (16:35 +0200)]
nv50/ir/opt: don't lose saturation in tryCollapseChainedMULs

12 years agonvc0/ir: fix lowering of textureGrad
Christoph Bumiller [Sat, 5 May 2012 11:30:03 +0000 (13:30 +0200)]
nvc0/ir: fix lowering of textureGrad

12 years agonouveau: fix nouveau_scratch_runout_release bo count underflow
Christoph Bumiller [Sat, 5 May 2012 11:28:19 +0000 (13:28 +0200)]
nouveau: fix nouveau_scratch_runout_release bo count underflow

12 years agomesa: Add primitive restart support to glArrayElement
Jordan Justen [Tue, 1 May 2012 07:01:08 +0000 (00:01 -0700)]
mesa: Add primitive restart support to glArrayElement

When primitive restart is enabled, and glArrayElement is called
with the restart index value, then call glPrimitiveRestartNV.

NOTE: This is a candidate for the 8.0 branch.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul<brianp@vmware.com>