iris: trivial whitespace fixes

u_format: float type for R11G11B10_FLOAT/R9G9B9E5_FLOAT

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

u_format: add ETC2 to util_format_srgb/util_format_linear

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

meson: Add coroutines component to llvmpipe build.

Fixes: d32690b43c91 ("gallivm: add coroutine pass manager support")
Suggested-by: Gert Wollny <gert.wollny@collabora.com>
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>

dri: Use DRM_FORMAT_* instead of defining our own copy.

We have only two defines that aren't from DRM_FORMAT_*: SARGB and
SABGR.  Keep only those as __DRI_IMAGE_FOURCC and garbage collect the
rest.

While this header is also used from the X server, the X server doesn't
use any __DRI_IMAGE enums.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

uapi: Update drm_fourcc.h

Taken from drm-misc-next 268de6530aa1 ("drm: mst: Fix query_payload
ack reply struct")

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

st/mesa: Only pause queries if there are any active queries to pause.

Previously, ReadPixels, PBO upload/download, and clears would call
cso_save_state with CSO_PAUSE_QUERIES, causing cso_context to call
pipe->set_active_query_state() twice for each operation.  This can
potentially cause driver work to enable/disable statistics counters.

But often, there are no queries happening which need to be paused.
By keeping a simple tally of active queries, we can skip this work.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

Fix missing dri2_load_driver on platform_drm

Signed-off-by: Jean Hertel <jean.hertel@hotmail.com>
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>

intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM

Initial benchmarking didn't show any performance benefits. But it might eventually.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

genxml/gen11+: Add COMMON_SLICE_CHICKEN4 register

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

egl/dri2: Refuse to add EGLConfigs with no supported surface types

For example, the surfaceless platform only supports pbuffers. If the
driver supports MSAA, we would still create a config, but it would have
no supported surface types. That's meaningless, so don't do it.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

gallium: Require LLVM >= 3.9

To go any further than this would be to break the current version of
Android.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

gallium: Require LLVM >= 3.8

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

gallium: Require LLVM >= 3.7

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

gallium: Require LLVM >= 3.6

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

gallium: Require LLVM >= 3.5

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
[ Michel Dänzer: Dropped jessie line from debian-install.sh again ]

gitlab-ci: Keep g++ from stretch when installing foreign toolchains

Upgrading to a newer g++ causes older LLVM/clang packages to be
removed.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>

gitlab-ci: Explicitly install linux-libc-dev for foreign architectures

Something seems to have changed in Debian buster causing installation
of the other foreign packages to fail without this.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>

gallium: Require LLVM >= 3.4

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

Docs: mark that 19.2.0-rc3 has been released

Also update -rc4 to me.

st/nir: fix illegal designated initializer in st_glsl_to_nir.cpp

IIRC, designated initializers are not legal C++.
Fixes the MSVC build.

Fixes: 83fd1e58 ("glsl/nir: Add and use a gl_nir_link() function")
Reviewed-by: Neha Bhende <bhenden@vmware.com>

meson: don't generate file into subdirs

This is unsupported by meson and may become a hard error in the future.

Fixes: 5adfc8602c639827af0ba9a1059bd165a3ae49e7
       ("lima/ppir: move sin/cos input scaling into NIR")
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>

iris: Set bo->reusable = false in iris_bo_make_external_locked

This fixes a missing bo->reusable = false in iris_bo_export_gem_handle.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

iris: Finish initializing the BO before stuffing it in the hash table

Other threads may pick it up once it's in the hash table.  Not known
to fix anything currently.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

radeonsi/gfx9: honor user stride for imported buffers

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

prog_to_nir, tgsi_to_nir: make sure kill doesn't discard NaNs

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

ac: replace HAVE_LLVM with LLVM_VERSION_MAJOR for atomic-optimizations

trivial

lima: set .out_sync field of req in lima_submit_start()

Looks like .out_sync wasn't set in lima_submit_start(), as result
submit completion fence was never signalled.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

intel: Add few Ice Lake brand strings

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

gallium: Fix util_format_get_depth_only

This is a pipe format, not a boolean.

Fixes: 5849e0612cc ("gallium/auxiliary: Add util_format_get_depth_only() helper.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

freedreno/a6xx: fix 3d tex layout

Fixes dEQP-GLES3.functional.texture.specification.texstorage3d.size.3d_2x2x2_2_levels

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

freedreno/a6xx: don't tile things that are too small

If the lowest (largest) mipmap level is too small to tile, then don't
bother pretending.

Note that this requires initializing pipe->screen before
fd_resource_level_linear() is called.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>

iris: Enable ARB_gl_spirv and ARB_spirv_extensions

This will also "unlock" OpenGL 4.6 for Iris!

v2: Also enable PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]

glsl/nir: Add and use a gl_nir_link() function

Perform all the NIR linking steps in order.  Change iris and i965 to
use it.  Suggested by Alejandro.

v2: Add gl_nir_linker_options struct.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]

gallium: Add ARB_gl_spirv support

The PIPE_CAP_GL_SPIRV capability enables ARB_gl_spirv and
ARB_spirv_extensions, and will make sure the corresponding SPIR-V
capabilities and extensions lists are initialized.

The additional PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS capability enables
the support for Variable Pointers in SPIR-V shaders.  This depends on
the driver and is not mandatory for ARB_gl_spirv support.

v2: Add a PIPE_CAP for Variable Pointers.  (Marek)

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]

mesa/spirv: Set a few more extensions

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa/st: Don't expect prog->nir to already exist

There's no such case, if we load prog->nir from the shader cache, we
shouldn't hit this path.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa/st: Add support for SPIR-V shaders

The SPIR-V codepath uses NIR linking, so we have to preprocess after
the linking steps, which makes things slightly different than GLSL.
To make more clear when the preprocess is happening, I've ended up
inlining st_nir_get_mesa_program() into its caller.

The goal was to make both GLSL and SPIR-V to use the same preprocess
function, the exceptions are:

- SPIR-V codepath don't support NIR state slots yet;
- GLSL lowers shared memory early, so we don't do the deref lowering
  for those.

For now I didn't bother to rename other functions and files (now that
many of them apply to both GLSL and SPIR-V), but we should do this in
further patches.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa/st: Extract preprocessing NIR steps

Refactor to split the glsl_to_nir conversion from the preprocessing
NIR passes into separate functions, so we can use them in SPIR-V.
Unlike in GLSL, there we'll need to perform a few passes with the NIR
linker before doing the individual preprocess calls.

No behavior should change with this patch.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa/st: Lookup parameters without using names

Use the new MainUniformStorageIndex field in Parameter instead.  It
was added so we could match those in the SPIR-V case, where names are
optional.

v2: Use MainUniformStorageIndex for all cases.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa/program: Associate uniform storage without using names

Use the new UniformStorageIndex field in Parameter instead.  This
mechanism was added so we could match those in the SPIR-V case, where
names are optional.

v2: Use UniformStorageIndex for all cases.  (Timothy)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: Fill Parameter storage indices even when not using SPIR-V

When creating Parameters, fill in the associated uniform storage
indices, like it is done with the NIR linker used for SPIR-V.  This
will allow later code to not rely on names (which would never work for
SPIR-V where names are optional).

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

glsl/nir: Fill in the Parameters in NIR linker

The parameter lists were not being created nor filled since i965
doesn't use them.  In Gallium they are used for uniform handling, so
add a way to fill them.

The gl_uniform_storage struct got two new fields that let us go

- from a Parameter to the matching UniformStorage and,
- from the variable to the *first* UniformStorage

without relying on names -- since they are optional for ARB_gl_spirv.
Later patches will make use of them.

v2: Do not fill parameters for i965.  (Timothy)
    Use uint32_t for the new attributes.  (Marek)

v3: Serialize the new fields.  (Timothy)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

mesa: Pack gl_program_parameter struct

The gl_register_file doesn't need 16 bits, so shorten it and use the
extra room for 'Padded' (also mark it as a single bit).  This shrinks
the struct size from 32 bytes to 24 bytes.

See also 4794fbc86e3 ("mesa: reduce the size of gl_program_parameter")
that shrinked from 40 to 24 and later 7536af670b7 ("glsl: fix shader
cache for packed param list") that added `Padded`.

v2: Use just 5 bits for gl_register_file.  (Timothy)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>

compiler: Add glsl_contains_opaque() helper

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

mesa/st: Do not rely on name to identify special uniforms

Every uniform that have the "gl_" name also have some state slots.  So
use the state_slots like we did in 57b61849310 ("i965: account for NIR
uniforms without name").

This removes the dependency on names, which are optional when using
ARB_gl_spirv.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl/nir: Avoid overflow when setting max_uniform_location

Don't use the UNMAPPED_UNIFORM_LOC (-1) to set the unsigned
max_uniform_location.  Those unmapped uniforms don't have to be
accounted at this point.

Fixes: 7a9e5cdfbb9 ("nir/linker: Add gl_nir_link_uniforms()")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

meson: don't allow glvnd on windows

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: don't build glx or dri by default on windows

v5: - Move is windows check down to make code more robust

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: Add a platform for windows

This mirrors the haiku build which uses a platform.

v2: - Fix some rebase problems

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: build getopt when using msvc

v4: - Don't wrap a single file in a list to match mesa style
    - Use null_dep instead of empty list

Reviewed-by: Eric Anholt <eric@anholt.net> (v3)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: fix dl detection on non cygwin windows

v4: - Don't run checks on Windows that will always fail

Reviewed-by: Eric Anholt <eric@anholt.net> (v3)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

glapi: export glapi_destroy_multithread when building shared-glapi on windows

Which will allow meson to build a shared glapi build with mingw.

v2: - Add symbol to symbol check test

Reviewed-by: Eric Anholt <eric@anholt.net> (v1)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: add a expat subproject

For Windows

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: add a zlib subproject

To help windows build

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

add a git ignore for subprojects

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: don't build glapi_static_check_table on windows

It doesn't compile due to undefined symbols, which are in
libglapi_static, so I don't understand the problem.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: Make shared-glapi a combo

So it can auto off for windows, but on elsewhere.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

meson: don't try to generate i18n translations on windows

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

glsl/tests: Handle windows \r\n new lines

Currently the praser for s expressions assumes that newlines will be \n,
resulting in incorrect parsing on windows, where the newline is \r\n.
This patch just adds \r? to the regular expression used to parse the s
expressions, which fixes at 1 test on windows.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

iris: Fix constant buffer sizes for non-UBOs

Since the system value refactor, we've accidentally only been setting
cbuf->buffer_size in the UBO case, and not in the uploaded-constants
case.  We use cbuf->buffer_size to fill out the SURFACE_STATE entry,
so it needs to be initialized in both cases.

Fixes: 3b6d787e404 ("iris: move sysvals to their own constant buffer")

intel: update product names for WHL

Documentation list all of those as "UHD".

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111629
BSpec: 33266
Acked-by: Tapani Pälli <tapani.palli@intel.com>

radv/gfx10: declare a LDS symbol for the NGG emit space

This fixes some interactions when NGG GS is enabled. It fixes:

- dEQP-VK.clipping.user_defined.clip_cull_distance_dynamic_index.*geom*
- dEQP-VK.tessellation.geometry_interaction.passthrough.*

For some reasons, using the computed ESGS ring size randomly hangs
with CTS. For now, just use the maximum LDS size for ESGS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: calculate GFX9 GS and GFX10 NGG states before compiling shader variants

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: store the ESGS ring size as part of gfx10_ngg_info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: store GFX10 NGG state as part of the shader info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: store GFX9 GS state as part of the shader info

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: fill shader info for all stages in the pipeline

This shouldn't be in NIR->LLVM because ACO also needs the shader
info. This will also help for computing some NGG values that are
necessary for declaring LDS symbols.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: do not pass all compiler options to the shader info pass

Only the pipeline layout and the shader keys are needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi: remove redundant si_texture offset and size fields

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: move texture storage allocation outside of radeonsi

possible code sharing with radv

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: move HTILE allocation outside of radeonsi

ac_surface computes it for amdgpu.
radeon_drm_surface computes it for radeon.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: handle NO_DCC early

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac/surface: add RADEON_SURF_NO_FMASK

This controls FMASK and CMASK computation for MSAA.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

r300,r600,radeonsi: set winsys_handle::stride,offset in drivers, not winsyses

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

r300,r600,radeonsi: read winsys_handle::stride,offset in drivers, not winsyses

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/gfx10: fix wave occupancy computations

Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: only support at most 1024 threads per block

LLVM 10 won't support 2048.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: disable DCC when importing a texture from an incompatible driver

and unify the code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/gfx10: don't call gfx10_destroy_query with compute-only contexts

This fixes a crash.

Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/gfx10: use fma for TGSI_OPCODE_FMA

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac: use fma on gfx10

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac: enable LLVM atomic optimizations

virgl: Fix pipe_resource leaks under multi-sample.

Fixes: 900a80f9e4f ("virgl: virgl_transfer should own its virgl_resource")
Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

iris: Avoid flushing for cache history on transfer range flushes

The VBO module maps a buffer with GL_MAP_FLUSH_EXPLICIT, and keeps
appending data, and calling glFlushMappedBufferRange().  We were
invalidating the VF cache each time it flushed a new range, which
results in a ton of VF flushes.

If the contents of the destination in the target range are undefined
(never even possibly written), this patch makes us assume that it's
likely not in the cache and so cache invalidations are required.  If
the destination range is defined, we continue cache flushing as we may
need to expunge stale data.

This eliminates 88% of the VF cache invalidates on Manhattan 3.0.
Improves performance in Manhattan 3.0 on my Icelake 8x8 with the GPU
frequency locked to 700Mhz by 0.376724% +/- 0.0989183% (n=10).

iris: Optimize out redundant sampler state binds

This cuts roughly 85% of the 3DSTATE_SAMPLER_STATE_POINTERS_PS calls in
the J2DBench images test.  For some reason, the state tracker is calling
bind_sampler_state with the same sampler state in a bunch of cases.

iris: Add support for the always_flush_cache=true debug option.

This can be useful for debugging missing flushes.

mesa: Eliminate gl_config::rgbMode

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: Eliminate gl_config::have{Accum,Depth,Stencil}Buffer

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: Remove unused gl_config::indexBits

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/xlib: Fix an obvious thinko

x == !GLX_DIRECT_COLOR is a fancy way of writing x == 0, which is
clearly not what was meant.

iris: Ignore line stipple information if it's disabled

The line stipple pattern and factor only matter if line stippling is
actually enabled.  Otherwise, we can safely ignore it.

PBO upload may give us zero for line stipple information, while normal
drawing tends to give us an actual stipple pattern such as 0xffff.  This
was causing us to flag IRIS_DIRTY_LINE_STIPPLE way too often, leading to
useless 3DSTATE_LINE_STIPPLE commands, which are non-pipelined and thus
very expensive.

Improves performance in Manhattan 3.0 on Skylake GT4e by
0.149261% +/- 0.0380796% (n=210).  On an Icelake 8x8 with the GPU
frequency locked at 700Mhz, improves by 0.423756% +/- 0.222843% (n=3).

lima/ppir: drop fge/flt/feq/fne options

These are supposed to be lowered into sge/slt/seq/sne equivalents.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

lima: run opt_algebraic between int_to_float and boot_to_float for vs

int_to_float emits ftrunc and ftrunc lowering generates bool ops.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

lima/gpir: fix warning in gpir disassembler

Fixes following warning:

../src/gallium/drivers/lima/ir/gp/disasm.c: In function ‘print_src’:
../src/gallium/drivers/lima/ir/gp/disasm.c:241:20: warning: array subscript 28 is above array bounds of ‘char[5]’ [-Warray-bounds]
  241 |              "xyzw"[src - gpir_codegen_src_attrib_x]);

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

lima/gpir: lower fceil

GP doesn't support fceil so we need to lower it.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>

lima/gpir: Disallow moves for schedule_first nodes

The entire point of schedule_first is that the node has to be scheduled
as soon as possible without any moves because it doesn't produce a
proper floating-point value, or its value changes depending on where you
read it. We were still introducing a move for preexp2 in some cases
though, even if it got scheduled as soon as possible, which broke some
exp() tests. Fix that.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com>

lima/gpir: Fix fake dep handling for schedule_first nodes

The whole point of schedule_first nodes is that they need to be
scheduled as soon as possible, so if a schedule_first node is the
successor in a fake dependency that prevents it from being scheduled
after its parent, that can cause problems. We need to add these fake
dependencies to the parent as well, and we need to guarantee that the
pre-RA scheduler puts schedule_first nodes right before their parents in
order to prevent this from adding cycles to the dependency graph.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com>

lima/gpir: Fix schedule_first insertion logic

The idea was to make sure schedule_first nodes were always first in the
ready list. I made sure they were inserted first, but not that other
nodes wouldn't later be scheduled ahead of them. Fixes
spec@glsl-1.10@execution@built-in-functions@vs-exp-float and probably
others.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com>

lima/gpir: Ignore unscheduled successors in can_use_complex()

The point of the function is to avoid creating a complex move which is
used by certain slots in the next instruction, but unscheduled
successors will never be in the next instruction. Found while debugging
a crash that the previous commit fixed.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com>