Michael Nolan [Wed, 5 Feb 2020 15:52:47 +0000 (10:52 -0500)]
move gt_combiner out of experiments/
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 20:43:46 +0000 (20:43 +0000)]
add extra tests, find out whats going on with eq_gt_ge
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 17:38:08 +0000 (17:38 +0000)]
quick test shows eq_gt_ge.py returning output in reverse order
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 17:06:06 +0000 (17:06 +0000)]
debug string for part-eq is an eq not +
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 17:00:55 +0000 (17:00 +0000)]
use PartitionedEqGtGe for eq function in partitioned signal
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 16:58:52 +0000 (16:58 +0000)]
add constants for opcode, EQ/GT/GE, probably better way to do this
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 16:54:16 +0000 (16:54 +0000)]
whitespace
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 16:53:48 +0000 (16:53 +0000)]
80 char limit
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 16:51:58 +0000 (16:51 +0000)]
whitespace
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 16:49:26 +0000 (16:49 +0000)]
more whitespace
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 16:48:28 +0000 (16:48 +0000)]
whitespace
Michael Nolan [Wed, 5 Feb 2020 15:37:14 +0000 (10:37 -0500)]
Add module to handle partitioned eq, gt, and ge comparisons
Michael Nolan [Wed, 5 Feb 2020 15:06:40 +0000 (10:06 -0500)]
Reverse order of gt combiner so it works MSB first
Michael Nolan [Wed, 5 Feb 2020 14:40:56 +0000 (09:40 -0500)]
Add a signal to disable the gt inputs to gt_combiner
Michael Nolan [Wed, 5 Feb 2020 14:27:12 +0000 (09:27 -0500)]
Add proof for equals module
Luke Kenneth Casson Leighton [Wed, 5 Feb 2020 13:34:05 +0000 (13:34 +0000)]
use EQCombiner in PartitionedEq experiment
Luke Kenneth Casson Leighton [Tue, 4 Feb 2020 18:50:49 +0000 (18:50 +0000)]
start partitioned mux class
Luke Kenneth Casson Leighton [Tue, 4 Feb 2020 18:12:04 +0000 (18:12 +0000)]
add experiments __init__.py
Luke Kenneth Casson Leighton [Tue, 4 Feb 2020 18:11:25 +0000 (18:11 +0000)]
remove comments, sort out string name, add __init__.pys
Luke Kenneth Casson Leighton [Tue, 4 Feb 2020 15:12:02 +0000 (15:12 +0000)]
bit of whitespace
Luke Kenneth Casson Leighton [Tue, 4 Feb 2020 15:09:11 +0000 (15:09 +0000)]
using format is a bit long for 1 argument, just use %d
Michael Nolan [Tue, 4 Feb 2020 03:28:50 +0000 (22:28 -0500)]
Modify gt experiment to handle eq as well
Michael Nolan [Mon, 3 Feb 2020 20:16:05 +0000 (15:16 -0500)]
Add proof for using the greater than combiner to do equals as well
It works for the active outputs, however some of the active outputs
get set to 1 instead of 0
Michael Nolan [Mon, 3 Feb 2020 20:00:53 +0000 (15:00 -0500)]
Add tree-based greater than experiment
Michael Nolan [Mon, 3 Feb 2020 19:41:36 +0000 (14:41 -0500)]
Move experiments with partition methods to a separate folder
Michael Nolan [Mon, 3 Feb 2020 19:34:29 +0000 (14:34 -0500)]
Add tree based partitioned equals module
Michael Nolan [Mon, 3 Feb 2020 17:13:20 +0000 (12:13 -0500)]
Rename partition_combiner to eq_combiner
Michael Nolan [Mon, 3 Feb 2020 15:41:00 +0000 (10:41 -0500)]
Add an alternative partitioned equals combiner module
Luke Kenneth Casson Leighton [Mon, 3 Feb 2020 11:51:51 +0000 (11:51 +0000)]
add first untested ge.py for partitioned signnal
Michael Nolan [Sun, 2 Feb 2020 19:41:56 +0000 (14:41 -0500)]
Handle -0 and +0 equals and <
Michael Nolan [Sun, 2 Feb 2020 18:37:10 +0000 (13:37 -0500)]
Add test case for NaN and -0 handling to fpmax
Michael Nolan [Sun, 2 Feb 2020 17:47:50 +0000 (12:47 -0500)]
Replace If and Switch statements with muxes in fpcmp.py
Michael Nolan [Sun, 2 Feb 2020 17:31:17 +0000 (12:31 -0500)]
Add formal proof for FLT and FLE for FPCMP
Michael Nolan [Sun, 2 Feb 2020 16:59:20 +0000 (11:59 -0500)]
Add FLT and FLE functionality to FPCMP
Michael Nolan [Sun, 2 Feb 2020 16:42:17 +0000 (11:42 -0500)]
Handle NaNs for FPCMP
Michael Nolan [Sun, 2 Feb 2020 16:29:48 +0000 (11:29 -0500)]
Add feq functionality to fpcmp
Michael Nolan [Sun, 2 Feb 2020 16:29:20 +0000 (11:29 -0500)]
Begin adding formal proof for fpcmp
Michael Nolan [Sun, 2 Feb 2020 16:21:01 +0000 (11:21 -0500)]
Begin adding FPCMP module (FEQ, FLT, FLE)
Michael Nolan [Fri, 31 Jan 2020 21:54:25 +0000 (16:54 -0500)]
Fix nmigen "domain" error when trying to run unit tests
When I try to run any unit test with nmigen
c42c3a0, I get the
following error:
Traceback (most recent call last):
File "/usr/lib/python3.8/runpy.py", line 193, in _run_module_as_main
return _run_code(code, main_globals, None,
File "/usr/lib/python3.8/runpy.py", line 86, in _run_code
exec(code, run_globals)
File "/home/mnolan/git/ieee754fpu/src/ieee754/fpmul/test/test_fpmul_pipe.py", line 24, in <module>
test_pipe_fp16()
File "/home/mnolan/git/ieee754fpu/src/ieee754/fpmul/test/test_fpmul_pipe.py", line 12, in test_pipe_fp16
runfp(dut, 16, "test_fpmul_pipe_fp16", Float16, mul, n_vals=50)
File "/home/mnolan/git/ieee754fpu/src/ieee754/fpcommon/test/fpmux.py", line 316, in runfp
run_simulation(dut, fns, vcd_name="%s.vcd" % name)
File "/home/mnolan/git/nmigen/nmigen/compat/sim/__init__.py", line 22, in run_simulation
fragment.domains += ClockDomain("sync")
AttributeError: 'FPMULMuxInOut' object has no attribute 'domains'
This seems to fix this error by giving the functions in the testbench
a default clock domain, rather than leaving it up to nmigen to figure
out.
Luke Kenneth Casson Leighton [Thu, 30 Jan 2020 18:52:57 +0000 (18:52 +0000)]
tidyup
Luke Kenneth Casson Leighton [Thu, 30 Jan 2020 18:40:13 +0000 (18:40 +0000)]
tidy up comments
Luke Kenneth Casson Leighton [Thu, 30 Jan 2020 18:24:27 +0000 (18:24 +0000)]
working partitioned eqs function
Luke Kenneth Casson Leighton [Thu, 30 Jan 2020 16:04:53 +0000 (16:04 +0000)]
whoops overwrote input variable
Luke Kenneth Casson Leighton [Thu, 30 Jan 2020 13:57:46 +0000 (13:57 +0000)]
add comments
Luke Kenneth Casson Leighton [Thu, 30 Jan 2020 13:49:22 +0000 (13:49 +0000)]
experimental eq (non-optimal)
Luke Kenneth Casson Leighton [Thu, 30 Jan 2020 13:48:58 +0000 (13:48 +0000)]
add "as_sig" function to PartitionPoints to get the mask as a straight sequence
Michael Nolan [Tue, 28 Jan 2020 23:19:19 +0000 (18:19 -0500)]
Use nmigen's built in formal runner instead of mine
Michael Nolan [Tue, 28 Jan 2020 22:05:25 +0000 (17:05 -0500)]
Fix handling of the .sby file directory when running in the current dir
Michael Nolan [Tue, 28 Jan 2020 21:58:58 +0000 (16:58 -0500)]
Use anyconst for the inputs of the dut in FMax formal proof
Luke Kenneth Casson Leighton [Tue, 28 Jan 2020 21:32:40 +0000 (21:32 +0000)]
line-up, whitespace
Luke Kenneth Casson Leighton [Tue, 28 Jan 2020 21:27:58 +0000 (21:27 +0000)]
read proof file from any location
Michael Nolan [Tue, 28 Jan 2020 20:58:12 +0000 (15:58 -0500)]
remove usage of m.If() in fpmax and replace with Mux
Michael Nolan [Tue, 28 Jan 2020 17:38:35 +0000 (12:38 -0500)]
Flesh out the formal proof for fmax
Michael Nolan [Tue, 28 Jan 2020 16:56:34 +0000 (11:56 -0500)]
Update gitignore in formal directories to ignore proof folders
Michael Nolan [Tue, 28 Jan 2020 16:43:21 +0000 (11:43 -0500)]
Add rudimentary proof to fpmax
Michael Nolan [Tue, 28 Jan 2020 16:42:58 +0000 (11:42 -0500)]
Add fpmin handling to fpmax module
Michael Nolan [Tue, 28 Jan 2020 16:32:40 +0000 (11:32 -0500)]
Add FPMAX module
Luke Kenneth Casson Leighton [Tue, 28 Jan 2020 19:34:45 +0000 (19:34 +0000)]
allow fsgnj proof to be run from any location
Michael Nolan [Tue, 28 Jan 2020 00:27:12 +0000 (19:27 -0500)]
FSGNJ: expandd formal proof to 16 and 64 bits
Michael Nolan [Tue, 28 Jan 2020 00:23:12 +0000 (19:23 -0500)]
FSGNJ: Convert proof to use FPNumDecode
This uses FPNumDecode in the formal proof of the FSGNJPipeMod to
ensure that the bit indexing method is correct by going about the
proof in a different way
Michael Nolan [Tue, 28 Jan 2020 00:01:41 +0000 (19:01 -0500)]
Add formal proof for FSGNJPipeMod module
Luke Kenneth Casson Leighton [Mon, 27 Jan 2020 19:47:16 +0000 (19:47 +0000)]
remove unneeded comment
Michael Nolan [Mon, 27 Jan 2020 17:33:27 +0000 (12:33 -0500)]
FSGNJ: Fix typo in abs
Michael Nolan [Mon, 27 Jan 2020 17:11:24 +0000 (12:11 -0500)]
FSGNJ: Remove usage of FPNumDecode
FPNumDecode was introducing extra logic to subtract the floating point bias
then immediately re-add it when decoding/encoding operand a. This is
unneeded since this module doesn't modify the exponent or mantissa
Luke Kenneth Casson Leighton [Mon, 27 Jan 2020 15:54:26 +0000 (15:54 +0000)]
add comments, remove one of the Muxes
Luke Kenneth Casson Leighton [Mon, 27 Jan 2020 15:46:46 +0000 (15:46 +0000)]
reduce linelength <80chars
Michael Nolan [Mon, 27 Jan 2020 14:51:37 +0000 (09:51 -0500)]
Add more/better comments to fsignj.py
Michael Nolan [Mon, 27 Jan 2020 14:34:40 +0000 (09:34 -0500)]
FSGNJ: Replace use of Switch() with explicit muxes
From http://bugs.libre-riscv.org/show_bug.cgi?id=120
"If(), Switch() and friends are fine for modules that are strictly
scalar, but will not work if the module is converted to SIMD."
Michael Nolan [Mon, 27 Jan 2020 14:29:52 +0000 (09:29 -0500)]
FSGNJ: Use Floating point decode module instead of raw bits
Michael Nolan [Mon, 27 Jan 2020 13:29:07 +0000 (08:29 -0500)]
Move patches in README to separate files
This is to facilitate writing better instructions on how to build sfpy
on the wiki
Luke Kenneth Casson Leighton [Mon, 27 Jan 2020 13:26:21 +0000 (13:26 +0000)]
add (untested) partitioned xor/or/and operators
these all work regardless of partitioning
Luke Kenneth Casson Leighton [Mon, 27 Jan 2020 12:24:05 +0000 (12:24 +0000)]
add copyright notices
Luke Kenneth Casson Leighton [Mon, 27 Jan 2020 11:27:13 +0000 (11:27 +0000)]
reverse indices
Michael Nolan [Mon, 27 Jan 2020 02:11:23 +0000 (21:11 -0500)]
Expand FSGNJ module to 16 and 64 bit floats
This modifies fsignj.py to be compliant with other Float widths
besides 32 bit. It also modifies the unit tests to include tests for
16 and 64 bit floats
Michael Nolan [Mon, 27 Jan 2020 02:10:31 +0000 (21:10 -0500)]
Pep8 cleanup of FSGNJ module
Michael Nolan [Sun, 26 Jan 2020 20:59:15 +0000 (15:59 -0500)]
FSGNJ working now in all three modes
This adds the functionality of the FSIGNJ RISCV instruction, namely:
When the opcode is 0x00 - it combines the sign bit of operand B with
the rest of the value in operand A
When the opcode is 0x01 - it combines the inverted sign bit of operand
B with the rest of the value in operand A
When the opcode is 0x02 - it combines the sign bit composed of the
exclusive OR of the sign bits of A and B with the rest of the value in
operand A
This also modifies the unit test for the module to test each of these
behaviors for 32 bit floats
Michael Nolan [Sun, 26 Jan 2020 20:37:16 +0000 (15:37 -0500)]
Add basic test for fsignj pipe
This adds a bare bones unit test for the fsignj module, and fixes the
errors generated when trying to elaborate the module in the unit test
Michael Nolan [Sun, 26 Jan 2020 20:08:36 +0000 (15:08 -0500)]
Add FSGNJ Pipeline stage and overall FSGNJ pipeline
My goal here was to create a very bare bones pipeline stage for the
purposes of implementing the FSGNJ functionality later. This code
should be able to at least be imported and the FSNJMuxInOut class
constructed without errors.
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 16:51:51 +0000 (16:51 +0000)]
trying to get recursive output working from partitioned eq
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 15:11:59 +0000 (15:11 +0000)]
found bug in eq partition assignment
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 15:04:50 +0000 (15:04 +0000)]
debug eq partition
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 13:31:12 +0000 (13:31 +0000)]
add beginnings of partitioned eq into unit test
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 12:15:21 +0000 (12:15 +0000)]
add partitioned eq module
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 11:27:46 +0000 (11:27 +0000)]
convert to partition mask rather than partition points
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 11:15:30 +0000 (11:15 +0000)]
add more to module docstring
Luke Kenneth Casson Leighton [Fri, 24 Jan 2020 11:07:33 +0000 (11:07 +0000)]
de-modulify PartitionedSignal, call "set_module" to use it
Luke Kenneth Casson Leighton [Wed, 22 Jan 2020 14:21:24 +0000 (14:21 +0000)]
add partition test add unit test
Luke Kenneth Casson Leighton [Wed, 22 Jan 2020 13:42:13 +0000 (13:42 +0000)]
add __xor__ and __add__
Luke Kenneth Casson Leighton [Wed, 22 Jan 2020 12:25:20 +0000 (12:25 +0000)]
add partitioned signal class
Luke Kenneth Casson Leighton [Fri, 17 Jan 2020 14:18:34 +0000 (14:18 +0000)]
min/max in Signal deprecated in nmigen
Luke Kenneth Casson Leighton [Fri, 17 Jan 2020 14:14:33 +0000 (14:14 +0000)]
update to new revision nmigen
Luke Kenneth Casson Leighton [Mon, 6 Jan 2020 21:16:08 +0000 (21:16 +0000)]
split out adder code (PartitionedAdder) into module, PartitionPoints too
Luke Kenneth Casson Leighton [Tue, 19 Nov 2019 16:08:56 +0000 (16:08 +0000)]
import global not relative
Luke Kenneth Casson Leighton [Tue, 19 Nov 2019 16:08:45 +0000 (16:08 +0000)]
add bug #148 record
Luke Kenneth Casson Leighton [Tue, 19 Nov 2019 15:44:17 +0000 (15:44 +0000)]
clarify StageChain
Luke Kenneth Casson Leighton [Tue, 19 Nov 2019 15:37:32 +0000 (15:37 +0000)]
clarify whats being obtained from _connect_out function
Luke Kenneth Casson Leighton [Tue, 19 Nov 2019 15:37:05 +0000 (15:37 +0000)]
documentation on pipeline API
Luke Kenneth Casson Leighton [Tue, 19 Nov 2019 15:12:58 +0000 (15:12 +0000)]
document iocontrol module properly
Luke Kenneth Casson Leighton [Wed, 28 Aug 2019 06:17:21 +0000 (07:17 +0100)]
create SIMD pipe multiply unit test
Luke Kenneth Casson Leighton [Mon, 26 Aug 2019 12:23:35 +0000 (13:23 +0100)]
add docstring Mul8_16_32_64 only for testing