Leo Liu [Tue, 2 May 2017 19:48:21 +0000 (15:48 -0400)]
radeon/vcn: add vcn decode interface
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Wed, 24 May 2017 15:57:28 +0000 (11:57 -0400)]
configure.ac: update libdrm amdgpu version requirement to 2.4.81
VCN decode has a new interface, and that depends on the latest libdrm
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Emil Velikov [Thu, 25 May 2017 07:52:14 +0000 (08:52 +0100)]
docs: update calendar, add news item and link release notes for 17.1.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 25 May 2017 07:18:59 +0000 (08:18 +0100)]
docs: add sha256 checksums for 17.1.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
092c485b8ed127a15f52434857c37e8021775775)
Emil Velikov [Thu, 25 May 2017 07:11:42 +0000 (08:11 +0100)]
docs: add release notes for 17.1.1
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
ca0a148a4d09d850f63c82011ac49a311e43e502)
Timothy Arceri [Tue, 23 May 2017 12:01:53 +0000 (22:01 +1000)]
mesa: remove unrequired double calc
type_size() will already handle this correctly for us.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Tue, 23 May 2017 12:01:52 +0000 (22:01 +1000)]
mesa: remove redundant modulus operation
The if check above means we can only get here if size is less than 4.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Tue, 23 May 2017 19:16:56 +0000 (13:16 -0600)]
svga: init svga_screen::swc_mutex with mtx_recursive
If the SVGA3D_BindGBSurface() call in svga_buffer_hw_storage_unmap()
fails, we'll flush and that might involve unmapping other buffers.
That leads to a recursive lock on svga_screen::swc_mutex and causes
a deadlock. Fix this by initializing the mutex with mtx_recursive.
Note that this only happened on Linux, not Windows. On Windows, the
mutex functions are implemented with Win32 critical sections which
support recursive locking.
Also add a comment about this.
Fixes VMware bug
1831549 (Unigine Tropics demo freeze on Linux).
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Neha Bhende<bhenden@vmware.com>
Brian Paul [Tue, 23 May 2017 14:21:57 +0000 (08:21 -0600)]
svga: move logging initialization code into new function
Plus a few other minor clean-ups.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Brian Paul [Tue, 23 May 2017 14:16:38 +0000 (08:16 -0600)]
svga: init local vars to silence uninitialized use warnings
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Brian Paul [Tue, 23 May 2017 13:45:12 +0000 (07:45 -0600)]
svga: log the process command line to the vmware.log file
This is useful for Piglit when thousands of tests are run and we want
to determine which test triggered a device error.
v2: only log command line info if the new SVGA_EXTRA_LOGGING env var is set
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Sinclair Yeh [Thu, 4 Aug 2016 19:57:06 +0000 (12:57 -0700)]
svga: Limit svga message capability to newer compilers
The assembly code used by the SVGA message feature doesn't
build properly with older compilers, so limit it to only
gcc 5.3.0 and newer.
Also modified the stubs to avoid "unused variable" warnings.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 19 May 2016 10:11:51 +0000 (11:11 +0100)]
svga: Fix MSVC build.
This let us compile the code with MSVC, but it no-ops the log function.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Sinclair Yeh [Tue, 23 May 2017 13:42:08 +0000 (07:42 -0600)]
svga: Add the ability to log messages to vmware.log on the host.
For now this capability only exists in the SVGA driver but
can be exported later if other modules, e.g. winsys, wants
to use it for logging.
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Mon, 22 May 2017 16:30:16 +0000 (10:30 -0600)]
Revert "gallium: remove unused PIPE_CC_GCC_VERSION"
This reverts commit
e60928f4c4bd4484821d83f2b16a910ea9f5f9d9.
PIPE_CC_GCC_VERSION is used by some of our in-house code which hasn't
been upstreamed yet.
Lionel Landwerlin [Wed, 24 May 2017 01:04:34 +0000 (02:04 +0100)]
aubinator: report error on unknown device id
Since we're going to stop aubinator without a valid device id, better
report an error. This also silences a Coverity warning.
CID:
1405004
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Lionel Landwerlin [Wed, 24 May 2017 01:02:30 +0000 (02:02 +0100)]
aubinator: be consistent on exit code
We're using both exit(1) & exit(EXIT_FAILURE), settle for one, same
for success.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Lionel Landwerlin [Wed, 24 May 2017 00:48:36 +0000 (01:48 +0100)]
aubinator: fix double free
1;4601;0c
Free previously allocated filename outside the for loop.
CID:
1405014
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Christian König [Tue, 23 May 2017 16:40:18 +0000 (18:40 +0200)]
winsys/amdgpu: align VA allocations to fragment size v2
BOs larger than the minimum fragment size should have their VA
alignet to at least the fragment size for optimal performance.
v2: drop unused leftover from initial implementation
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Tue, 23 May 2017 13:31:35 +0000 (15:31 +0200)]
tgsi: remove unused tgsi_is_passthrough_shader()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>
Eric Engestrom [Wed, 24 May 2017 07:30:59 +0000 (08:30 +0100)]
configure.ac: rephrase 'GLX w/o X11' error message
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Jason Ekstrand [Wed, 17 May 2017 18:54:24 +0000 (11:54 -0700)]
anv: Require vertex buffers to come from a 32-bit heap
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 18:54:12 +0000 (11:54 -0700)]
anv: Advertise both 32-bit and 48-bit heaps when we have enough memory
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 18:42:36 +0000 (11:42 -0700)]
anv: Refactor memory type setup
This makes us walk over the heaps one at a time and add the types for
LLC and !LLC to each heap.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 18:38:16 +0000 (11:38 -0700)]
anv: Make supports_48bit_addresses a heap property
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 18:31:02 +0000 (11:31 -0700)]
anv: Stop setting BO flags in bo_init_new
The idea behind doing this was to make it easier to set various flags.
However, we have enough custom flag settings floating around the driver
that this is more of a nuisance than a help. This commit has the
following functional changes:
1) The workaround_bo created in anv_CreateDevice loses both flags.
This shouldn't matter because it's very small and entirely internal
to the driver.
2) The bo created in anv_CreateDmaBufImageINTEL loses the
EXEC_OBJECT_ASYNC flag. In retrospect, it never should have gotten
EXEC_OBJECT_ASYNC in the first place.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 18:16:57 +0000 (11:16 -0700)]
anv: Set image memory types based on the type count
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 18:14:06 +0000 (11:14 -0700)]
anv: Add valid_bufer_usage to the memory type metadata
Instead of returning valid types as just a number, we now walk the list
and check the buffer's usage against the usage flags we store in the new
anv_memory_type structure. Currently, valid_buffer_usage == ~0.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 18:13:01 +0000 (11:13 -0700)]
anv: Determine the type of mapping based on type metadata
Before, we were just comparing the type index to 0. Now we actually
look the type up in the table and check its properties to determine what
kind of mapping we want to do.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 17 May 2017 17:55:41 +0000 (10:55 -0700)]
anv: Set up memory types and heaps during physical device init
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 18 May 2017 17:57:42 +0000 (10:57 -0700)]
anv: Predicate 48bit support on gen >= 8
This doesn't matter right now since it only affects whether or not we
set the kernel bit but, if we ever do anything else based on it, we'll
want it to be correct per-gen.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 18 May 2017 18:31:48 +0000 (11:31 -0700)]
anv/image: Get rid of the memset(aux, 0, sizeof(aux)) hack
Up until now, we've been memsetting the auxiliary surface to 0 at
BindImageMemory time to ensure that it is properly initialized.
However, this isn't correct because apps are allowed to freely alias
memory between different images and buffers so long as they properly
track whether or not a particular image is valid and, if it isn't,
transition from UNINITIALIZED to something else before using it. We
now implement those transitions so we can drop the hack.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 18 May 2017 18:30:47 +0000 (11:30 -0700)]
anv: Handle transitioning depth from UNDEFINED to other layouts
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 18 May 2017 02:02:42 +0000 (19:02 -0700)]
anv: Handle color layout transitions from the UNINITIALIZED layout
This causes dEQP-VK.api.copy_and_blit.resolve_image.partial.* to start
failing due to test bugs. See CL 1031 for a test fix.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Axel Davy [Sun, 21 May 2017 22:19:01 +0000 (00:19 +0200)]
st/nine: Fix a regression and syntax cleanup
A few cleanups and in particular initializing properly
the new pipe_draw_info fields.
This should fix the regression caused by
330d0607ed60fd3edca192e54b4246310f06652f
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101088
Signed-off-by: Axel Davy <axel.davy@ens.fr>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Ian Romanick [Mon, 22 May 2017 18:14:32 +0000 (11:14 -0700)]
mesa: Remove GL_APPLE_vertex_array_object stubs
Mark the functions 'exec="skip"' in the XML instead. libGL will still
have the functions, but the driver won't try to use them. I verified
that this commit works with piglit's 'object-namespace-pollution glClear
vertex-array' on x64 with a driver built from mesa-12.0.3 tag.
In fairness, this test also works with a libGL built from
7927d03. I
believe it continues to work because on non-Windows platforms we
generate some extra, dummy dispatch functions that can be used when a
driver requests a function unknown to libGL. This was done to provide
some "forward" compatibility with drivers that need more functions.
This doesn't work on Windows because the Windows calling convention is
for the callee to clean up the stack. That's the theory anyway.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Marek Olšák [Wed, 17 May 2017 18:25:59 +0000 (20:25 +0200)]
gallium/radeon: pipe AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS into gallium HUD
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Rob Clark [Tue, 23 May 2017 16:05:12 +0000 (12:05 -0400)]
freedreno/ir3: switch to NIR by default
Now that we lower vars to regs, we no longer regress for anything that
does complex dereferences. (With tgsi, derefers are already lowered
before tgsi_to_nir, but not with glsl_to_nir.) In fact it actually
fixes a few things to bypass tgsi.
So make NIR the default (finally!)
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sun, 21 May 2017 16:40:30 +0000 (12:40 -0400)]
freedreno/ir3: lower arrays to regs
Instead of using load/store_var intrinsics, which can have complex
derefs in the case of multi-dimensional arrays, lower these to regs
and handle the direct/indirect loads in get_src() and stores in
put_dst().
This should let us switch to using nir by default.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sun, 21 May 2017 16:33:45 +0000 (12:33 -0400)]
freedreno/ir3: add put_dst()
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sun, 21 May 2017 15:59:51 +0000 (11:59 -0400)]
freedreno/ir3: code-motion
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 20 May 2017 15:18:08 +0000 (11:18 -0400)]
freedreno/ir3: fix cmdline compiler
standalone_compiler_cleanup() frees the glsl types, among other things,
so it needs to come after nir->ir3. But since we exit after dumping the
disassembly, it is easier to just not call it at all.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 22 May 2017 18:18:19 +0000 (14:18 -0400)]
freedreno/ir3: add missing nir_opt_copy_prop_vars() pass
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 23 May 2017 13:09:41 +0000 (09:09 -0400)]
freedreno/ir3: need different compiler options for a5xx
vertex_id_zero_based differs..
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Sat, 20 May 2017 13:54:08 +0000 (09:54 -0400)]
freedreno/a5xx: remove copapasta from a4xx
Won't ever hit this w/ a420 gpu, so this is dead code. Need to get astc
working to know whether to rip this out entirely or not.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 19 May 2017 13:39:52 +0000 (09:39 -0400)]
freedreno: only support SSBOs with nir
tgsi_to_nir does not support them. Note that compute shaders already
force nir.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 17 May 2017 16:46:17 +0000 (12:46 -0400)]
freedreno/a5xx: add some missing texture formats
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 17 May 2017 14:17:10 +0000 (10:17 -0400)]
freedreno/a5xx: provoking vertex
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Wed, 17 May 2017 14:02:30 +0000 (10:02 -0400)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 15 May 2017 19:53:12 +0000 (15:53 -0400)]
nir/lower-atomics-to-ssbo: remove atomic_uint arrays too
Maybe there is a better way to do this. But by the time we get to
assigning uniform locs, we want the atomic_uint's to all be gone,
otherwise we assert in st_glsl_attrib_type_size().
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 15 May 2017 19:38:39 +0000 (15:38 -0400)]
nir/lower-atomics-to-ssbo: fix num_components
Fixes some piglits like arb_shader_atomic_counters-active-counters
Signed-off-by: Rob Clark <robdclark@gmail.com>
Timothy Arceri [Sat, 20 May 2017 01:27:32 +0000 (11:27 +1000)]
radeon: pass flags that can change shaders to disk_cache_create()
I wasn't sure if I should filter the flags so that we only use
flags that actually change the shader output. To avoid manual
updates we just pass in everything for now.
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Sat, 20 May 2017 01:06:25 +0000 (11:06 +1000)]
util/disk_cache: add new driver_flags param to cache keys
This will be used for things such as adding driver specific environment
variables to the key. Allowing us to set environment vars that change
the shader and not have the driver ignore them if it finds existing
shaders in the cache.
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Jose Fonseca [Mon, 22 May 2017 17:04:12 +0000 (18:04 +0100)]
u_format_test: Ignore S3TC errors.
This prevents spurious failures when libtxc-dxtn-s2tc is installed.
Note: lp_test_format doesn't need any change since we were already
ignoring S3TC failures there.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Nanley Chery [Fri, 19 May 2017 23:39:25 +0000 (16:39 -0700)]
docs: Document ASTC extension support for SKL and BXT
v2: Remove the '+' after bxt
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Nanley Chery [Sat, 22 Apr 2017 00:15:16 +0000 (17:15 -0700)]
i965: Enable ASTC HDR for Broxton
This platform passes the following GLES3 tests:
ES3-CTS.functional.texture.compressed.astc.endpoint_value_hdr_cem_*
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Nanley Chery [Tue, 16 May 2017 23:20:59 +0000 (16:20 -0700)]
intel/isl: Add ASTC HDR to format lists and helpers
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Bas Nieuwenhuizen [Sun, 14 May 2017 12:40:02 +0000 (14:40 +0200)]
radv: Add compute HTILE fast clear.
Not really what the fast depth clear does, no matter whether you use
EXPCLEAR or not. Seems the fast clear using the DB HW always touches
the main buffer.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sat, 20 May 2017 21:45:56 +0000 (23:45 +0200)]
radv: Use correct clear words for HTILE.
Did some RE'ing what several HTILE words give when read from a descriptor
with HTILE compression enabled.
Seems to align with -pro usage for D16 too.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 15 May 2017 21:00:17 +0000 (23:00 +0200)]
radv: Add queue masks for htile usage determination.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 14 May 2017 23:23:24 +0000 (01:23 +0200)]
radv: Specify semantics of HTILE layout helpers.
And correct implementation to specify only what we support.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 8 May 2017 22:44:57 +0000 (00:44 +0200)]
radv: Don't use a separate can_expclear.
We never use EXPCLEAR clears.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Ian Romanick [Fri, 19 Aug 2016 14:10:51 +0000 (15:10 +0100)]
mesa: GL_ARB_shader_subroutine is not optional in core profile
text data bss dec hex filename
7038459 235248 37280
7310987 6f8e8b 32-bit i965_dri.so before
7038227 235248 37280
7310755 6f8da3 32-bit i965_dri.so after
6681438 303400 50608
7035446 6b5a36 64-bit i965_dri.so before
6681254 303400 50608
7035262 6b597e 64-bit i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Benedikt Schemmer [Mon, 22 May 2017 17:32:02 +0000 (19:32 +0200)]
drirc: Add allow_glsl_builtin_variable_redeclaration for Dead Island Riptide Definitive Edition
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Fri, 12 May 2017 23:08:03 +0000 (01:08 +0200)]
gallium/radeon: add a query for monitoring Gallium thread load
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Fri, 7 Apr 2017 16:30:28 +0000 (18:30 +0200)]
radeonsi/gfx9: compile shaders with +xnack
so that LLVM doesn't allocate SGPRs where XNACK is.
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rhys Kidd [Mon, 22 May 2017 03:42:47 +0000 (23:42 -0400)]
vc4: Remove dead code in vc4_dump_surface_msaa()
Coverity caught the use of dead code copy-paste for
found_colors[] and num_found_colors.
CID:
1341850
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Lionel Landwerlin [Mon, 22 May 2017 10:07:53 +0000 (11:07 +0100)]
egl/wayland: verify event queue was allocated
We're already verified that 'window' wasn't NULL, I'm guessing this
allocation error is about the newly created queue.
CID:
1409754
Fixes: 03dd9a88b0b ("egl/wayland: Use per-surface event queues")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Timothy Arceri [Fri, 19 May 2017 02:31:47 +0000 (12:31 +1000)]
mesa: add APPLE_vertex_array_object stubs
APPLE_vertex_array_object support was removed in
7927d0378fc7.
However it turns out we can't remove the functions because this
can cause issues when libglapi is used together with DRI
drivers built prior to said commit
Fixes: 7927d0378fc ("mesa: drop APPLE_vertex_array_object support")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Timothy Arceri [Sat, 20 May 2017 03:54:20 +0000 (13:54 +1000)]
glsl: set mask via initialisation list rather than in constructor body
Potentially more efficient as it may avoid the struct being initialised
twice.
Also add var to the initialisation list while we are here.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Vladislav Egorov [Sun, 21 May 2017 20:49:19 +0000 (22:49 +0200)]
ralloc: Use strnlen() inside of strncat()
If the str is long or isn't null-terminated, strlen() could take a lot
of time or even crash. I don't know why was it used in the first place,
maybe for platforms without strnlen(), but strnlen() is already used
inside of ralloc_strndup(), so this change should not additionally
break anything.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Vladislav Egorov [Sun, 21 May 2017 20:49:17 +0000 (22:49 +0200)]
glcpp: Skip unnecessary line continuations removal
Overwhelming majority of shaders don't use line continuations. In my
shader-db only shaders from the Talos Principle and Serious Sam used
them, less than 1% out of all shaders. Optimize for this case, don't
do any copying if no line continuation was found.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Vladislav Egorov [Sun, 21 May 2017 20:49:15 +0000 (22:49 +0200)]
glcpp: Avoid unnecessary strcmp()
strcmp() is slow. Initiate comparison with "__LINE__" or "__FILE__"
only if the identifier starts with '_', which is rare.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Thomas Helland [Sun, 21 May 2017 13:17:26 +0000 (15:17 +0200)]
main: Move hashLockMutex/hashUnlockMutex to header and inline
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Thomas Helland [Thu, 18 May 2017 18:39:20 +0000 (20:39 +0200)]
main: Use _mesa_HashLock/UnlockMutex consistently
This is shorter and easier on the eyes. At the same time this
also ensures that we are always asserting that the table pointer
is not NULL. Currently that was not done for all situations.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Thomas Helland [Fri, 10 Feb 2017 18:14:32 +0000 (19:14 +0100)]
util: Change the pointer hashing function
Use our knowledge that pointers are at least 4 byte aligned to remove
the useless digits. Then shift by 6, 10, and 14 bits and add this to
the original pointer, effectively folding in the entropy of the higher
bits of the pointer into a 4-bit section. Stopping at 14 means we can
add the entropy from 18 bits, or at least a 600Kbyte section of memory.
Assuming that ralloc allocates from a linearly allocated heap less than
this we can make a very efficient pointer hashing function for our usecase.
Even if we are not on an architecture that is 4 byte aligned, there is
still a high big chance that the thing we are allocating is at least
8 bytes in size, so even then we will have entropy into the third bit.
The 4 bit increment on the shifts is chosen rather arbitrarily; if we
had chosen a 3 bit increment we would need to add another xor to
cover a decently sized memorypool. Increasing it to 5 bits would
spread our entropy more, possibly hurting us with more collisions on
hash tables of size less than 32. With a hash table of size 16 there
are a max of 11 entries, and we can assume that with such a small table
collisions are not that painfull.
This allows us to hash the whole 32 or 64 bit pointer at once,
instead of running FNV1a, looping through each byte and doing
increments, decrements, muls, and xors on every byte. This cuts
_mesa_hash_data from 1.5 % on profiles, to making _mesa_hash_pointer
show up with a 0.09% share. Collisions on insertion actually seems to be
ever so slightly lower with this hash function, as found by printing
a loop counter and sorting the data.
perf stat shows a 1.5% reduction in instruction count,
and a 5% reduction in stalled cycles. Shader-db runtime goes
from 225 to 220 seconds.
No instruction-count changes in shader-db, but there are some minor
changes in cycle-count that is likely caused by nir walking a set
in some of its passes, and this causing a different ordering.
That might eventually lead to a difference in register allocation.
However, the effect is a net positive;
total cycles in shared programs:
24739550 ->
24738482 (-0.00%)
cycles in affected programs: 374468 -> 373400 (-0.29%)
helped: 178
HURT: 49
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Philipp Zabel [Fri, 19 May 2017 22:07:12 +0000 (00:07 +0200)]
vulkan/wsi/wayland: Fix proxy wrappers for swapchain recreation
Before the swapchain event queue is destroyed, all proxy objects that reference
it must be dropped. Otherwise we risk a use-after-free if a frame callback event
or buffer release events are received afterwards.
This happens when an application destroys and recreates a swapchain in FIFO
mode between two frames without using the VkSwapchainCreateInfoKHR::oldSwapchain
mechanism to keep the old swapchain until after the next redraw.
Fixes: 5034c615582a ("vulkan/wsi/wayland: Use proxy wrappers for swapchain")
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Cc: mesa-stable@lists.freedesktop.org
John Brooks [Mon, 15 May 2017 05:47:39 +0000 (01:47 -0400)]
drirc: Add allow_glsl_builtin_variable_redeclaration for Dying Light and Dead Island Definitive Edition
This fixes the long-standing problem with Dying Light where the game would
produce a black screen when running under Mesa. This happened because the
game's vertex shaders redeclare gl_VertexID, which is a GLSL builtin.
Mesa's GLSL compiler is a little more strict than others, and would not
compile them:
error: `gl_VertexID' redeclared
The allow_glsl_builtin_variable_redeclaration directive allows the shaders
to compile and the game to render. The game also requires OpenGL 4.4+ (GLSL
440), but does not request it explicitly. It must be forced with an
override, such as MESA_GL_VERSION_OVERRIDE=4.5 and
MESA_GLSL_VERSION_OVERRIDE=450. A compatibility context is *not* required
and forcing one with 4.5COMPAT or allow_higher_compat_version results in
graphical artifacts.
Dead Island Definitive Edition is another Techland port on the same engine
with the same problems, so we set the
allow_glsl_builtin_variable_redeclaration option for that game as well.
v2 (Samuel Pitoiset):
- Rename allow_glsl_builtin_redeclaration ->
allow_glsl_builtin_variable_redeclaration
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96449
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
John Brooks [Mon, 15 May 2017 05:47:38 +0000 (01:47 -0400)]
glsl: Conditionally allow redeclaration of built-in variables
Conditional on allow_glsl_builtin_variable_redeclaration driconf option.
v2 (Samuel Pitoiset):
- Rename allow_glsl_builtin_redeclaration ->
allow_glsl_builtin_variable_redeclaration
- style: put spaces after 'if'
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
John Brooks [Mon, 15 May 2017 05:47:37 +0000 (01:47 -0400)]
driconf: Add allow_glsl_builtin_variable_redeclaration option
This option will allow GLSL builtins to be redeclared verbatim (e.g.
redeclaring "in int gl_VertexID" in a vertex shader). This is not strictly
valid and would normally fail to compile, but some applications (such as
newer Techland ports) do it and need more leniency.
v2 (Samuel Pitoiset):
- Rename allow_glsl_builtin_redeclaration ->
allow_glsl_builtin_variable_redeclaration
Signed-off-by: John Brooks <john@fastquake.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sat, 20 May 2017 08:18:20 +0000 (04:18 -0400)]
nv50,nvc0: clear index buffer bufctx bin unconditionally
The previous condition was to clear it out if it had previously been
set, not what's in the current draw. That information is gone now, so
just clear it unconditionally.
Fixes: 330d0607e ("gallium: remove pipe_index_buffer and set_index_buffer")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 20 May 2017 08:17:22 +0000 (04:17 -0400)]
nv50: fix vtxbuf cleanup
Use a user-buffer-aware cleanup function.
Fixes: c24c3b94ed ("gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytes")
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Fri, 12 May 2017 05:23:14 +0000 (22:23 -0700)]
i965: Use the upload BO for push constants on Gen7.5-Gen8.
We can easily use the upload BO for push constants on Gen7.5/Gen8 too,
at the cost of a relocation when emitting 3DSTATE_CONSTANT_XS. We can
simply switch to using constant buffer pointer 2 instead of pointer 0,
like we do on Gen9+.
Ivybridge and Baytrail can't do this trick because they require the
constant buffers to be enabled in order, starting with 0. We'd have
to set the INSTPM bit to make the constant buffer pointer not relative
to dynamic state base address, which would need kernel command parser
support.
Improves performance in GLBenchmark 2.7/TRex Offscreen by:
- Broadwell GT2: 0.305608% +/- 0.19877% (n = 68)
- Braswell: No difference proven (n = 742)
- Haswell GT3e: 0.180755% +/- 0.
0237505% (n = 30)
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Kenneth Graunke [Fri, 15 Aug 2014 05:46:54 +0000 (22:46 -0700)]
i965: Use the upload BO for push constants on Gen9+.
Shaders can use quite a bit of uniform data. Better to put it in the
upload buffers, like we do for client vertex data, rather than the
batch buffer state area, which is primarly used for indirect state.
This should free up batch space, allowing us to emit more commands in a
batch before flushing. Because BRW_NEW_BATCH also causes a lot of state
to be re-emitted, it may also reduce CPU overhead a little bit.
We took this approach on Gen4-5, but switched to using the batch area
on Gen6+ because buffer 0 is relative to Dynamic State Base Address by
default, which is set to the start of the batch.
On Gen9+, we already use a relocation due to a workaround, so this is
trivial to change and has basically no downside.
Unfortunately we can't change compute shader push constants because
MEDIA_CURBE_LOAD always uses an offset from dynamic state base address.
Improves performance in GLBenchmark 2.7/TRex Offscreen by:
- Skylake GT4e: 0.52821% +/- 0.113402% (n = 190)
- Apollolake: 0.510225% +/- 0.273064% (n = 70)
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Kenneth Graunke [Tue, 29 Nov 2016 09:30:18 +0000 (01:30 -0800)]
i965: Drop BRW_NEW_PUSH_CONSTANT_ALLOCATION from CS packets.
I don't think CS push constant uploading uses the section of L3
controlled by 3DSTATE_PUSH_CONSTANT_ALLOC_XS. So I don't think
it needs to be re-emitted when that space is reallocated.
The programming note in gen7_allocate_push_constants doesn't
indicate this is necessary, at least.
Reviewed-by: Chris Forbes <chrisforbes@google.com>
Ilia Mirkin [Sat, 20 May 2017 07:11:12 +0000 (03:11 -0400)]
nvc0/ir: SHLADD's middle source must be an immediate
The instruction encodings only allow for immediates. Don't try to
replace a zero (which is dumb to have in that op in any case) with RZ.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Tapani Pälli [Fri, 19 May 2017 11:25:49 +0000 (14:25 +0300)]
android: add -Wl,--build-id=sha1 to LDFLAGS for libvulkan_intel
Just like is done on desktop and what is expected by the build-id code.
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Emil Velikov [Sat, 20 May 2017 00:15:02 +0000 (01:15 +0100)]
configure.ac: s/xcb-fixes/xcb-xfixes/
Former is not a thing, even if I have a hacked xcb-fixes.pc on my system.
Thanks for spotting it Mark!
Fixes: 9a90d6a9d4e ("configure.ac: add xcb-fixes to the XCB DRI3 list")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Fri, 19 May 2017 23:04:33 +0000 (00:04 +0100)]
configure.ac: add xcb-fixes to the XCB DRI3 list
The XCB module is used by the VL targets. Thus omitting it can lead to
link-time errors due to unresolved symbols.
Other DRI3 users such as the Vulkan WSI and the dri3 loader helper do
not use an update region in their xcb_present_pixmap() call. We will
look into that at a later stage.
Fixes: acf3d2afab0 ("configure: check once for DRI3 dependencies")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101110
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Thu, 18 May 2017 20:27:01 +0000 (21:27 +0100)]
automake: add SWR LLVM gen_builder.hpp workaround
As gen_builder.hpp file is generated, it contains information that is
specific to the LLVM version it originates from.
As suggested by Tim, the file seems to be forwards compatible. So in
order to produce ship a file which will work everywhere we should be
using earlies supported LLVM - 3.9.
With this we're back on track and can build all of mesa without
python/mako/flex and friends.
In the long term we might want to see if the python generators can be
updated to produce LLVM version agnostic files. At least within the
range supported by SWR.
Cc: <mesa-stable@lists.freedesktop.org>
Cc: Chuck Atkins <chuck.atkins@kitware.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
Timothy Arceri [Thu, 18 May 2017 05:10:08 +0000 (15:10 +1000)]
st/mesa: don't mark the program as in cache_fallback when there is cache miss
When we fallback currently the gl_program objects are re-allocated.
This is likely to change when the i965 cache lands, but for now
this fixes a crash when using MESA_GLSL=cache_fb. This env var
simulates the fallback path taken when a tgsi cache item doesn't
exist due to being evicted previously or some kind of error.
Unlike i965 we are always falling back at link time so it's safe to
just re-allocate everything. We will be unnecessarily freeing and
re-allocate a bunch of things here but it's probably not a huge deal,
and can be changed when the i965 code lands.
Fixes: 0e9991f957e2 ("glsl: don't reference shader prog data during cache fallback")
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Thu, 18 May 2017 05:00:40 +0000 (15:00 +1000)]
mesa: add an env var to force cache fallback
For the gallium state tracker a tgsi binary may have been evicted
from the cache to make space. In this case we would take the
fallback path and recompile/link the shader.
On i965 there are a number of reasons we can get to the program
upload stage and have neither IR nor a valid cached binary.
For example the binary may have been evicted from the cache or
we need a variant that wasn't previously cached.
This environment variable enables us to force the fallback path that
would be taken in these cases and makes it easier to debug these
otherwise hard to reproduce scenarios.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Thu, 18 May 2017 04:22:03 +0000 (14:22 +1000)]
st/mesa: improve shader cache debug info
This will explicitly state that we are following the fallback
path when we find invalid/corrupt cache items. It will also
output the fallback message when the fallback path is forced
via an environment variable, the following patches will allow
this.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Emil Velikov [Thu, 4 May 2017 10:05:27 +0000 (11:05 +0100)]
travis: remove workarounds for the Vulkan target
Previously we required --enable-egl for the platform selection to work.
Additionally due to the broken DRI3 dependency tracking we needed
--enable-glx.
Since both of these are now sorted now we no longer need the
workarounds.
While we're here, explicitly enable dri3.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Wed, 7 Dec 2016 14:43:04 +0000 (14:43 +0000)]
configure: trivial whitespace cleanup
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Wed, 7 Dec 2016 14:42:00 +0000 (14:42 +0000)]
configure: error out if building XVMC w/o supported platform
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Wed, 7 Dec 2016 14:40:39 +0000 (14:40 +0000)]
configure: error out if building VDPAU w/o supported platform
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Wed, 7 Dec 2016 14:38:10 +0000 (14:38 +0000)]
configure: error out if building OMX w/o supported platform
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Wed, 7 Dec 2016 14:32:45 +0000 (14:32 +0000)]
configure: error out if building VA w/o supported platform
A bit pedantic patch to fool proof should someone start thinkering
without knowing what they do.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Fri, 25 Nov 2016 17:43:00 +0000 (17:43 +0000)]
st/xvmc: add DRI3 support
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Ilia Mirkin <imirkin@alum.mit.edu>