Lionel Landwerlin [Fri, 2 Mar 2018 14:45:56 +0000 (14:45 +0000)]
mesa: add INTEL_blackhole_render
v2: Implement missing Enable/Disable (Emil)
v3: Drop unused NewIntelBlackholeRender (Ken)
v4: Bring back NewIntelBlackholeRender as i965 implementation uses it
again (Lionel)
v5: Drop atom (Ken)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2964>
Thong Thai [Thu, 13 Feb 2020 16:03:12 +0000 (11:03 -0500)]
Revert "st/va: Convert interlaced NV12 to progressive"
This reverts commit
2add63060b51ea2ae432d10e1bd52d6cc0a4dcbb.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2454
Fixes: 2add63060b51 "st/va: Convert interlaced NV12 to progressive"
Signed-off-by: Thong Thai <thong.thai@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3815>
Jason Ekstrand [Wed, 12 Feb 2020 16:22:39 +0000 (10:22 -0600)]
anv: Reject modifiers on depth/stencil formats
6790397346cc added code which attempts to reject modifiers on
depth/stencil formats but it was placed after the early return for depth
and stencil aspects. This commit moves it up so it actually works.
Of course, this doesn't actually matter because the only user of any of
the modifiers stuff is the WSI code and it will never do anything with
depth/stencil.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3794>
Krzysztof Raszkowski [Thu, 13 Feb 2020 13:41:41 +0000 (14:41 +0100)]
gallium/swr: fix rdtsc debug statistics mechanism
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3812>
Rhys Perry [Wed, 5 Feb 2020 15:14:02 +0000 (15:14 +0000)]
gitlab-ci: remove load_store_vectorizer from expected s390x test failures
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
Rhys Perry [Tue, 4 Feb 2020 11:42:17 +0000 (11:42 +0000)]
nir: fix nir_const_value_as_uint bit size in load/store vectorizer tests
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3690>
Erik Faye-Lund [Wed, 12 Feb 2020 11:48:37 +0000 (12:48 +0100)]
Revert "nir: Add a couple trivial abs optimizations"
These were already added in
9fdaeb7776c ("nir: add min/max optimisation"),
and there's no point in doing them twice.
This reverts commit
e4d346c86db0ae332fcdf55eac0e075cfb99a7eb.
Fixes: e4d346c86db ("nir: Add a couple trivial abs optimizations")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3786>
Tapani Pälli [Wed, 12 Feb 2020 06:45:47 +0000 (08:45 +0200)]
iris: fix aux buf map failure in 32bits app on Android
Cc: mesa-stable@lists.freedesktop.org
Reported-by: Zhifang Long <zhifang.long@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3784>
Samuel Pitoiset [Wed, 12 Feb 2020 14:36:51 +0000 (15:36 +0100)]
radv: remove unused RADV_HASH_SHADER_IS_GEOM_COPY_SHADER
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
Samuel Pitoiset [Wed, 12 Feb 2020 14:35:49 +0000 (15:35 +0100)]
radv: remove RADV_DEBUG=nosisched and RADV_PERFTEST=sisched
They are no longer useful.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
Samuel Pitoiset [Wed, 12 Feb 2020 14:25:52 +0000 (15:25 +0100)]
radv: remove LLVM sicheduler enable for The Talos Principle
sisched is completely unmaintained, it used to give few more FPS
in the past but with ACO, it's now obsolete. It seems even faster
without sisched now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3789>
Tapani Pälli [Mon, 27 Jan 2020 08:05:20 +0000 (10:05 +0200)]
glsl: fix a memory leak with resource_set
==7265== 248 (120 direct, 128 indirect) bytes in 1 blocks are definitely lost in loss record 1,438 of 1,465
==7265== at 0x483980B: malloc (vg_replace_malloc.c:309)
==7265== by 0x598A2AB: ralloc_size (ralloc.c:119)
==7265== by 0x598F861: _mesa_set_create (set.c:127)
==7265== by 0x599079D: _mesa_pointer_set_create (set.c:570)
==7265== by 0x58BD7D1: build_program_resource_list(gl_context*, gl_shader_program*, bool) (linker.cpp:4026)
==7265== by 0x548231B: st_link_shader (st_glsl_to_ir.cpp:170)
==7265== by 0x54DA269: _mesa_glsl_link_shader (ir_to_mesa.cpp:3119)
Fixes: a6aedc66 ("st/glsl_to_nir: use nir based program resource list builder")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3574>
Samuel Pitoiset [Fri, 13 Sep 2019 11:40:44 +0000 (13:40 +0200)]
radv: implement VK_EXT_line_rasterization
Only Bresenham lines are supported. GFX9 is currently disabled
because there is some CTS failures for some weird reasons.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
Samuel Pitoiset [Thu, 5 Dec 2019 16:28:47 +0000 (17:28 +0100)]
radv: fix line width range and granularity
The hardware supports wide lines and the granularity is way larger.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2982>
Connor Abbott [Fri, 31 Jan 2020 16:47:48 +0000 (17:47 +0100)]
tu: Force sysmem with mipmapped non-aligned linear stores
Fixes hangs with
dEQP-VK.api.image_clearing.core.clear_color_image.1d.linear.single_layer.r8g8b8a8_unorm
and many others on a640, and presumably silent corruption with a630.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Mon, 10 Feb 2020 15:07:33 +0000 (16:07 +0100)]
tu: Support input attachments with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Thu, 6 Feb 2020 16:57:20 +0000 (17:57 +0100)]
tu: Support resolve ops with sysmem rendering
Similar to vkCmdClearAttachments(), we use CP_COND_REG_EXEC to
conditionally execute both the gmem and sysmem paths, except for after
the last subpass where it's known whether we're using sysmem rendering
or not.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Thu, 6 Feb 2020 14:55:05 +0000 (15:55 +0100)]
tu: Handle vkCmdClearAttachments() with sysmem
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Thu, 6 Feb 2020 15:31:10 +0000 (16:31 +0100)]
tu: Add helper for CP_COND_REG_EXEC
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Mon, 3 Feb 2020 13:25:41 +0000 (14:25 +0100)]
tu: Sysmem rendering
This has only lightly been tested. It passes dEQP-VK.api.smoke.triangle,
so at least we're able to show a triangle. For now, it's just enabled
under a debug flag. In the future we'll probably want some heuristics
like what freedreno has and another debug flag to disable it except when
it's forced.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Wed, 12 Feb 2020 11:25:26 +0000 (12:25 +0100)]
tu: Disable linear depth attachments
Also, disable importing depth/stencil textures.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Fri, 7 Feb 2020 12:43:48 +0000 (13:43 +0100)]
tu: Support multisample image clears
We may need shader workarounds for some formats, but for now this seems
to work at least as well as the gmem path for clearing multisample
attachments. And soon we'll start calling this even on the gmem path,
since we leave the final decision of whether to use sysmem or not up
till the end, so we can't have it assert or otherwise working tests
would assert.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Tue, 4 Feb 2020 12:26:59 +0000 (13:26 +0100)]
tu/blit: Support blits in secondary cmdstreams
For sysmem rendering we'll have to emit a delayed clear IB to implement
LOAD_OP_*, similar to the existing tile_load_ib.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Wed, 5 Feb 2020 11:54:42 +0000 (12:54 +0100)]
tu: Properly set UBWC flags in RB_RENDER_CNTL
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Connor Abbott [Wed, 5 Feb 2020 16:18:47 +0000 (17:18 +0100)]
tu: Don't emit initial render target state in tile_load_ib
Emitting it directly in CmdBeginRenderPass should be around the same,
except that now we can easily share it with the sysmem path.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3713>
Peng Huang [Sun, 2 Feb 2020 03:31:00 +0000 (22:31 -0500)]
radeonsi: make si_fence_server_signal flush pipe without work
glSignalSemaphoreEXT sometime doesn't signal the semaphore, it is
because radeonsi doesn't flush if gl context doesn't have pending
work. Fix the porblem by always submit ib.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3779>
Chad Versace [Fri, 7 Feb 2020 01:53:49 +0000 (17:53 -0800)]
turnip: Add a618 support
I merely ported a freedreno patch to turnip which
updates some magic regsiter values.
commit
ff6e148a3d60e6e7f3b33f134228b1ed4216903e
Author: Rob Clark <robdclark@chromium.org>
CommitDate: Tue Oct 29 09:19:34 2019 -0700
Subject: freedreno/a6xx: add a618 support
That's all that Rob did for gallium for a618, so I assume that's we need
for turnip also.
Tested manually with:
dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.*
pass 300/555
fail 0/555
skip 255/555
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
Chad Versace [Fri, 7 Feb 2020 01:47:59 +0000 (17:47 -0800)]
turnip: Add magic register values to tu_physical_device
The value of some magic regsiters differ across chipsets. fd6_context
manages the differences by initializing them at runtime. Let's do the
same.
Add to tu_physical_device a subset of those found in fd6_context:
RB_UNKNOWN_8E04_blit
RB_CCU_CNTL_gmem
PC_UNKNOWN_9805
SP_UNKNOWN_A0F8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3743>
Jonathan Marek [Wed, 12 Feb 2020 19:16:16 +0000 (14:16 -0500)]
freedreno/a6xx: use single format enum
Loses some information about which formats can be used in which cases, but
we encode that information in the format table anyway.
Important notes:
* RB6_R10G10B10A2_UNORM becomes FMT6_R10G10B10A2_UNORM_DEST
* TFMT6_8_8_8_UNORM becomes FMT6_8_8_8_X8_UNORM (not FMT6_8_8_8_UNORM)
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3798>
Chad Versace [Wed, 30 Oct 2019 16:15:48 +0000 (09:15 -0700)]
anv: Respect ISL_SURF_USAGE_DISABLE_AUX_BIT in make_surface()
If set, then don't make the aux surface.
Only anv_android.c used the flag, but anv_image.c fully ignored it.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3797>
Chad Versace [Thu, 24 Oct 2019 21:21:02 +0000 (14:21 -0700)]
anv: Clarify behavior of anv_image_aspect_to_plane()
It returns the aspect's _format_ plane, not its _memory_ plane (using the
vocabulary of VK_EXT_image_drm_format_modifier).
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3796>
Chad Versace [Thu, 24 Oct 2019 23:00:17 +0000 (16:00 -0700)]
anv: Delete anv_image::ccs_e_compatible
It was set exactly once, and read exactly once, both times during
anv_image_create().
I found its permanency as a member of anv_image to be distracting while
implementing VK_EXT_image_drm_format_modifier.
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3795>
Rhys Perry [Tue, 28 Jan 2020 12:05:26 +0000 (12:05 +0000)]
aco: improve SCC handling in some SALU combines
Add some checks and remove some unnecessary checks.
Found by observation. No pipeline-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
Rhys Perry [Tue, 28 Jan 2020 12:04:48 +0000 (12:04 +0000)]
aco: disable some instruction combining if it could change an exec operand
Found by observation. No pipeline-db changes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3599>
Arcady Goldmints-Orlov [Fri, 7 Feb 2020 20:18:49 +0000 (14:18 -0600)]
Rename nir_lower_constant_initializers to nir_lower_variable_initalizers
This is naming is more clear as nir_variables can be initializes not
just with a nir_constant but with a pointer to another nir_variable.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
Arcady Goldmints-Orlov [Tue, 10 Dec 2019 20:53:15 +0000 (15:53 -0500)]
compiler/spirv: Add support for non-constant initializers
This adds support for OpVariable having an initializer that points to
another variable, rather than a constant. In this case, the variable is
initialized to a pointer to the other variable.
Fixes Vulkan CTS tests:
dEQP-VK.spirv_assembly.instruction.compute.variable_init.private.*
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
Arcady Goldmints-Orlov [Tue, 10 Dec 2019 20:37:53 +0000 (15:37 -0500)]
compiler/nir: Add support for variable initialization from a pointer
Add a pointer_initializer field to nir_variable analogous to
constant_initializer, which can be used to initialize the nir_variable
to a pointer to another nir_variable. Just like the
constant_initializer, the pointer_initializer gets eliminated in the
nir_lower_constant_initializers pass.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3047>
Veerabadhran [Wed, 5 Feb 2020 14:03:01 +0000 (19:33 +0530)]
radeon/vce: Move global function pointer si_get_pic_param to local encoder structure
Multi gpu use case broken when the function was global
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3731>
Chad Versace [Mon, 4 Nov 2019 23:42:08 +0000 (15:42 -0800)]
anv: Rename param make_surface::dev to device
Everywhere in anvil, each variable of type anv_device is named 'device',
except this single instance. Rename it for consistency.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
Chad Versace [Mon, 14 Oct 2019 19:07:23 +0000 (12:07 -0700)]
anv: Drop unused anv_image_get_surface_for_aspect_mask()
Replaced by anv_image.c:get_surface() in:
commit
a62a97933578a813beb0d27cc8e404850f7fd302
Author: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
CommitDate: Fri Oct 6 16:32:20 2017 +0100
Subject: anv: enable multiple planes per image/imageView
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3773>
Michel Dänzer [Mon, 10 Feb 2020 11:13:04 +0000 (12:13 +0100)]
gitlab-ci: Only use gstreamer runners for the s390x job for now
The fdo-packet-* runners keep hitting the (already quite long) timeouts
for some of the tests, taking many times as long for them as the
gstreamer runners.
The fdo-gitlab-gce-runner3 runner would work as well, but it doesn't
have any tags we could use.
Acked-by: Daniel Stone <daniels@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3760>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3760>
Samuel Pitoiset [Tue, 4 Feb 2020 16:25:35 +0000 (17:25 +0100)]
nir: do not use De Morgan's Law rules for flt and fge
In presence of NaNs, "!(flt(a, b) && flt(c, d))" is NOT EQUAL
to "fge(a, b) || fge(c, d)". These optimizations are unsafe for
apps that rely on NaN behaviour.
pipeline-db (GFX9/LLVM):
Totals from affected shaders:
SGPRS: 3176 -> 3136 (-1.26 %)
VGPRS: 2188 -> 2144 (-2.01 %)
Spilled SGPRs: 227 -> 169 (-25.55 %)
Code Size: 150572 -> 151800 (0.82 %) bytes
Max Waves: 307 -> 310 (0.98 %)
pipeline-db (GFX9/ACO):
Totals from affected shaders:
SGPRS: 18744 -> 18744 (0.00 %)
VGPRS: 15576 -> 15580 (0.03 %)
Spilled SGPRs: 164 -> 164 (0.00 %)
Code Size:
1573012 ->
1576492 (0.22 %) bytes
Max Waves: 1534 -> 1532 (-0.13 %)
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2127
Fixes: d1ed4ffe0b7 ("nir: Use De Morgan's Law on logic compounded comparisons")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3696>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3696>
Samuel Pitoiset [Mon, 10 Feb 2020 11:13:15 +0000 (12:13 +0100)]
aco: fix creating v_madak if v_mad_f32 has two sgpr literals
Do not ignore that src1 can be a sgpr.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2435
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3759>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3759>
Samuel Pitoiset [Fri, 31 Jan 2020 13:36:37 +0000 (14:36 +0100)]
radv: set the chip name to GCN-NOOP when RADV_FORCE_FAMILY is set
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
Samuel Pitoiset [Fri, 31 Jan 2020 13:35:54 +0000 (14:35 +0100)]
radv: make sure to not submit any IBs when RADV_FORCE_FAMILY is set
To prevent GPU hangs.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3654>
Bas Nieuwenhuizen [Thu, 6 Feb 2020 15:52:52 +0000 (16:52 +0100)]
radv: Do not redundantly set the RB+ regs on pipeline switch.
No significant perf changes seen on Bayonetta. (Changes are in the
noise on my Raven Laptop)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3735>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3735>
Vinson Lee [Fri, 7 Feb 2020 21:25:12 +0000 (13:25 -0800)]
panfrost: Remove unused anonymous enum variables.
This patch fix these build errors with GCC 10.
/usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:52: multiple definition of `pan_sysval'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:52: first defined here
/usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:68: multiple definition of `pan_special_attributes'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:68: first defined here
Fixes: 7e8de5a707f7 ("panfrost: Implement system values")
Fixes: 306800d747bc ("pan/midgard: Lower gl_VertexID/gl_InstanceID to attributes")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752>
Bas Nieuwenhuizen [Sat, 18 Jan 2020 22:32:46 +0000 (23:32 +0100)]
radv: Optimize emitting index buffer changes.
Since the direct indexed draw packet has the address/count info
inline, there is no sense in emitting the base and size.
No real significant changes found during benchmarks.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3466>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3466>
Ian Romanick [Thu, 15 Aug 2019 23:24:52 +0000 (16:24 -0700)]
nir: Mark fmin and fmax as commutative and associative
Per the resolution of Khronos GLSL issue 80
(https://github.com/KhronosGroup/GLSL/issues/80). Spec updates have not
landed yet, but I'll get to it soon. :)
The extra hurt shaders on Gen8+ are a handful of shaders that see things like
bcsel(fmin(b - a, a - c) >= 0, x, y)
converted to
bcsel(a >= b && c >= a, x, y)
The former can be generated as a CSEL instruction. If either b - a or a
- c is used elsewhere in the shader, this saves an instruction.
All Haswell+ platforms had similar results. (Ice Lake shown)
total instructions in shared programs:
14550188 ->
14550048 (<.01%)
instructions in affected programs: 12168 -> 12028 (-1.15%)
helped: 30
HURT: 3
helped stats (abs) min: 1 max: 17 x̄: 4.77 x̃: 2
helped stats (rel) min: 0.05% max: 3.85% x̄: 1.77% x̃: 1.80%
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 0.50% max: 0.50% x̄: 0.50% x̃: 0.50%
95% mean confidence interval for instructions value: -6.15 -2.33
95% mean confidence interval for instructions %-change: -2.00% -1.12%
Instructions are helped.
total cycles in shared programs:
203770286 ->
203771464 (<.01%)
cycles in affected programs: 688466 -> 689644 (0.17%)
helped: 172
HURT: 220
helped stats (abs) min: 1 max: 286 x̄: 12.15 x̃: 6
helped stats (rel) min: 0.03% max: 5.97% x̄: 0.70% x̃: 0.35%
HURT stats (abs) min: 1 max: 578 x̄: 14.85 x̃: 6
HURT stats (rel) min: 0.03% max: 32.36% x̄: 1.21% x̃: 0.52%
95% mean confidence interval for cycles value: -0.74 6.75
95% mean confidence interval for cycles %-change: 0.15% 0.59%
Inconclusive result (value mean confidence interval includes 0).
total fills in shared programs: 4525 -> 4523 (-0.04%)
fills in affected programs: 48 -> 46 (-4.17%)
helped: 1
HURT: 0
Ivy Bridge
total instructions in shared programs:
11858995 ->
11858898 (<.01%)
instructions in affected programs: 10822 -> 10725 (-0.90%)
helped: 25
HURT: 13
helped stats (abs) min: 1 max: 17 x̄: 5.32 x̃: 2
helped stats (rel) min: 0.40% max: 5.00% x̄: 2.16% x̃: 1.85%
HURT stats (abs) min: 1 max: 15 x̄: 2.77 x̃: 2
HURT stats (rel) min: 0.47% max: 2.90% x̄: 1.83% x̃: 2.15%
95% mean confidence interval for instructions value: -4.66 -0.45
95% mean confidence interval for instructions %-change: -1.54% -0.05%
Instructions are helped.
total cycles in shared programs:
177947023 ->
177946880 (<.01%)
cycles in affected programs: 822075 -> 821932 (-0.02%)
helped: 157
HURT: 175
helped stats (abs) min: 1 max: 164 x̄: 13.17 x̃: 4
helped stats (rel) min: 0.03% max: 6.72% x̄: 0.64% x̃: 0.17%
HURT stats (abs) min: 1 max: 308 x̄: 11.00 x̃: 4
HURT stats (rel) min: 0.03% max: 9.76% x̄: 0.70% x̃: 0.18%
95% mean confidence interval for cycles value: -3.86 3.00
95% mean confidence interval for cycles %-change: -0.09% 0.22%
Inconclusive result (value mean confidence interval includes 0).
total spills in shared programs: 4185 -> 4188 (0.07%)
spills in affected programs: 146 -> 149 (2.05%)
helped: 0
HURT: 1
total fills in shared programs: 5248 -> 5249 (0.02%)
fills in affected programs: 347 -> 348 (0.29%)
helped: 0
HURT: 1
Sandy Bridge
total instructions in shared programs:
10680224 ->
10680144 (<.01%)
instructions in affected programs: 4702 -> 4622 (-1.70%)
helped: 15
HURT: 3
helped stats (abs) min: 1 max: 17 x̄: 5.53 x̃: 5
helped stats (rel) min: 0.39% max: 4.76% x̄: 2.17% x̃: 1.67%
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 0.52% max: 0.52% x̄: 0.52% x̃: 0.52%
95% mean confidence interval for instructions value: -7.24 -1.65
95% mean confidence interval for instructions %-change: -2.55% -0.89%
Instructions are helped.
total cycles in shared programs:
152988780 ->
152985691 (<.01%)
cycles in affected programs:
1072850 ->
1069761 (-0.29%)
helped: 168
HURT: 145
helped stats (abs) min: 1 max: 592 x̄: 33.90 x̃: 12
helped stats (rel) min: 0.02% max: 10.73% x̄: 0.90% x̃: 0.31%
HURT stats (abs) min: 1 max: 259 x̄: 17.98 x̃: 6
HURT stats (rel) min: 0.02% max: 8.17% x̄: 0.77% x̃: 0.19%
95% mean confidence interval for cycles value: -17.95 -1.79
95% mean confidence interval for cycles %-change: -0.34% 0.08%
Inconclusive result (%-change mean confidence interval includes 0).
Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs:
8107033 ->
8107025 (<.01%)
instructions in affected programs: 696 -> 688 (-1.15%)
helped: 5
HURT: 0
helped stats (abs) min: 1 max: 2 x̄: 1.60 x̃: 2
helped stats (rel) min: 0.34% max: 7.14% x̄: 3.47% x̃: 4.65%
95% mean confidence interval for instructions value: -2.28 -0.92
95% mean confidence interval for instructions %-change: -7.22% 0.28%
Inconclusive result (%-change mean confidence interval includes 0).
total cycles in shared programs:
188348526 ->
188348404 (<.01%)
cycles in affected programs: 33618 -> 33496 (-0.36%)
helped: 23
HURT: 0
helped stats (abs) min: 2 max: 12 x̄: 5.30 x̃: 6
helped stats (rel) min: 0.05% max: 1.83% x̄: 0.47% x̃: 0.51%
95% mean confidence interval for cycles value: -6.70 -3.91
95% mean confidence interval for cycles %-change: -0.64% -0.30%
Cycles are helped.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1359>
Eric Anholt [Wed, 5 Feb 2020 18:38:57 +0000 (10:38 -0800)]
Revert "gallium: Fix big-endian addressing of non-bitmask array formats."
This reverts the functional part of commit
d17ff2f7f1864c81c1e00d04baf20f953c6d276a, leaving the unit test for
mesa/pipe agreement on what's an array.
The issue is that the util_channel_desc.shift values on array formats are
not used for bit addressing in memory, they're bit addressing within a
word treating a pixel of the format as a native type, as seen by
llvmpipe's use of the values to do shifts (see
lp_build_unpack_arith_rgba_aos() for example). This means the values are
nonsensical for 3-byte RGB, but then llvmpipe doesn't expose those formats
so it works out.
I still want to clean up our big-endian format handling at some point, but
let's fix the s390x regression first, sort out our format unit tests in
CI, then be able to refactor with confidence.
Fixes: d17ff2f7f186 ("gallium: Fix big-endian addressing of non-bitmask array formats.")
Closes: #2472
Acked-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3721>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3721>
Marek Olšák [Tue, 21 Jan 2020 01:32:02 +0000 (20:32 -0500)]
st/mesa: optimize st_update_array with ALWAYSINLINE
The time spent in st_update_array is reduced by 5-10%.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Tue, 4 Feb 2020 01:44:04 +0000 (20:44 -0500)]
mesa: don't use bitfields in _mesa_prim
This is better.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Tue, 4 Feb 2020 01:40:09 +0000 (20:40 -0500)]
mesa: remove unused _mesa_prim::is_indirect
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Tue, 4 Feb 2020 01:34:06 +0000 (20:34 -0500)]
í965: don't use _mesa_prim::is_indirect
the vbo change only affects i965
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Tue, 4 Feb 2020 01:20:05 +0000 (20:20 -0500)]
vbo: merge use_buffer_objects into vbo_CreateContext to skip the big malloc
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Tue, 4 Feb 2020 00:43:42 +0000 (19:43 -0500)]
vbo: clean up resetting vertex attribs
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Sat, 1 Feb 2020 01:50:42 +0000 (20:50 -0500)]
vbo: also map the immediate mode buffer for read
because we read from it sometimes and we want cached reads.
We can only do it with the persistent mapping, because the non-persistent
mapping uses incompatible flags.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Sat, 1 Feb 2020 01:33:14 +0000 (20:33 -0500)]
vbo: delay flagging FLUSH_STORED_VERTICES until glEnd
Only state changes see this, which can't occur before glEnd.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Sat, 1 Feb 2020 01:32:05 +0000 (20:32 -0500)]
vbo: add/update unlikely statements in ATTR_UNION
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Fri, 31 Jan 2020 00:41:02 +0000 (19:41 -0500)]
vbo: increase the size of the immediate mode buffer to decrease draw count
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 30 Jan 2020 22:49:13 +0000 (17:49 -0500)]
vbo: use FlushVertices flags properly and clear NeedFlush correctly
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Fri, 31 Jan 2020 21:26:42 +0000 (16:26 -0500)]
vbo: fix resizing 64-bit vertex attributes
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 30 Jan 2020 03:09:20 +0000 (22:09 -0500)]
vbo: optimize resizing vertex attributes during immediate mode
Just move data manually instead of copying all attributes back and forth.
This increases performance by 5% for Viewperf11/Catia - first scene.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 23 Jan 2020 00:55:05 +0000 (19:55 -0500)]
vbo: don't store glVertex values temporarily into exec
This improves performance by 4.3% in Viewperf11/Catia, first scene.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Sat, 25 Jan 2020 03:17:09 +0000 (22:17 -0500)]
vbo: pass only either uint32_t or uint64_t into ATTR_UNION
This makes the next commit possible.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 23 Jan 2020 00:19:25 +0000 (19:19 -0500)]
vbo: don't set FLUSH_UPDATE_CURRENT for glVertex
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Wed, 22 Jan 2020 23:07:02 +0000 (18:07 -0500)]
vbo: keep the immediate mode buffer always mapped for simplicity
It only unmaps when it draws with a non-persistent buffer.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 23 Jan 2020 02:32:34 +0000 (21:32 -0500)]
vbo: don't check ctx->NewState twice in glBegin
_mesa_valid_to_render does it too.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 23 Jan 2020 02:27:02 +0000 (21:27 -0500)]
vbo: remove a funky recursive call in glBegin
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 23 Jan 2020 02:14:31 +0000 (21:14 -0500)]
vbo: interleave attrsz, attrtype, and active_sz in memory
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Wed, 22 Jan 2020 23:49:51 +0000 (18:49 -0500)]
vbo: remove immediate mode code that doesn't do anything and simplify stuff
no change in behavior
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Wed, 22 Jan 2020 21:20:59 +0000 (16:20 -0500)]
vbo: don't unmap persistent buffer mappings for glBegin/End
This significantly improves performance by lowering CPU overhead.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Wed, 22 Jan 2020 21:18:16 +0000 (16:18 -0500)]
vbo: skip FlushMappedBufferRange for glBegin/End by using a persistent mapping
This is a preparation for the next commit and just isolates the removal
of GL_MAP_FLUSH_EXPLICIT_BIT and other map flags that don't make sense with
UNSYNCHRONIZED.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Wed, 29 Jan 2020 21:09:24 +0000 (16:09 -0500)]
vbo: create the immediate mode buffer only in vbo_exec_vtx_map
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Tue, 21 Jan 2020 02:35:54 +0000 (21:35 -0500)]
mesa: import PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET handling
This should decrease overhead in st_update_array.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 23 Jan 2020 00:11:22 +0000 (19:11 -0500)]
mesa: remove FLUSH_CURRENT calls that have no effect
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Thu, 23 Jan 2020 00:09:23 +0000 (19:09 -0500)]
mesa: fix incorrect uses of FLUSH_CURRENT
FLUSH_CURRENT is used to copy attributes from the vbo module to
Current.Attrib. It flushes vertices too, but that's a side effect,
not the intent.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3766>
Marek Olšák [Fri, 24 Jan 2020 02:01:56 +0000 (21:01 -0500)]
glx: print FPS with 2 decimal places
useful if FPS is low.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3590>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3590>
Marek Olšák [Thu, 30 Jan 2020 21:59:39 +0000 (16:59 -0500)]
radeonsi: don't update states for the DCC MSAA bug on GFX6-7
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
Marek Olšák [Thu, 30 Jan 2020 21:58:15 +0000 (16:58 -0500)]
radeonsi: fix the DCC MSAA bug workaround
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3646>
Gert Wollny [Sat, 28 Dec 2019 17:23:19 +0000 (18:23 +0100)]
r600/sfn: Add some documentation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Sat, 28 Dec 2019 17:22:58 +0000 (18:22 +0100)]
r600/sfn: Add .editorconfig file
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Sat, 28 Dec 2019 15:48:45 +0000 (16:48 +0100)]
r600/sfn: Add support for SSBO load and store
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Sat, 28 Dec 2019 15:19:03 +0000 (16:19 +0100)]
r600/sfn: Add support for atomic instructions
v2: fix compilation with gcc-6
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 20:24:11 +0000 (21:24 +0100)]
r600: Make sure LLVM is not used for DRAW
For some reasone that is not yet clear the piglit
gl-1.0-rendermode-feedback makes use of the LLVM pipe draw module and
fails there with an assertion. Explicietly disabling LLVM fixes this.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: Add lowering UBO access to r600 specific codes
r600 reads vec4 from the UBO, but the offsets in nir are evaluated to the component.
If the offsets are not literal then all non-vec4 reads must resolve the component
after reading a vec4 component (TODO: figure out whether there is a consistent way
to deduct the component that is actually read).
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: Add GDS instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: Add compute shader skeleton
This adds some very basic compute shader support.
v2: fix compilation with gcc-6
v3: rebase: correct barrier intrinstic
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: Add VS for TCS shader skeleton
This adds the VS shader type that handles the output to tesselation shaders
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: Add support for geometry shader
v2: fix compilation with gcc-6
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: add emitVertex instructions
More preparation for GS support
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: Add MemRingOut instructions
Preparing support for Geometry shaders.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:27 +0000 (17:49 +0100)]
r600/sfn: Add a load GDS result instruction
This is required to read results for atomic SSBO instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:26 +0000 (17:49 +0100)]
r600/sfn: Add lowering arrays to scratch and according instructions
Make use of the scratch space for arrays that are larger then 100 elements.
Since for IO r600 is vector based, there is a bit of a scratch space waste
here for arrays that use types smaller then vec4.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:26 +0000 (17:49 +0100)]
r600/sfn: add register remapping
Make use of the live range evaluation to merge registers. Since the
live ranges are evaluated for register indices, the algorithm is not
optimal, but for most piglits up to glsl-3.3 it does the job.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:26 +0000 (17:49 +0100)]
r600/sfn: add live range evaluation for the GPR
The algoritm is basically a copy of the TGSI implementation without the
array bits.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:26 +0000 (17:49 +0100)]
r600/sfn: Add the WaitAck instruction
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Fri, 27 Dec 2019 16:49:26 +0000 (17:49 +0100)]
r600/sfn: Add the VS in and FS out vectorization
Since the nir default implementation doesn't support vectorizing the VS
inputs and FS outputs, additional lowering passes are added here to do
just that. The work is based on the Timothy Arceri's related work.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Sat, 28 Dec 2019 14:34:43 +0000 (15:34 +0100)]
r600: enable NIR backend DEBUG flag for supported architectures
When NIR is enabled, a few features that are not yet supported will be
explicitely disabled.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>
Gert Wollny [Sun, 1 Dec 2019 19:38:07 +0000 (20:38 +0100)]
r600/sfn: Add a basic nir shader backend
This commit adds support for vertex and fragment shaders from NIR, and
support for most TEX and ALU instructions.
Thanks Dave Airlied for adding support for a number of ALU instructions.
v2: fix compilation with gcc-6
v3: rebase: use mesa/core glsl_type_size function
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3225>