spirv: fixup signature

This avoids a warning on some compiler, complaining about implicitly
casting the function-pointer.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: d482a8f "spirv: Update the OpenCL.std.h header"
Acked-by: Eric Engestrom <eric@engestrom.ch>

etnaviv: remember data offset into BO

Imported resources might not start at offset 0 into the buffer object.
Make sure to remember the offset that is provided with the handle on
import.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

i965: Emit a dummy MEDIA_VFE_STATE before switching from GPGPU to 3D

There is an object-level  preemption workaround which requires this.
However, even without object-level preemption, we seem to have issues
with geometry flickering when 3D and compute are combined in the same
batch and this appears to fix it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110395
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org

radv: Avoid VEGA/RAVEN scissor bug in binning.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Avoid binning RAVEN hangs.

Mirroring radeonsi.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Fix off by one for S_028C48_MAX_ALLOC_COUNT.

Reviewed-by: Dave Airlie <airlied@redhat.com>

swr/rasterizer: modernize thread TLB

Reviewed-by: Alok Hota <alok.hota@intel.com>

swr/rasterizer: Refactor events collection mechanism

Several improvements and cleanups in events and statstics mechanisms

Reviewed-by: Alok Hota <alok.hota@intel.com>

swr/rasterizer: improvements in simdlib

1. fix build issues with MSVC 2019 compiler

The MSVC 2019 compiler seems to have an issue with optimized code-gen
when using the _mm256_and_si256() intrinsic.
Only disable use of integer vpand on buggy versions MSVC 2019.
Otherwise allow use of integer vpand intrinsic.

2. Remove unused vec/matrix functionality

Reviewed-by: Alok Hota <alok.hota@intel.com>

swr/rasterizer: Events are now grouped and enabled by knobs

All events are now grouped as follows:

-Framework (i.e. ThreadStart) [always ON]
-Api (i.e. SwrSync) [always ON]
-Pipeline [default ON]
-Shader [default ON]
-SWTag [default OFF]
-Memory [default OFF]

Reviewed-by: Alok Hota <alok.hota@intel.com>

swr/rasterizer: do not mark tiles dirty until actually rendered

Reviewed-by: Alok Hota <alok.hota@intel.com>

swr/rasterizer: enable size accumulation in mem stats

Small refactoring is also performed

Reviewed-by: Alok Hota <alok.hota@intel.com>

swr/rasterizer: enable using AOS vertex data format

Reviewed-by: Alok Hota <alok.hota@intel.com>

v3d: handle wait requirement when retrieving query results correctly

Reviewed-by: Eric Anholt <eric@anholt.net>

v3d: use the GPU to record primitives written to transform feedback

We can use the PRIMITIVE_COUNTS_FEEDBACK packet to write various primitive
counts to a buffer, including the number of primives written to transform
feedback buffers, which will handle buffer overflow correctly.

There are a couple of caveats with this:

Primitive counters are reset when we emit a 'Tile Binning Mode Configuration'
packet, which can happen in the middle of a primitives query, so we need to
read the buffer when we submit a job and accumulate the counts in the context
so we don't lose them.

We also need to do the same when we switch primitive type during transform
feedback so we can compute the correct number of recorded vertices from
the number of primitives. This is necessary so we can provide an accurate
vertex count for draw from transform feedback.

v2:
 - When computing the number of vertices for a primitive, pass in the base
   primitive, since that is what the hardware will count.
 - No need to update primitive counts when switching primitive types if
   the base primitives are the same.
 - Log perf warning when mapping the primitive counts BO for readback (Eric).
 - Only emit the primitive counts packet once at job end (Eric).
 - Use u_upload mechanism for the primitive counts buffer (Eric).
 - Use the XML to generate indices into the primitive counters buffer (Eric).

Fixes piglit tests:
spec/ext_transform_feedback/overflow-edge-cases
spec/ext_transform_feedback/query-primitives_written-bufferrange
spec/ext_transform_feedback/query-primitives_written-bufferrange-discard
spec/ext_transform_feedback/change-size base-shrink
spec/ext_transform_feedback/change-size base-grow
spec/ext_transform_feedback/change-size offset-shrink
spec/ext_transform_feedback/change-size offset-grow
spec/ext_transform_feedback/change-size range-shrink
spec/ext_transform_feedback/change-size range-grow
spec/ext_transform_feedback/intervening-read prims-written

Reviewed-by: Eric Anholt <eric@anholt.net>

gallium/util: add a helper to compute vertex count from primitive count

v2:
  - Only compute vertex counts for base primitives.
  - Add a unit test (Eric)

Reviewed-by: Eric Anholt <eric@anholt.net>

v3d: be more explicit about the query types supported

Reviewed-by: Eric Anholt <eric@anholt.net>

v3d: generate packet unpack functions

These were not being compiled because of the lack of __gen_unpack_address.

v2:
 - Shift raw address correctly (Eric).

Reviewed-by: Eric Anholt <eric@anholt.net>

v3d: add header guards in v3d_packet_helpers.h

Reviewed-by: Eric Anholt <eric@anholt.net>

panfrost: Print errors from kernel

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Mark buffers as PANFROST_BO_HEAP

What we call GROWABLE in Mesa corresponds to the HEAP BO flag in the
kernel. These buffers cannot be memory mapped in the CPU side at the
moment, so make sure they are also marked INVISIBLE.

This allows us to allocate a big heap upfront (16MB) without actually
reserving space unless it's needed.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Mark BOs as NOEXEC

Unless a BO has the EXECUTABLE flag, mark it as NOEXEC.

v2: - Rework version detection (Alyssa).

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Take into account flags when looking up in the BO cache

This will be useful right now so we avoid retrieving a non-executable
buffer when a executable one is needed.

As we support more flags, this logic will need to be extended to
consider the different trade-offs to be made when matching BO
specifications to BOs in the cache.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

panfrost: Allocate shaders in their own BOs

Instead of all shaders being stored in a single BO, have each shader in
its own.

This removes the need for a 16MB allocation per context, and allows us
to place transient blend shaders in BOs marked as executable (before
they were allocated in the transient pool, which shouldn't be
executable).

v2: - Store compiled blend shaders in a malloc'ed buffer, to avoid
      reading from GPU-accessible memory when patching (Alyssa).
    - Free struct panfrost_blend_shader (Alyssa).
    - Give the job a reference to regular shaders when emitting
      (Alyssa).

v3: - Split out the allocation flags change (Rob).

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

util/hash_table: Fix hashing in clears on 32-bit

Some hash functions (eg. key_u64_hash) will attempt to dereference the
key, causing an invalid access when passed DELETED_KEY_VALUE (0x1) or
FREED_KEY_VALUE (0x0).

When in 32-bit arch a 64-bit key value doesn't fit into a pointer, so
hash_table_u64 internally use a pointer to a struct containing the
64-bit key value.

Fix _mesa_hash_table_u64_clear() to handle the 32-bit case by creating a
temporary hash_key_u64 to pass to the hash function.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Suggested-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: Nicolai Hähnle <nicolai.haehnle@amd.com>

anv: support GetSwapchainGrallocUsage2ANDROID for Android

New function supports gralloc1 usage flags that get set separately
for producer and consumer. As we still need to support old method too,
let's share common code and use android_convertGralloc0To1Usage helper.
Bump the VK_ANDROID_native_buffer version to indicate support for the
new call.

Changes were tested on Android Celadon P with Basemark GPU and various
Sascha Willems Vulkan demos.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

st/mesa: eliminate unnecessary redirection

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: fix debug typo

Misspelling was seen with INTEL_DEBUG=perfmon.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: make gen_perf_query_object private

Encapsulate the details of this structure within the perf implemenation.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: make perf context private

Encapsulate the details of this data structure.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: print debug information

INTEL_DEBUG=perfmon will iterate over the perf queries, printing
information about the state of each query.  Some of this information
will be private to intel/perf, and needs to a dump routine that can be
called from i965.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: make internal methods private

Now that all references from i965 have been moved to perf, we can make
internal methods private again.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: make oa_sample_buffers private

All references to this data structure have been moved inside the perf
subsystem.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: expose method to create query

By encapsulating this implementation within perf, we can eventually
make struct gen_perf_ctx private.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move initialization of pipeline statistics metrics to gen_perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move get_query_data into gen_perf

This refactor moves several helper functions for get_query_data as
well:

 - accumulate_oa_reports
 - read_gt_frequency
 - get_pipeline_stats_data
 - get_oa_counter_data

Functions which are no longer referenced in brw_performance_query.c
have been removed.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move delete_query to gen_perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move is_query_ready to gen_perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move wait_query to perf

The following methods have duplicate implementation of read_oa_samples_until in
brw_performance_query.c:

 - read_oa_samples_for_query
 - read_oa_samples_until

They ar still referenced by other methods in the file and will be
removed on the subsequent commit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for bo_busy

Iris and i965 variants of this method need to be called by perf
routines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for bo_wait_rendering

Iris and i965 variants of this method need to be called by perf
routines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for batch_references

Iris and i965 variants of this method need to be called by perf
routines.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: refactor gen_perf_end_query into gen_perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: refactor gen_perf_begin_query into gen_perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move perf-related state into gen_perf_context

To move more operations into intel/perf, several state items are
needed.  Save references to that state in the perf_ctxt, rather than
passing them in for every operation.

This commit includes an initializer for gen_perf_context, to set those
references and also encapsulate the initialization of the sample
buffer state.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entries for buffer object map/unmap

These operations are needed to refactor subsequent methods into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move client reference counts into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move open_perf into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move close_perf into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for emit_mi_flush

This method is needed to move subsequent methods into perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: use temporary pointers to simplify access to perf state

Most accesses to perf state were made through repeated dereferences of
brw_context members.  Prefering temporary variables of perf_ctx and
perf_cfg has the following advantages:

 - more concise implementation
 - easier refactor when moving subsequent methods to perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move snapshot_statistics_registers into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move query_object into perf

Query objects can now be encapsulated within the perf subsystem.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for store_register_mem64

This method is needed to move subsequent methods into perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move free_sample_bufs into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move reap_old_sample_buffers into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move get_free_sample_buf into perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move the perf context into perf

The "context" that is necessary to submit and process perf commands to
the hardware was previously present in the brw_context.perfquery
struct.  This commit moves it into perf and provides a more
understandable name.

The intention is for this struct to be private, when all methods that
access it are migrated into perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move get_metric_id to perf

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move oa_sample_buf structure to perf

oa_sample_buf holds the data provided by the kernel that will be
collated into performance metrics.  Since this functionality will be
implemented in perf, the struct needs to be defined there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: enumerate query-based metrics in perf

Iris and i965 both need to enumerate the available metrics, so these
routines must be located in perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: move perf-related constants to common location

The perf subsystem needs several macro definitions that were
duplicated in Iris and i965 headers.  Place these macros within perf,
if the perf implementation contains the only references to the values.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for capture_frequency_stat_register

In preparation for calling both Iris and i965 implementions from perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for batchbuffer_flush

In preparation for calling both Iris and i965 implementions from perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for emit_report_count

In preparation for calling both Iris and i965 implementions from perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable entry for bo_unreference

In preparation for calling both Iris and i965 implementions from perf.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: create a vtable for low-level driver functions

Performance metrics collections requires several actions (eg bo_map())
that have different implementations for Iris and i965.  The perf
subsystem needs a vtable for each of these actions, so it can invoke
the corresponding implementation for each driver.

The first call to be added to the table is bo_alloc.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: use common ioctl wrapper

There were multiple ioctl-wrapper functions, so a common
implementation was put in gen_gem.h.   With a common implementation,
perf no longer needs the caller to configure one for it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/perf: rename gen_perf to gen_perf_config

This structure contains the configurations of the metrics for the
current platform, and the settings needed for the perf subsystem to
query that configuration from the device.  This data is available
without a rendering context, and needed to support MDAPI metrics for
Vulkan.

A gen_perf_context struct will be added later, which holds additional
state from the rendering context necessary for metric data
collection.  The gen_perf struct needs a more precise name to reduce
confusion.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nvc0: fix program dumping, use _debug_printf

This debug situation is unforunate. debug_printf only does something
with DEBUG set, but in practice all that needs to be moved to !NDEBUG.
For now, use _debug_printf which always prints. However the whole
function is guarded by !NDEBUG.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: add support for ATOMC_WRAP TGSI operations

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

gallium: redefine ATOMINC_WRAP to be more hardware-friendly

Both AMD and NVIDIA hardware define it this way. Instead of replicating
the logic everywhere, just fix it up in one place.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

st/mesa: relax EXT_shader_image_load_store enable

There's no reason to bring format-less load requirement into this
extension. It requires a size to be provided, and a compatible format is
computed from the size + data type. For example

  layout(size1x32) uniform iimage1D image;

becomes

  DCL IMAGE[0], 1D, PIPE_FORMAT_R32_SINT, WR

whereas PIPE_CAP_IMAGE_LOAD_FORMATTED is designed to allow
PIPE_FORMAT_NONE to be provided as a format and still enable LOAD
operations to be performed.

So the shader has all the information it needs about the format.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

i965/perf: restore mdapi statistics query metrics

Registration of mdapi metrics based on statistics query registers was
inadvertently removed in the commit that checks for OA kernel support.

The statistics queries are not dependent on OA.

Fixes: 96e1c945f2b ("i965: Move device info initialization to common code")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

util: add anon_file.h for all memfd/temp file usage

Move the Weston os_create_anonymous_file code from egl/wayland into util,
add support for Linux memfd and FreeBSD SHM_ANON,
use that code in anv/aubinator instead of explicit memfd calls for portability.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

radeonsi: limit DPBB context_states_per_bin batches when using gfx9 workaround

It seems that using 'context_states_per_bin = 1' for DPBB fixes the reported issue.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110214

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: reduce DPBB persistent_states_per_bin value for APUs

Fixes some reported GPU hangs on RAVEN.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111231

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: fix typo in DPBB register field

Also only set FLUSH_ON_BINNING_TRANSITION for GPU families that needs it (matches
what si_emit_dpbb_disable is doing).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: fix S_028C48_MAX_ALLOC_COUNT value

This field uses "value minus 1" encoding.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

etnaviv: drop struct etna_3d_state

Also drop #if 0 code block.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Philipp Zabel <philipp.zabel@gmail.com>

mesa: Use _mesa_delete_transform_feedback_object in drivers

Function _mesa_delete_transform_feedback_object called from within
drivers once driver-specific clean-up has been done. Brings into
conformity with how other GL objects are handled.

CC: Eric Anholt <eric@anholt.net>
CC: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

mesa: use _mesa_delete_query in drivers

Now drivers can call _mesa_delete_query once driver-specific
clean-up has been done. Brings into conformity with how other GL
objects are handled.

CC: Eric Anholt <eric@anholt.net>
CC: Kenneth Graunke <kenneth@whitecape.org>
Suggested-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

docs: update calendar, add news item and link release notes for 19.1.4

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>

docs: add sha256 checksums for 19.1.4

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 7fcb69a33c6c6d1658de3e0fd9c40363584c8c7b)

docs: add release notes for 19.1.4

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit b84ffa028d09c1bba1add468fd68886ee243d428)

meson,i965: Link with android deps when building for android.

The DBG marco in brw_blorp.c ends up calling an android log function:

error: undefined reference to '__android_log_print'

v2: On suggestion from Lionel, hang the Android dependency onto a new
    libintel_common dependency.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

gallium/dump: add missing query-type to short-list

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 3f6b3d9db72 ("gallium: add PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/dump: add missing query-type to short-list

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: a677799e51a ("gallium: add PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE
                     and corresponding cap")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gitlab-ci: don't install autotools deps

These could've been deleted a long time ago, but apparent we forgot.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

util: fix mem leak of program path

Fixes: 759b94038987bb983398 ("util: Get program name based on path when possible")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

meson: build intel-ui tools as part of `all` tools

Reported-by: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111289
Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

gitlab-ci: add gtk3 dev files for `-D tools=intel-ui`

We also need to update wayland-protocols and libXrandr (and randrproto),
as they are too old for gdk3 (which gtk3 depends on).

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

clover: Fix build after clang r367864

v2: Drop special case of llvm-9
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Acked-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Aaron Watry <awatry@gmail.com>

mesa: remove super old TODOs from shaderapi.c

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: freedreno: Android.registers.mk: Fix up register xml.h file generation

The current Androdi.registers.mk file causes build failures that
look like:
 FAILED:
 external/mesa3d/src/freedreno/Android.registers.mk:49: error: implicit rules are obsolete: out/target/product/linaro_db845c/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/%.xml.h

Caused by the following Android build rule change:
https://android.googlesource.com/platform/build/+/HEAD/Changes.md#implicit_rules

I tried to replace this with something similar to the static
pattern suggested in the URL above, but ended up getting all the
xml.h files generated using only the first a2xx.xml source file.

So I've fallen back to explicitly defining the make rules for
each.

Additionally, we needed to provide the proper
LOCAL_EXPORT_C_INCLUDE_DIRS and add the defined static library
to the components that depend on the register headers.

Acked-by: Eric Anholt <eric@anholt.net>
Signed-off-by: John Stultz <john.stultz@linaro.org>

mesa: Add ir3/ir3_nir_imul.c generation to Android.mk

With current master we're seeing build failures with AOSP:
  error: undefined symbol: ir3_nir_lower_imul

This is due to the ir3_nir_imul.c file not being generated
in the Android.mk files.

This patch simply adds it to the Android build, after which
thigns build and book ok on db410c.

Cc: Rob Clark <robdclark@chromium.org>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Amit Pundir <amit.pundir@linaro.org>
Cc: Sumit Semwal <sumit.semwal@linaro.org>
Cc: Alistair Strachan <astrachan@google.com>
Cc: Greg Hartman <ghartman@google.com>
Cc: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: John Stultz <john.stultz@linaro.org>

panfrost: Take into account a index_bias for glDrawElementsBaseVertex calls

Midgard does not accept a index_bias directly and relies instead on a
bias correction offset (offset_bias_correction) in order to calculate
the unbiased vertex index.

We need to make sure we adjust offset_start and vertex_count in order to
take into account the index_bias as required by a
glDrawElementsBaseVertex call and then supply a additional
offset_bias_correction to the hardware.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

radv/gfx10: Enable DCC for storage images.

v2: Hide it behind a perftest flag.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Add device argument for dcc compression check.

Because it is about to be generation dependent.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: Disable compression for compute DCC decompress store.

Previously we relied on stores not using DCC but that is going to
change, so disable compression explicitly.

Reviewed-by: Dave Airlie <airlied@redhat.com>