Revert "i915g: Don't bind 0-length programs"

This reverts commit 8c28a9bd733f5b51ab459c6bc626a5aaac5a6c0c.

glapi: Do not use backtrace on Cygwin.

execinfo.h is not available on Cygwin.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: don't enable glVertexPointer() when using API_OPENGLES2.

This function is only present in GLES1 and in the OpenGL compatibility
profile.

Fixes the following "make check" failure:

    [----------] 1 test from DispatchSanity_test
    [ RUN      ] DispatchSanity_test.GLES2
    Mesa warning: couldn't open libtxc_dxtn.so, software DXTn
    compression/decompression unavailable
    dispatch_sanity.cpp:122: Failure
    Value of: table[i]
       Actual: 0x4de54e
    Expected: (_glapi_proc) _mesa_generic_nop
    Which is: 0x41af72
    i = 321
    [  FAILED  ] DispatchSanity_test.GLES2 (4 ms)
    [----------] 1 test from DispatchSanity_test (4 ms total)

NOTE: This is a candidate for stable release branches.

Reviewed-by: Oliver McFadden <oliver.mcfadden@linux.intel.com>
Tested-by: Oliver McFadden <oliver.mcfadden@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i915g: Don't bind 0-length programs

Since we started doing fixups for different render target formats,
this has been an issue. Instead just don't do anything, when the
program gets emitted later it'll get the correct fixup.

Fixes a bunch of piglit tests.

mesa: don't call TexImage driver hooks for zero-sized images

This simply avoids some failed assertions but there's no reason to
call the driver hooks for storing a tex image if its size is zero.

Note: This is a candidate for the stable branches.

intel: Fix intel_texsubimage_tiled_memcpy to skip GL_EXT_unpack_subimage case

413c49141 added an optimisation to improve the performance of teximage
under a limited set of circumstances. If GL_EXT_unpack_subimage has been
used then we we must also skip this optimisation since the optimised
codepath does not take the packing values into consideration.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

dri drivers: Link dricommon before dynamic libraries

I think libtool should be handling this for us, but the build fails for
Jordan because libdricommon (a static library, which uses expat) appears
before -lexpat on the linker command.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Jordan Justen <jordan.l.justen@intel.com>

register_allocate: don't consider trivially colorable registers for spilling.

Previously, we considered all registers as candidates for spilling.
This was counterproductive--for any registers that have already been
removed from the interference graph, there is no benefit to spilling
them, since they don't contribute to register pressure.

This patch ensures that we will only try to spill registers that are
still in the interference graph after register allocation has failed.

This is consistent with the recommendations of the paper "Retargetable
Graph-Coloring Register Allocation for Irregular Architectures", on
which our register allocator is based.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

glx/dri2: use uint64_t instead of double to represent time for FPS calculation

Wine or a windows app changes fpucw to 0x7f, causing doubles to be equivalent
to floats, which broke the calculation of FPS.
We should be very careful about using doubles in Mesa.

Henri Verbeet adds:
  For reference, this is done by for example d3d9 when a D3D device is
  created without D3DCREATE_FPU_PRESERVE set. In the general case
  applications can do all kinds of terrible things to the FPU control
  word of course.

mesa: tests: EnumStrings.LookUpByNumber

[ RUN      ] EnumStrings.LookUpByNumber
enum_strings.cpp:43: Failure
Value of: _mesa_lookup_enum_by_nr(everything[i].value)
  Actual: "GL_COMPRESSED_RGBA_S3TC_DXT3_ANGLE"
Expected: everything[i].name
Which is: "GL_COMPRESSED_RGBA_S3TC_DXT3_EXT"
enum_strings.cpp:43: Failure
Value of: _mesa_lookup_enum_by_nr(everything[i].value)
  Actual: "GL_COMPRESSED_RGBA_S3TC_DXT5_ANGLE"
Expected: everything[i].name
Which is: "GL_COMPRESSED_RGBA_S3TC_DXT5_EXT"
[  FAILED  ] EnumStrings.LookUpByNumber (2 ms)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55505
Signed-off-by: Oliver McFadden <oliver.mcfadden@linux.intel.com>

docs: add link to the GLSL compiler page

This reverts commit 9e0931e355a21ff9902a4127cc63b392d8def0cd

Reviewed-by: Brian Paul <brianp@vmware.com>

docs: update shading documentation

Reviewed-by: Brian Paul <brianp@vmware.com>

build: Remove autoconf check for signbit

rebase failure in 7da12426f7682ffc44ae40e31d1b5712521fbb70.

i915g: Implement srgb textures the easy way.

Since the hw can do it, let's use the hw. It's less accurate
but doesn't have the shader instruction count shortcomings.

i915g: Use X tiling for textures

This is what the classic driver does, and it allows faster
texture uploads.

SwapBuffersRegionNOK: invert rectangles on y axis

The EGL_NOK_swap_region2 spec states that the rectangles are specified
with a bottom-left origin within a surface coordinate space also with a
bottom left origin, so this patch ensures the rectangles are flipped
before passing them on to dri2_copy_region.

Fixes piglit's egl-nok-swap-region test.

Tested-by: Matt Turner <mattst88@gmail.com>

mesa: remove bogus compressed texture size checks

A compressed texture image size doesn't have to be a multiple of the
compressed block size (only sub-images do).  Fixes issues when building
compressed mipmaps because we often wind up with non-block-size images
for the higher mipmap levels.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=55445

Note: This is a candidate for the stable branches.

Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Sven Arvidsson <sa@whiz.se>

radeonsi: Fix double compilation of shader variants.

Fixes crash in piglit glsl-max-varyings.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

radeonsi: Better indexing of parameters in the pixel shader.

We were previously using the TGSI input index, which can exceed the number of
parameters passed from the vertex shader via the parameter cache. Now we use
a separate index which only counts those parameters.

Prevents piglit regressions with the following fix.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

radeon/llvm: Disable SI flow control again for now.

It makes piglit unreliable due to VM protection faults and GPU lockups.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

docs/helpwanted: cleanup todo list links

split into common and driver specific To-Do lists
add an explanation for each To-Do list

Reviewed-by: Brian Paul <brianp@vmware.com>

docs: document how to apply a candidate to a stable branch

Reviewed-by: Brian Paul <brianp@vmware.com>

docs: document how to mark a candidate for a stable branch

Reviewed-by: Brian Paul <brianp@vmware.com>

android: glcpp: fix abuse of yylex

Port the 'glcpp: fix abuse of yylex' commit to Android.mk
Also, since the Android.*.mk are sourced in a global namespace,
the local-y-to-c-and-h is prefixed with the LOCAL_MODULE name,

The initial fix commit is 53d46bc787318ccf9911fdd1d5fe99ee4db7f41a

There's also a bugzilla for this: 54947

Signed-off-by: Negreanu Marius Adrian <adrian.m.negreanu@intel.com>
Reviewed-by: Oliver McFadden <oliver.mcfadden@linux.intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

build: Don't build libdricore if not building classic drivers

libdricore: Remove dead C(XX)FLAGS_NOVISIBILITY

build: Add visibility CFLAGS to OSMesa

build: Link OSMesa with glapi, libdl, libstdc++

Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=399813
          https://bugs.freedesktop.org/show_bug.cgi?id=53179

build: Set visibility CFLAGS in dri/swrast

build: Set visibility CFLAGS in dri/r200

build: Set visibility CFLAGS in dri/radeon

build: Set visibility CFLAGS in dri/nouveau

build: Set visibility CFLAGS in dri/i915

build: Set visibility CFLAGS in dri/common

build: Build src/glsl with visibility CFLAGS

build: Turn on visibility CFLAGS for core mesa

build: Order src/Makefile correctly

build: Use AX_PTHREAD's HAVE_PTHREAD preprocessor definition

build: Use PTHREAD_LIBS and PTHREAD_CFLAGS

build: Set PTHREAD_LIBS for pkgconfig files if empty

llvmpipe: Fix build with LLVM 2.8

Commit 8d9778589f4b3a174e884338adb0fe1bdeca5eb7 added all-targets to the
LLVM_COMPONENTS list, but this component does not exist with LLVM 2.8.

Adding all-targets is not necessary for any drivers, and it seems to be
left over from earlier versions of the commit mentioned above.

Tested-by: Stéphane Marchesin <marcheu@chromium.org>

configure.ac: Use amdgpu component for LLVM 3.2

The amdgpu component actually does exist.  I must have been using an
older version of llvm-config by accident when I first made this change.

radeon/llvm: Only initialize the AMDGPU target

radeon: Fix build with LLVM 3.1

The build was broken by commit 8d9778589f4b3a174e884338adb0fe1bdeca5eb7

radeon: Support LLVM 3.2

LLVM 3.2 and newer requires that the R600/SI backend be part of the
LLVM tree.

r600g: Re-enable growing of the compute memory pool

r600g: Fix bug when adding new items to the compute memory pool

The items are ordered in the item list by their offsets, with the lowest
offset coming first in the list.  The old code was assuming that new
items being added to the list would always have a greater offset than
the first item in the list, however this is not always the case.

r600g: Use a RAT buffer as the backing bo for the compute memory pool

r600g: Make sure to init the compute memory pool with enough memory

r600g: Add evergreen_init_color_surface_rat() v2

This can be used to initialize the CB* registers for buffers without a
radeon_surface.

v2:
  - Get correct group_bytes value from r600_screen
  - Stop setting unnecessary fields

Reviewed-by: Marek Olšák <maraeo@gmail.com>

r600g: Add register field definitions for 028C70_RESOURCE_TYPE

Reviewed-by: Marek Olšák <maraeo@gmail.com>

intel: add support for ANGLE_texture_compression_dxt.

Signed-off-by: Oliver McFadden <oliver.mcfadden@linux.intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

radeonsi: emit PA_SU_PRIM_FILTER_CNTL

has no default value.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <deathsimple@vodafone.de>

radeonsi: remove some old r600g cruft

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <deathsimple@vodafone.de>

radeonsi: fix range checking for state regs

end value is exclusive, but in practice we shouldn't
hit this.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>

radeonsi: drop some cayman remnants

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <deathsimple@vodafone.de>

radeonsi: define SGPR register numbers

Instead of hardcoding them.

Signed-off-by: Christian König <deathsimple@vodafone.de>

nvc0: make sure handles for unbound textures/samplers are uploaded on nve4

nv50,nvc0: fix 3d engine blit for nvc0

nv50,nvc0: implement blit

gallium: remove resource_resolve

The functionality is provided by the new blit function.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: implement decompress_with_blit using gallium blit

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: implement BlitFramebuffer using gallium blit

This also fixes a lot tests, especially all the clip-and-scissor-blit MSAA
piglit tests.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

svga: implement blit

Reviewed-by: Brian Paul <brianp@vmware.com>

softpipe: implement blit

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

radeonsi: implement blit

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

r600g: implement blit

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

r300g: implement blit

Reviewed-by: Brian Paul <brianp@vmware.com>

nv30: implement blit

Reviewed-by: Brian Paul <brianp@vmware.com>

nv30: use util_format_is_supported

Hardware drivers *must* use it.

Reviewed-by: Brian Paul <brianp@vmware.com>

llvmpipe: implement blit

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

i915g: implement blit

Reviewed-by: Brian Paul <brianp@vmware.com>

gallium: implement blit in driver wrappers

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium: add helpers for dumping pipe_box and pipe_blit_info

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/u_blitter: add helper for blitting via resource_copy_region

v2: fix off-by-one error in is_box_inside_resource, add comments

Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/u_blitter: add gallium blit implementation

The original blit function is extended and the otAher functions reuse it.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/u_blitter: add ability to disable and restore the render condition

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/u_blitter: facilitate co-existence with the Draw module

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium/u_blitter: check PIPE_CAP_TEXTURE_MULTISAMPLE

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium: add blit into the interface

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

gallium: add PIPE_CAP_TEXTURE_MULTISAMPLE

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

softpipe: fix set_framebuffer_state with uninitialized surfaces past nr_cbufs-1

Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

scons: Use full path of texture_builtins.py.

Fixes this build error on Cygwin.
Explicit dependency `src/glsl/builtins/tools/texture_builtins.py' not
found, needed by target
`build/cygwin-x86-debug/glsl/builtin_function.cpp'.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: add fall-through comment, just to be clear

mesa: remove useless GLenum casts

mesa: add const qualifier in check_for_ending() to silence warning

i965: Complain about variable index lowering when INTEL_DEBUG=perf.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Dump linked shaders on MESA_GLSL=dump.

Often, the original shader IR isn't terribly interesting because a lot
of crucial optimizations haven't been done (such as inlining built-ins).

ir_to_mesa used to print this out for us, but since we don't use it, we
have to do it ourselves.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

glsl: Rename variable_entry2 back to variable_entry in struct splitting.

The anonymous namespace should keep these private classes to file scope,
preventing clashes with other symbols of the same name elsewhere.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

intel/i965: Disable SampleAlphaToOne if dual source blending enabled

From SandyBridge PRM, volume 2 Part 1, section 12.2.3, BLEND_STATE:
DWord 1, Bit 30 (AlphaToOne Enable):
"If Dual Source Blending is enabled, this bit must be disabled"

Note: This is a candidate for stable branches.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

scons: Disable build of assembly sources on Cygwin.

The assembly sources currently do not build on Cygwin.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>

mesa: allow MESA_GL_VERSION_OVERRIDE to override the API type

Change the format to MAJOR.MINOR[FC]
For example: 2.1, 3.0FC, 3.1

The FC suffix indicates a forward compatible context, and
is only valid for versions >= 3.0.

Examples:
2.1:   GL Legacy/Compatibility context
3.0:   GL Legacy/Compatibility context
3.0FC: GL Core Profile context + Forward Compatible
3.1:   GL Core Profile context
3.1FC: GL Core Profile context + Forward Compatible

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: brwInitVtbl needs to know the chipset generation

Fixes major regressions since de958de.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

i915: Don't free the intel_context structure when intelCreateContext fails.

intelDestroyContext will eventually be called, and it will clean things up.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618

i965: Don't free the intel_context structure when intelCreateContext fails.

intelDestroyContext will eventually be called, and it will clean things
up.  The call to brwInitVtbl is moved earlier so that
intelDestroyContext can call the device-specific destructor.  This also
makes the code look more like the i915 code.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54301

intel: Don't call intelDestroyContext if there is no context to destroy

Some error paths in the device-specific context creation functions can exit
before the deintel_context structure is allocated.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54301

dri_util: Use calloc to allocate __DRIcontext

The __DRIcontext contains some pointers, and some drivers check for them to be
NULL in some failure paths.  Instead of sprinkling NULL assignments across the
various drivers, just zero out the whole thing.

NOTE: This is a candidate for the 9.0 branch.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-and-tested-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Lu Hua <huax.lu@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53618
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54301

main/version: add "(Core Profile) to version string for core profiles

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glx: Fix compile warnings since 99fee476a102be898a1a093c037e06382f90a5b9

_glapi_table is a struct full of named function pointers, while the generated
code just wants to treat it as an array of function pointers.  Cast to avoid
the compiler warning.

Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa/tests: Sanity check the ES2 dispatch table

This test is only built when shared-glapi is used.  Because of changes
elsewhere in the tree that were necessary to make shared-glapi work
correct with GLX, it's not feasible to make the test function both ways.

The list of expected functions originally came from the functions set by
api_exec_es2.c.  This file no longer exists in Mesa (but api_exec_es1.c
is still generated).  It was the generated file that configured the
dispatch table for ES2 contexts.  This test verifies that all of the
functions set by the old api_exec_es2.c (with the recent addition of VAO
functions) are set in the dispatch table and everything else is a NOP.

When adding ES2 (or ES3) extensions that add new functions, this test
will need to be modified to expect dispatch functions for the new
extension functions.

v2: Expect VAO functions be non-NOP.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>