radeonsi/gfx10: fix the vertex order for triangle strips emitted by a GS

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/gfx10: simplify some duplicated NGG GS code

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

util/u_thread: don't restrict u_thread_get_time_nano() to __linux__

pthread_getcpuclockid() and clock_gettime() are also available on at least
OpenBSD, FreeBSD, NetBSD, DragonFly, Cygwin.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

util/futex: use futex syscall on OpenBSD

Make use of the futex syscall added in OpenBSD 6.2.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

meson: Add a "prefer_iris" build option

Enabling this option makes Intel Gen8-11 hardware load the 'iris'
driver by default instead of the older 'i965' driver.

Regardless of how this option is set, users can still override which
driver the loader selects via two methods.  The first is to create a
~/.drirc or /etc/drirc file with the following snippet:

   <driconf>
     <device driver="loader" kernel_driver="i915">
       <option name="dri_driver" value="i965" />
     </device>
   </driconf>

The other option is to set an environment variable:

   export MESA_LOADER_DRIVER_OVERRIDE=i965

For now, "prefer_iris" defaults to i965 (the historical choice).
A separate future patch will change the default driver to iris.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1893
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

turnip: fix display wsi fence timing out

Fixes: df9f2adf ("turnip: add display wsi")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>

nir/lower_io_to_vector: don't create arrays when not needed

Some backends require that there are no array varyings.

If there were no arrays in the input shader, the pass shouldn't have to
create new ones.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2103
Fixes: bcd14756eec ('nir/lower_io_to_vector: add flat mode')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

aco: fix block_kind_discard s_andn2 definition to exec

Improves generated code of dEQP-VK.graphicsfuzz.disc-and-add-in-func-in-loop
because a loop exit phi can then be fixed to exec, removing copies and
improving jump threading.

No pipeline-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: handle loop exit and IF merge phis with break/discard

ACO considers discards jumps and creates edges in the CFG for them but NIR
does neither of these.

This can be fixed instead by keeping track of whether a side of an IF had
a break/discard, but this doesn't solve the issue with discards affecting
loop exit phis. So this reworks phi handling a bit.

Fixes these tests:
dEQP-VK.graphicsfuzz.disc-and-add-in-func-in-loop
dEQP-VK.graphicsfuzz.loop-call-discard
dEQP-VK.graphicsfuzz.complex-nested-loops-and-call

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: validate the CFG

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

mesa/main/util: moving gallium u_mm to util, remove main/mm

Right now there are two copies of mm:
   * mesa/main/mm.[ch]
   * gallium/auxiliary/util/u_mm.[ch]

At some point they splitted, and from the commit message it was not
clear why it was not possible to have only one copy at a common place.

Taking into account that was several years ago, Im assuming that it
was not possible then.

This change would allow to have one copy of the same code, and also
being able to use that code out of mesa/main or gallium, if needed.

This commit moves u_mm and removes mm, as u_mm has slightly more
changes.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

radv: set writes_memory for global memory stores/atomics

Fixes: 13ab63bb62b ('radv: Implement VK_EXT_buffer_device_address.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac/llvm: improve sync scope for global atomics

Stronger ordering is implemented in SPIRV->NIR with barriers.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

ac/llvm: fix pointer type for global atomics

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

iris: Map FXT1 texture formats

This exposes GL_TDFX_texture_compression_FXT1 support.  It's ancient,
only Intel GPUs appear to support it, and I seriously doubt anybody
uses it.  But i965 supports it, and it's trivial to do, so we may as
well support it in the new iris driver as well.

Reviewed-by: Eric Anholt <eric@anholt.net>

st/mesa: Add GL_TDFX_texture_compression_FXT1 support

Eric recently added PIPE_FORMAT_FXT1_RGB[A] as part of his format
unification work.  This was really most of the work of implementing
the extension.  We just need to handle it in a couple of places and
expose the extension.

v2: Reject the new formats in llvmpipe_is_format_supported to prevent
    crashes because it doesn't know how to handle the new formats.

Reviewed-by: Marek Olšák <marek.olsak@amd.com> [v1]
Reviewed-by: Eric Anholt <eric@anholt.net> [v1]

nir/samplers: don't zero samplers_used/txf.

This allows this pass to be run multiple times and the results are
just or'ed together.

It fixes on test on llvmpipe nir, and regresses none.

Suggested by Kenneth

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

aco: drop useless lowering of deref operations for shared memory

Moved to RADV. No pipeline-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

radv,ac/nir: lower deref operations for shared memory

This shouldn't introduce any functional changes for RadeonSI
when NIR is enabled because these operations are already lowered.

pipeline-db (NAVI10/LLVM):
SGPRS: 9043 -> 9051 (0.09 %)
VGPRS: 7272 -> 7292 (0.28 %)
Code Size: 638892 -> 621628 (-2.70 %) bytes
LDS: 1333 -> 1331 (-0.15 %) blocks
Max Waves: 1614 -> 1608 (-0.37 %)

Found this while glancing at some F12019 shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

aco: fix a couple of value numbering issues

Fixes: 3a20ef4a3299fddc886f9d5908d8b3952dd63a54 'aco: refactor value numbering'
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

aco: don't split live-ranges of linear VGPRs

Fixes: 93c8ebfa780ebd1495095e794731881aef29e7d3 'aco: Initial commit of independent AMD compiler'
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

aco: implement global atomics

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: improve FLAT/GLOBAL scheduling

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: don't enable store_global for helper invocations

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: fix SADDR with FLAT on GFX10

The reference guide is incorrect and SADDR is actually used with FLAT on
GFX10.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: fix assembly of FLAT/GLOBAL atomics

They can take both a definition and data operand

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: fix GFX10 opcodes for some global/flat atomics

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: improve WAR hazard workaround with >64bit stores

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: add v_nop inbetween exec write and VMEM/DS/FLAT

LLVM and the proprietary compiler seem to do this

Fixes: b01847bd9 ("aco/gfx10: Fix mitigation of VMEMtoScalarWriteHazard.")
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: fix incorrect cast in parse_wait_instr()

s_waitcnt is SOPP, not SOPK

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: fix i2i64

Fixes: 93c8ebfa ('aco: Initial commit of independent AMD compiler')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

aco: propagate p_wqm on an image_sample's coordinate p_create_vector

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2156
Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

etnaviv: remove dead code

ptiled is always NULL so the if statement is useless.

CoverityID: 1415572
Fixes: b9627765303 ("etnaviv: rework compatible render base")
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: handle integer case for GENERIC_ATTRIB_SCALE

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: fix R10G10B10A2 vertex format entries

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: use NORMALIZE_SIGN_EXTEND

The blob driver does something like this for all vertex formats:

if (normalize) {
   if (OPENGL_ES30)
      val = VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_SIGN_EXTEND;
   else
      val = VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_ON;
} else {
   val = VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF;
}

As there is no way to get to that information in gallium we always
assume OPENGL_ES30.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: fix integer vertex formats

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>

i965: update Makefile.sources for perf changes

brw_performance_query_metrics.h was removed in
134e750e16bfc53480e0bba6f0ae3e1d2a7fb87c and
brw_performance_query.h was removed in
8ae6667992ccca41d08884d863b8aeb22a4c4e65

remove reference to these files from Makefile.sources

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Fixes: 134e750e16bfc53480e0 ("i965: extract performance query metrics")
Fixes: 8ae6667992ccca41d088 ("intel/perf: move query_object into perf")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

scons: Bump C standard to gnu11 on macOS 10.15.

Fix build error on macOS 10.15 Catalina.

src/util/u_queue.c:179:7: error: implicit declaration of function 'timespec_get' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
      timespec_get(&ts, TIME_UTC);
      ^

timespec_get needs C11 starting with macOS 10.15.

/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX.sdk/usr/include/time.h
   193 #if (__DARWIN_C_LEVEL >= __DARWIN_C_FULL) && \
   194         ((defined(__STDC_VERSION__) && __STDC_VERSION__ >= 201112L) || \
   195         (defined(__cplusplus) && __cplusplus >= 201703L))
   196 /* ISO/IEC 9899:201x 7.27.2.5 The timespec_get function */
   197 #define TIME_UTC 1 /* time elapsed since epoch */
   198 __API_AVAILABLE(macosx(10.15), ios(13.0), tvos(13.0), watchos(6.0))
   199 int timespec_get(struct timespec *ts, int base);
   200 #endif

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Eric Engestrom <eric@engestrom.ch>

panfrost: Make sure we reset the damage region of RTs at flush time

We must reset the damage info of our render targets here even though a
damage reset normally happens when the DRI layer swaps buffers. That's
because there can be implicit flushes the GL app is not aware of, and
those might impact the damage region: if part of the damaged portion
is drawn during those implicit flushes, you have to reload those areas
before next draws are pushed, and since the driver can't easily know
what's been modified by the draws it flushed, the easiest solution is
to reload everything.

Reported-by: Carsten Haitzler <raster@rasterman.com>
Fixes: 65ae86b85422 ("panfrost: Add support for KHR_partial_update()")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

gallium: Fix the ->set_damage_region() implementation

BACK_LEFT attachment can be outdated when the user calls
KHR_partial_update() (->lastStamp != ->texture_stamp), leading to a
damage region update on the wrong pipe_resource object.
Let's delay the ->set_damage_region() call until the attachments are
updated when we're in that case.

Reported-by: Carsten Haitzler <raster@rasterman.com>
Fixes: 492ffbed63a2 ("st/dri2: Implement DRI2bufferDamageExtension")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

zink: silence coverity error

Coverity doesn't know that we always have coordinates if we have lod. To
avoid annoying errors, let's just zero-initialize this.

CoverityID: 1455202
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: error-check right variable

That's not the value we just allocated...

CoverityID: 1455177
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: avoid NULL-deref

Same story as the previous two commits; these functions dereference the
memory they are pointed at. We can't do that.

CoverityID: 1455180
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: avoid NULL-deref

Similar to the previous commit, pipe_resource_reference also dereference
the memory pointed at. Let's avoid it.

CoverityID: 1455198
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: avoid NULL-deref

zink_render_pass_reference will dereference the memory 'dst' points at,
which can't really go well. All we want to do here is to increase the
reference-count, so let's use a different helper for that instead.

CoverityID: 1455200
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: handle calloc-failure

In case we fail to allocate the context, we should notice and fail
gracefully.

CoverityID: 1455193
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: do not try to destroy NULL-fence

destroy_fence doesn't handle NULL-pointers gracefully. So let's avoid
hitting that code-path, by simply returning NULL early here instead.

CoverityID: 1455179
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: delete query rather than allocating a new one

It seems I had some fat fingers when writing this function, and I
accidentally ended up allocating a new query and immediately trying to
delete an uninitialized pool instead of just deleting the pool of the
query that was passed.

CoverityID: 1455196
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: fix crash when restoring sampler-states

When I changed to heap-allocated sampler-objects, I missed the code-path
that restores sampler-states after the blitter; it needs an array of
pointers, not an array of VkSampler objects to behave.

This fixes spec@arb_texture_cube_map@copyteximage for me.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 5ea787950f6 ("zink: heap-allocate samplers objects")
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: reject invalid sample-counts

Vulkan only allows power-of-two sample counts. We already kinda checked
for this, but forgot to validate the result in the end. Let's check the
result and error properly.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>

zink: use true/false instead of TRUE/FALSE

Reviewed-by: Dave Airlie <airlied@redhat.com>

st/mesa: unmap pbo after updating cache

Unmapping first leads to accessing an invalid pointer. So let's switch
these lines around.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

panfrost: Fix gnu-empty-initializer build errors.

Fixes: a24d6fbae60c ("meson: Add -Werror=gnu-empty-initializer to MSVC compat args")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>

docs: update source code repository documentation

This drops all the old documentaion around applying for push access.

Also this removes the documentation stating that you can push
directly to mesa rather than using merge requests.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1969
Reviewed-by: Eric Engestrom <eric@engestrom.ch>

radv: Fix timeline semaphore refcounting.

Was totally broken ...

Removed two if(point) {} because point is always non-NULL and we
were counting on that already for counting, since we NULL our
references to semaphores without active point earlier.

Fixes: 4aa75bb3bdd "radv: Add wait-before-submit support for timelines."
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2137
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

winsys/amdgpu: avoid double simple_mtx_unlock()

pthread_mutex_unlock() when unlocked is documented by posix as
being undefined behaviour.  On OpenBSD pthread_mutex_unlock() will call
abort(3) if this happens.

This occurs in amdgpu_winsys_create() after
cb446dc0fa5c68f681108f4613560543aa4cf553
winsys/amdgpu: Add amdgpu_screen_winsys

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Cc: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

util/driconfig: print ATTENTION if MESA_DEBUG=silent is not set

unix-bytebenchmark refuses to run if the driver prints ATTENTION to stderr.

Acked-by: Eric Engestrom <eric@engestrom.ch>

glsl: handle max uniform limits with lower_const_arrays_to_uniforms

Fixes arb_tessellation_shader-large-uniforms Piglit test.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radv: Unify max_descriptor_set_size.

They were out of sync. Besides syncing, lets ensure they never diverge
again.

Fixes: 8d2654a4197 "radv: Support VK_EXT_inline_uniform_block."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

amd/llvm: Refactor ac_build_scan.

Split out the logic for exclusive scans into a separate function
that makes clear what it does instead of having this opaque 60
line if.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: add more constants to avoid using magic numbers

Trivial.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac/llvm: convert src operands to pointers if necessary

To avoid generating invalid LLVM IR when both operands don't have
the same type. This might happen when performing pointer comparisons
with SPIRV 1.4.

Fixes invalid LLVM IR for:
dEQP-VK.spirv_assembly.instruction.spirv1p4.opptrequal.variable_pointers_ssbo_equal
dEQP-VK.spirv_assembly.instruction.spirv1p4.opptrnotequal.variable_pointers_ssbo_not_equal

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

llvmpipe: add initial nir support

This adds the hooks between llvmpipe and the gallivm NIR
code, for compute and fragment shaders.

NIR support is hidden behind LP_DEBUG=nir for now until
all the intergration issues are solved

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add swizzle support where one channel isn't defined.

NIR doesn't always define all output channels
relies on outputs being memset to 0

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallium: add nir lowering passes for the draw pipe stages. (v2)

This transforms the NIR shaders like the TGSI transforms worked.

v2: fix some nir info requirements, use 32-bit bools

Acked-by: Roland Scheidegger <sroland@vmware.com>

draw: add nir info gathering and building support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add nir->llvm translation (v2)

This add the initial implementation of the NIR->LLVM conversion
for llvmpipe NIR support.

v2: lower bool to int32 in nir not llvm

Acked-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add selection for non-32 bit types

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add cttz wrapper

this will be used to write find_lsb support

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add popcount intrinsic wrapper

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: nir->tgsi info convertor (v2)

This is a port of the old radeonsi code to be used for llvmpipe NIR support.

Once we remove TGSI support from llvmpipe (I can dream? :-), then
we should be able to refine most of this down and remove it.

v2: port to later radeonsi code for vertex inputs and sampler/io parsing.

Acked-by: Roland Scheidegger <sroland@vmware.com>

gallivm: split out the flow control ir to a common file.

We can share a bunch of flow control handling between NIR and TGSI.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

radeonsi: enable SPIR-V and GL 4.6 for NIR

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/nir: support interface output types to fix SPIR-V xfb piglits

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/nir: fix location_frac handling for TCS outputs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/nir: don't rely on data.patch for tess factors

GLCTS SPIR-V tests have this issue.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/nir: validate is_patch because SPIR-V doesn't set it for tess factors

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: simplify get_tcs_tes_buffer_address_from_generic_indices

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi: simplify the interface of get_dw_address_from_generic_indices

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

radeonsi/nir: implement subgroup system values for SPIR-V

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac/nir: don't rely on data.patch for tess factors

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

drirc: Set vs_position_always_invariant for Shadow of Mordor on Intel

When drawing the main character in Shadow of Mordor, the game appears
to draw Talion with one vertex shader, and the Wraith with another.
If the compiler optimizes those in different ways which lead to slight
imprecisions, then the resulting positions may not line up, leading to
Z-fighting occurring as the game decides which of the two are in front.

brw_nir_opt_peephole_ffma looks at usages of multiply adds across the
entire shader, and may make different decisions between the two, leading
to such imprecisions and Z-fighting.  This started happening recently
after a NIR change to eliminate unnecessary MOVs (7025dbe7), but that
change simply exposed the existing problem.

Improves performance on Skylake GT4e by 1.22945% +/- 0.398672% (n=3),
likely due to the fixed rendering.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1985
Fixes: 7025dbe794b ("nir: Skip emitting no-op movs from the builder.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

driconf, glsl: Add a vs_position_always_invariant option

Many applications use multi-pass rendering and require their vertex
shader position to be computed the same way each time.  Optimizations
may consider, say, fusing a multiply-add based on global usage of an
expression in a shader.  But a second shader with the same expression
may have different code, causing that optimization to make the other
choice the second time around.

The correct solution is for applications to mark their VS outputs
'invariant', indicating they need multiple shaders to compute that
output in the same manner.  However, most applications fail to do so.

So, we add a new driconf option - vs_position_always_invariant - which
forces the gl_Position output in vertex shaders to be marked invariant.

Fixes: 7025dbe794b ("nir: Skip emitting no-op movs from the builder.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

turnip: Disable timestamp queries for now.

They're not implemented, and not critical to bring up immediately.  Avoids
failures in the CTS when nothing gets written to the query.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

freedreno/perfcntrs/fdperf: add missing a2xx case in select_counter

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@chromium.org>

freedreno/perfcntrs/fdperf: add missing a20x compatible

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@chromium.org>

freedreno/perfcntrs/fdperf: fix u64 print on 32-bit builds

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@chromium.org>

freedreno/perfcntrs: add a2xx MH counters

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@chromium.org>

freedreno/registers: add missing MH perfcounter enum for a2xx

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Rob Clark <robdclark@chromium.org>

gitlab-ci: Put HTML summary in artifacts for failed piglit jobs

This will make it easier to look at details of failed / skipped tests.

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

gitlab-ci: Stop storing piglit test results as JUnit

Since we're not reporting test results as JUnit anymore, we can use the
default JSON format.

This affects how test results are summarized, update the reference files
accordingly.

Reviewed-by: Eric Anholt <eric@anholt.net>

gitlab-ci: Stop reporting piglit test results via JUnit

It was basically useless in this form, and processing the JUnit data in
the GitLab backend was pretty expensive.

Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

v3d: fix indirect BO allocation for uniforms

We were always ensuring a minimum size of 4 bytes for uniforms
for the case where we don't have any, to account for hardware pre-fetching
of the uniform stream, however, pre-fetching could also lead to to out
of bounds reads when have read the last uniform in the stream, so we
probably want to have the extra 4 bytes to prevent the kernel from
observing invalid memory accesses when the uniform stream sits right at
the end of a page.

This seems to fix MMU exceptions reported with a Linux 5.4 kernel.

Credit goes to Phil Elwell for identifying the problem and narrowing
it down to memory accesses in the uniform stream.

Reported-by: Phil Elwell <phil@raspberrypi.org>
Tested-by: Phil Elwell <phil@raspberrypi.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

radv: enable VK_KHR_shader_subgroup_extended_types on GFX10

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac: add 8-bit and 16-bit supports to ac_build_permlane16()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: fix implementation of exclusive scans

This implementation is loosely based on ROCm.
https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/master/ockl/src/wfredscan.cl

This fixes dEQP-VK.subgroups.arithmetic.*.subgroupexclusive* on GFX10.

Fixes: 227c29a80de ("amd/common/gfx10: implement scan & reduce operations")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: fix enabling sample shading with SampleID/SamplePosition

When a fragment shader includes an input variable decorated with
SampleId or SamplePosition, sample shading should be enabled
because minSampleShadingFactor is expected to be 1.0.

Cc: 19.2, 19.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

turnip: fix integer render targets

Add missing required bits.  Fixes at least:

dEQP-VK.pipeline.render_to_image.dedicated_allocation.1d.small.r16g16_sint_d24_unorm_s8_uint
dEQP-VK.pipeline.render_to_image.dedicated_allocation.2d.mipmap.r16g16_sint_d24_unorm_s8_uint
dEQP-VK.renderpass.dedicated_allocation.attachment.4.401
dEQP-VK.renderpass2.suballocation.formats.r16_uint.load.draw
dEQP-VK.synchronization.op.single_queue.barrier.write_draw_read_copy_image_to_buffer.image_128x128_r16_uint

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>

anv: Push constants are relative to dynamic state on IVB

Fixes: aecde2351 "anv: Pre-compute push ranges for graphics pipelines"
Closes: #2136
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>