mesa.git
7 years agomesa: simplify sampler setting code
Timothy Arceri [Fri, 4 Nov 2016 05:41:30 +0000 (16:41 +1100)]
mesa: simplify sampler setting code

There is no need to loop over active samplers the code above this
would have already exited if the sampler was inactive, or errored
if the count was larger than the uniforms array size.

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agomesa/glsl: set num_textures per stage directly in shader_info
Timothy Arceri [Fri, 4 Nov 2016 00:40:10 +0000 (11:40 +1100)]
mesa/glsl: set num_textures per stage directly in shader_info

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agomesa: make _CurrentFragmentProgram a gl_program struct pointer
Timothy Arceri [Thu, 3 Nov 2016 22:25:36 +0000 (09:25 +1100)]
mesa: make _CurrentFragmentProgram a gl_program struct pointer

Making this point to a gl_program struct rather than a gl_shader_program
struct will allow use to later also make the CurrentProgram array hold
gl_program structs which in turn will allow for code simpilifcation.

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoi965: stop passing gl_shader_program to the precompile and codegen functions
Timothy Arceri [Fri, 4 Nov 2016 05:04:01 +0000 (16:04 +1100)]
i965: stop passing gl_shader_program to the precompile and codegen functions

We no longer need it.

While we are at it we mark the vs, gs, and wm codegen functions as static.

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agomesa/glsl: remove hack to reset sampler units to zero
Timothy Arceri [Wed, 9 Nov 2016 12:50:07 +0000 (23:50 +1100)]
mesa/glsl: remove hack to reset sampler units to zero

Now that we have the is_arb_asm flag we can just skip the
initialisation.

V2: remove hack from standalone compiler where it was never
needed since it only compiles glsl shaders.

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoi965: make use of new is_arb_asm flag
Timothy Arceri [Wed, 9 Nov 2016 12:44:39 +0000 (23:44 +1100)]
i965: make use of new is_arb_asm flag

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agost/mesa/glsl: add new is_arb_asm flag in gl_program
Timothy Arceri [Wed, 9 Nov 2016 12:38:46 +0000 (23:38 +1100)]
st/mesa/glsl: add new is_arb_asm flag in gl_program

Set the flag via the _mesa_init_gl_program() and NewProgram()
helpers.

In i965 we currently check for the existance of gl_shader_program
to decide if this is an ARB assembly style program or not.

Adding a flag makes the code clearer and will help removes a
dependency on gl_shader_program in the i965 codegen functions.

Also this will allow use to skip initialising sampler units for
linked shaders, we currently memset it to zero again during linking.

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoi965: pass gl_program directly to brw_compile_tes()
Timothy Arceri [Tue, 8 Nov 2016 01:07:12 +0000 (12:07 +1100)]
i965: pass gl_program directly to brw_compile_tes()

This is the only thing we use from gl_shader_program so pass it directly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965: stop passing gl_shader_program to brw_nir_setup_glsl_uniforms()
Timothy Arceri [Mon, 7 Nov 2016 09:54:45 +0000 (20:54 +1100)]
i965: stop passing gl_shader_program to brw_nir_setup_glsl_uniforms()

We can now just get the data needed from the gl_shader_program_data
pointer in gl_program.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965: pass gl_program to brw_upload_ubo_surfaces()
Timothy Arceri [Sat, 5 Nov 2016 12:35:11 +0000 (23:35 +1100)]
i965: pass gl_program to brw_upload_ubo_surfaces()

There is no need to pass gl_linked_shader anymore.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965: stop passing gl_shader_program to brw_assign_common_binding_table_offsets()
Timothy Arceri [Fri, 4 Nov 2016 22:34:52 +0000 (09:34 +1100)]
i965: stop passing gl_shader_program to brw_assign_common_binding_table_offsets()

We now get everything we need directly from gl_program so there is
no need for this.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agost/mesa/glsl/i965: move ShaderStorageBlocks to gl_program
Timothy Arceri [Fri, 4 Nov 2016 23:10:02 +0000 (10:10 +1100)]
st/mesa/glsl/i965: move ShaderStorageBlocks to gl_program

Having it here rather than in gl_linked_shader allows us to simplify
the code.

Also it is error prone to depend on the gl_linked_shader for programs
in current use because a failed linking attempt will free infomation
about the current program. In i965 we could be trying to recompile
a shader variant but may have lost some required fields.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agost/mesa/glsl/i965: set num_ssbos directly in shader_info
Timothy Arceri [Fri, 4 Nov 2016 22:24:51 +0000 (09:24 +1100)]
st/mesa/glsl/i965: set num_ssbos directly in shader_info

Here we also remove the duplicate field in gl_linked_shader and always
get the value from shader_info instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agost/mesa/glsl/i965: move per stage UniformBlocks to gl_program
Timothy Arceri [Fri, 4 Nov 2016 21:55:57 +0000 (08:55 +1100)]
st/mesa/glsl/i965: move per stage UniformBlocks to gl_program

This will help allow us to store pointers to gl_program structs in the
CurrentProgram array resulting in a bunch of code simplifications.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agost/mesa/glsl/i965: set num_ubos directly in shader_info
Timothy Arceri [Fri, 4 Nov 2016 21:44:22 +0000 (08:44 +1100)]
st/mesa/glsl/i965: set num_ubos directly in shader_info

This also removes the duplicate field in gl_linked_shader, and
gets num_ubos from shader_info instead.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agost/mesa/glsl/i965: move ImageUnits and ImageAccess fields to gl_program
Timothy Arceri [Fri, 4 Nov 2016 09:02:21 +0000 (20:02 +1100)]
st/mesa/glsl/i965: move ImageUnits and ImageAccess fields to gl_program

Having it here rather than in gl_linked_shader allows us to simplify
the code.

Also it is error prone to depend on the gl_linked_shader for programs
in current use because a failed linking attempt will free infomation
about the current program. In i965 we could be trying to recompile
a shader variant but may have lost some required fields.

We drop the memset on ImageUnits because gl_program is already
created using rzalloc().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965: get InfoLog and LinkStatus via the pointer in gl_program
Timothy Arceri [Mon, 7 Nov 2016 06:08:23 +0000 (17:08 +1100)]
i965: get InfoLog and LinkStatus via the pointer in gl_program

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965: get shared_size from shader_info rather than gl_shader_program
Timothy Arceri [Mon, 7 Nov 2016 05:43:39 +0000 (16:43 +1100)]
i965: get shared_size from shader_info rather than gl_shader_program

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965: stop depending on gl_shader_program for brw_compute_vue_map() params
Timothy Arceri [Mon, 7 Nov 2016 00:43:47 +0000 (11:43 +1100)]
i965: stop depending on gl_shader_program for brw_compute_vue_map() params

This removes another dependency on gl_shader_program from the codegen functions,
this will help allow us to use gl_program for the CurrentProgram array rather
than gl_shader_program.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoi965: pass gl_program to the brw_*_debug_recompile() functions
Timothy Arceri [Fri, 4 Nov 2016 03:09:35 +0000 (14:09 +1100)]
i965: pass gl_program to the brw_*_debug_recompile() functions

Rather then passing gl_shader_program.

The only field use was Name which is the same as the Id field in
gl_program.

For wm and vs we also make the functions static and move them before
the codegen functions.

This change reduces the codegen functions dependency on gl_shader_program.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agogallivm: (trivial) fix typo bug with small AoS format unpacking
Roland Scheidegger [Thu, 5 Jan 2017 23:46:15 +0000 (00:46 +0100)]
gallivm: (trivial) fix typo bug with small AoS format unpacking

Fix typo using wrong (uninitialized) build context introduced by
4634cb5921b985f04f2daf00cda2d28036143bd3. (This only affects very rare
small packed formats which have a PIPE_SWIZZLE_0 channel, such as
r4a4, which is never used by mesa/st. Nevertheless it broke lp_test_format.)

7 years agogallivm: implement aos unpack (to unorm8) for small unorm formats
Roland Scheidegger [Wed, 21 Dec 2016 03:56:01 +0000 (04:56 +0100)]
gallivm: implement aos unpack (to unorm8) for small unorm formats

Using bit replication. This path now resembles something which might make
sense. (The logic was mostly copied from llvmpipe fs backend.)
I am not convinced though it is actually faster than SoA sampling (actually
I'm quite certain it's always a loss with AVX).
With SoA it's just shift/mask/cvt/mul for getting the colors, whereas
there's still roughly 3 shifts, 3 or/and per channel for AoS
(i.e. for SoA it's exactly the same as it would be for a rgba8 format,
whereas the extra effort for AoS is significant). The filtering
might still be faster (albeit with FMA the instruction count gets down
quite a bit there on the SoA float filtering path on new cpus). And those
small unorm formats often don't have an alpha channel (which makes things
worse relatively for AoS path).
(This also fixes a trivial bug in the llvmpipe fs code this was derived
from, albeit it was only relevant for 4-bit channels.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
7 years agogallivm: optimize lp_build_unpack_arith_rgba_aos slightly
Roland Scheidegger [Wed, 21 Dec 2016 03:55:34 +0000 (04:55 +0100)]
gallivm: optimize lp_build_unpack_arith_rgba_aos slightly

This code uses a vector shift which has to be emulated on x86 unless
there's AVX2. Luckily in some cases we can actually avoid the shift
altogether, so do that.
Also make sure we hit the fast lp_build_conv() path when applicable,
albeit that's quite the hack...
That said, this path is taken for AoS sampling for small unorm (smaller
than rgba8) formats, and it is completely hopeless even with those
changes, with or without AVX.
(Probably should have some code similar to the one in the llvmpipe fs
backend code, using bit replication to extend to rgba8888 - rounding
is not quite 100% accurate but if it's good enough there it should be
here as well.)

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
7 years agogallivm: use 2 srcs for 32->16bit conversions in lp_bld_conv_auto
Roland Scheidegger [Wed, 21 Dec 2016 03:53:41 +0000 (04:53 +0100)]
gallivm: use 2 srcs for 32->16bit conversions in lp_bld_conv_auto

If we only feed one source vector at a time, we cannot use pack intrinsics
(as we only have a 64bit destination dst vector). lp_bld_conv_auto is
specifically designed to alter the length and number of destination vectors,
so this works just fine (if we use single source vectors at a time, afterwards
we immediately reassemble the vectors).
For AVX though this isn't really possible, since we expect 128bit output
already for a single 256bit input. (One day we should handle AVX2 which again
would need multiple inputs, however there's the problem that we get different
ordered output there and we don't want to reorder, so would need to be able
to tell build_conv to handle upper and lower halfs independently.)
A similar strategy would probably work for 32->8bit too (if it doesn't hit
the special case) but I'm going to try something different for that...

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
7 years agollvmpipe: (trivial) minimally simplify mask construction
Roland Scheidegger [Wed, 21 Dec 2016 03:52:16 +0000 (04:52 +0100)]
llvmpipe: (trivial) minimally simplify mask construction

simd instruction sets usually have comparisons for equal, not unequal.
So use a different comparison against the mask itself - which also means
we don't need a all-zero as well as a all-one (for the pxor) reg.

Also add code to avoid scalar expansion of i1 values which we definitely
shouldn't do. There's problems with this though with llvm select
interaction, so it's disabled (basically using llvm select instead of
intrinsics may still produce atrocious code, even in cases where we
figured it should not, albeit I think this could probably be fixed
with some better selection of optimization passes, but I have zero
idea there really).

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
7 years agoanv: fix multiple creation with internal failure
Lionel Landwerlin [Fri, 23 Dec 2016 17:47:40 +0000 (17:47 +0000)]
anv: fix multiple creation with internal failure

The specification section 9.4 says :

   When an application attempts to create many pipelines in a single
   command, it is possible that some subset may fail creation. In that
   case, the corresponding entries in the pPipelines output array will
   be filled with VK_NULL_HANDLE values. If any pipeline fails
   creation (for example, due to out of memory errors), the
   vkCreate*Pipelines commands will return an error code. The
   implementation will attempt to create all pipelines, and only
   return VK_NULL_HANDLE values for those that actually failed.

Fixes :

   dEQP-VK.api.object_management.alloc_callback_fail_multiple.graphics_pipeline
   dEQP-VK.api.object_management.alloc_callback_fail_multiple.compute_pipeline

v2: C is hard let's go shopping (Lionel)

v3: Remove unnecessary condition in for loops (Lionel)

v4: Document why we return on first failure (Eduardo)
    Move i declaration inside for() (Eduardo)

v5: Move array cleanup out of loop (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
7 years agoswr: [rasterizer core/common/jitter] gl_double support
Tim Rowley [Thu, 5 Jan 2017 13:29:22 +0000 (07:29 -0600)]
swr: [rasterizer core/common/jitter] gl_double support

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99214
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
7 years agodri3: Fix MakeCurrent without a default framebuffer
Fredrik Höglund [Sun, 1 Jan 2017 14:34:17 +0000 (15:34 +0100)]
dri3: Fix MakeCurrent without a default framebuffer

In OpenGL 3.0 and later it is legal to make a context current without
a default framebuffer.

This has been broken since DRI3 support was introduced.

Cc: "13.0 12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoradeonsi: turn SDMA IBs into de-facto preambles of GFX IBs
Marek Olšák [Tue, 27 Dec 2016 18:53:59 +0000 (19:53 +0100)]
radeonsi: turn SDMA IBs into de-facto preambles of GFX IBs

Draw calls no longer flush SDMA IBs. r600_need_dma_space is
responsible for synchronizing execution between both IBs.

Initial buffer clears and fast clears will stay unflushed in the SDMA IB
(up to 64 MB) as long as the GFX IB isn't flushed either.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: implement SDMA-based buffer clearing for SI
Marek Olšák [Tue, 27 Dec 2016 16:51:43 +0000 (17:51 +0100)]
radeonsi: implement SDMA-based buffer clearing for SI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: do all math in bytes in SI DMA code
Marek Olšák [Tue, 27 Dec 2016 16:28:36 +0000 (17:28 +0100)]
radeonsi: do all math in bytes in SI DMA code

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/radeon: prevent SDMA stalls by detecting RAW hazards in need_dma_space
Marek Olšák [Tue, 27 Dec 2016 15:12:05 +0000 (16:12 +0100)]
gallium/radeon: prevent SDMA stalls by detecting RAW hazards in need_dma_space

Call r600_dma_emit_wait_idle only when there is a possibility of
a read-after-write hazard. Buffers not yet used by the SDMA IB don't
have to wait.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/radeon: move unrelated code from dma_emit_wait_idle to need_dma_space
Marek Olšák [Tue, 27 Dec 2016 15:27:21 +0000 (16:27 +0100)]
gallium/radeon: move unrelated code from dma_emit_wait_idle to need_dma_space

r600_dma_emit_wait_idle is going away in its current form.
The only difference is that the moved code is executed before DMA calls
instead of after them.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: inline cik_sdma_do_copy_buffer
Marek Olšák [Tue, 27 Dec 2016 14:48:54 +0000 (15:48 +0100)]
radeonsi: inline cik_sdma_do_copy_buffer

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: also wait for SDMA in the clear_buffer CPU fallback
Marek Olšák [Thu, 29 Dec 2016 18:00:43 +0000 (19:00 +0100)]
radeonsi: also wait for SDMA in the clear_buffer CPU fallback

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: simplify r600_resource typecasts in si_clear_buffer
Marek Olšák [Thu, 29 Dec 2016 18:00:05 +0000 (19:00 +0100)]
radeonsi: simplify r600_resource typecasts in si_clear_buffer

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: always use SDMA for big buffer clears and first buffer uses
Marek Olšák [Tue, 27 Dec 2016 00:33:42 +0000 (01:33 +0100)]
radeonsi: always use SDMA for big buffer clears and first buffer uses

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: use SDMA in rvid_buffer_clear on CIK-VI
Marek Olšák [Sat, 24 Dec 2016 22:00:27 +0000 (23:00 +0100)]
radeonsi: use SDMA in rvid_buffer_clear on CIK-VI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI
Marek Olšák [Sat, 24 Dec 2016 21:57:46 +0000 (22:57 +0100)]
radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agoradeonsi: implement SDMA-based buffer clearing for CIK-VI
Marek Olšák [Sat, 24 Dec 2016 21:52:45 +0000 (22:52 +0100)]
radeonsi: implement SDMA-based buffer clearing for CIK-VI

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/hud: increase the vertex buffer size for text
Marek Olšák [Sun, 25 Dec 2016 20:07:47 +0000 (21:07 +0100)]
gallium/hud: increase the vertex buffer size for text

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/hud: add an option to sort items below graphs
Marek Olšák [Sun, 25 Dec 2016 20:03:25 +0000 (21:03 +0100)]
gallium/hud: add an option to sort items below graphs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/hud: add an option to reset the color counter
Marek Olšák [Sun, 25 Dec 2016 19:21:21 +0000 (20:21 +0100)]
gallium/hud: add an option to reset the color counter

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/hud: allow more data sources per pane
Marek Olšák [Sat, 24 Dec 2016 21:07:00 +0000 (22:07 +0100)]
gallium/hud: allow more data sources per pane

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium/hud: add an option to rename each data source
Marek Olšák [Sat, 24 Dec 2016 19:36:56 +0000 (20:36 +0100)]
gallium/hud: add an option to rename each data source

useful for radeonsi performance counters

v2: allow specifying both : and =

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium: remove TGSI_OPCODE_SUB
Marek Olšák [Mon, 19 Dec 2016 15:11:27 +0000 (16:11 +0100)]
gallium: remove TGSI_OPCODE_SUB

It's redundant with the source modifier.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agogallium: remove TGSI_OPCODE_ABS
Marek Olšák [Mon, 19 Dec 2016 15:11:27 +0000 (16:11 +0100)]
gallium: remove TGSI_OPCODE_ABS

It's redundant with the source modifier.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
7 years agost/nine: Remove all usage of ureg_SUB in nine_shader
Axel Davy [Mon, 19 Dec 2016 18:04:32 +0000 (19:04 +0100)]
st/nine: Remove all usage of ureg_SUB in nine_shader

This is required to drop gallium SUB.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agost/nine: Remove all usage of ureg_SUB in nine_ff
Axel Davy [Mon, 19 Dec 2016 18:01:48 +0000 (19:01 +0100)]
st/nine: Remove all usage of ureg_SUB in nine_ff

This is required to remove gallium SUB.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agost/nine: Do not map SUB and ABS to their gallium equivalent.
Axel Davy [Mon, 19 Dec 2016 17:51:47 +0000 (18:51 +0100)]
st/nine: Do not map SUB and ABS to their gallium equivalent.

This is required for gallium SUB and ABS to be removed.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agoconfigure: Fix another bashism.
Eric Anholt [Wed, 4 Jan 2017 18:52:34 +0000 (10:52 -0800)]
configure: Fix another bashism.

Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agost/mesa: fix a segfault when prog->sh.data is NULL
Marek Olšák [Thu, 5 Jan 2017 12:47:15 +0000 (13:47 +0100)]
st/mesa: fix a segfault when prog->sh.data is NULL

Broken by:
   st/mesa: get Version from gl_program rather than gl_shader_program

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agodocs: add news item and link release notes for 13.0.3
Emil Velikov [Thu, 5 Jan 2017 16:06:59 +0000 (16:06 +0000)]
docs: add news item and link release notes for 13.0.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
7 years agodocs: add sha256 checksums for 13.0.3
Emil Velikov [Thu, 5 Jan 2017 15:59:07 +0000 (15:59 +0000)]
docs: add sha256 checksums for 13.0.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit c8ece92ded9337b9ed60aa9568b41313025a1406)

7 years agodocs: add release notes for 13.0.3
Emil Velikov [Sat, 24 Dec 2016 10:06:50 +0000 (10:06 +0000)]
docs: add release notes for 13.0.3

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit bec04114d2612042bdf61183cfa3416b3a643b68)

7 years agost/va: fix incorrect argument in vl_compositor_cleanup
Nayan Deshmukh [Thu, 5 Jan 2017 14:30:41 +0000 (20:00 +0530)]
st/va: fix incorrect argument in vl_compositor_cleanup

This fixes the mistake introduced in commit
b6737a8bcd03ea68952799144c0c6e6e6679bee9

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoswr: remove unneeded llvm version check
Tim Rowley [Tue, 3 Jan 2017 16:20:10 +0000 (10:20 -0600)]
swr: remove unneeded llvm version check

Old test caused breakage with llvm-svn (4.0.0svn), and not needed as
the minimum required llvm version for swr is 3.6.

Reviewed-by: George Kyriazis <george.kyriazis@intel.com>
7 years agoswr: fix windows build break
George Kyriazis [Wed, 4 Jan 2017 19:13:36 +0000 (13:13 -0600)]
swr: fix windows build break

wrap lp_bld_type.h around extern "C".
Windows decorates global variables, so when used from .cpp files, need
to use an undecorated version.

Also, removed related and unneeded code from swr_screen.cpp

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agoradeonsi: update clip_regs if clip_disable changes to fix a hang
Marek Olšák [Tue, 3 Jan 2017 10:02:41 +0000 (11:02 +0100)]
radeonsi: update clip_regs if clip_disable changes to fix a hang

This seems to fix the GPU hangs caused by:

commit ed3190b3f3a776fc8c75b1e6130a88079166d115
Author: Marek Olšák <marek.olsak@amd.com>
Date:   Sun Nov 13 18:41:43 2016 +0100

    radeonsi: don't export ClipVertex and ClipDistance[] if clipping is disabled

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99219

Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
7 years agost/mesa: enable GLSLOptimizeConservatively for drivers that want it
Marek Olšák [Sat, 31 Dec 2016 12:50:38 +0000 (13:50 +0100)]
st/mesa: enable GLSLOptimizeConservatively for drivers that want it

GLSL compilation now takes 24% less time with the Gallium noop driver.
I used my shader-db for the measurement. The difference for the whole
radeonsi driver can be ~10%.

The generated TGSI is mostly the same. For example, the compilation success
rate with a TGSI->GCN bytecode converter without any optimizations is
the same. Note that glsl_to_tgsi does its own copy propagation and simple
register allocation.

shader-db GCN report:
- Talos spills fewer SGPRs.
- DOTA 2 spills more SGPRs.
- The average shader-db score is better, but it's just due to randomness.

29045 shaders in 17564 tests
Totals:
SGPRS: 1325929 -> 1325017 (-0.07 %)
VGPRS: 1010808 -> 1010172 (-0.06 %)
Spilled SGPRs: 1432 -> 1399 (-2.30 %)
Spilled VGPRs: 93 -> 92 (-1.08 %)
Private memory VGPRs: 688 -> 688 (0.00 %)
Scratch size: 2540 -> 2484 (-2.20 %) dwords per thread
Code Size: 39336732 -> 39342936 (0.02 %) bytes
Max Waves: 217937 -> 217969 (0.01 %)

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoglsl_to_tgsi: do fewer optimizations with GLSLOptimizeConservatively
Marek Olšák [Sat, 31 Dec 2016 12:48:42 +0000 (13:48 +0100)]
glsl_to_tgsi: do fewer optimizations with GLSLOptimizeConservatively

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agomesa: add gl_constants::GLSLOptimizeConservatively
Marek Olšák [Sat, 31 Dec 2016 12:42:09 +0000 (13:42 +0100)]
mesa: add gl_constants::GLSLOptimizeConservatively

to reduce the amount of GLSL optimizations for drivers that can do better.

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agogallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
Marek Olšák [Sat, 31 Dec 2016 12:34:11 +0000 (13:34 +0100)]
gallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY

Drivers with good compilers don't need aggressive optimizations before TGSI.

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoglsl: run do_lower_jumps properly in do_common_optimizations
Marek Olšák [Sat, 31 Dec 2016 11:02:26 +0000 (12:02 +0100)]
glsl: run do_lower_jumps properly in do_common_optimizations

so that backends don't have to run it manually

Reviewed-by: Eric Anholt <eric@anholt.net>
7 years agoi965: Print VS output VUE map in Vulkan too.
Kenneth Graunke [Thu, 5 Jan 2017 01:52:38 +0000 (17:52 -0800)]
i965: Print VS output VUE map in Vulkan too.

We need to move this to the shared layer.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
7 years agoi965: Fix last slot calculations
Kenneth Graunke [Wed, 14 Dec 2016 11:29:29 +0000 (03:29 -0800)]
i965: Fix last slot calculations

If the VUE map has slots at the end which the shader does not write,
then we'd "flush" (constructing an URB write) on the last output it
actually wrote.  Then, we'd construct another SEND with EOT, but with
no actual payload data.  That's not legal.

For example, SSO programs have clip distance slots allocated no matter
what, but the shader may not write them.  If it doesn't write any user
defined varyings, then the clip distance slots will be the last ones.

Found while debugging
dEQP-VK.tessellation.shader_input_output.gl_position_vs_to_tcs_to_tes

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
7 years agodocs: Mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as done for i965/hsw+
Iago Toral Quiroga [Thu, 5 Jan 2017 08:20:48 +0000 (09:20 +0100)]
docs: Mark GL_ARB_gpu_shader_fp64 and OpenGL 4.0 as done for i965/hsw+

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agodocs: add GL_ARB_gpu_shader_fp64 and OpenGL 4.0 support for Intel Haswell.
Iago Toral Quiroga [Thu, 5 Jan 2017 07:53:08 +0000 (08:53 +0100)]
docs: add GL_ARB_gpu_shader_fp64 and OpenGL 4.0 support for Intel Haswell.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
7 years agoi965: add a kernel_features bitfield to intel screen
Iago Toral Quiroga [Wed, 4 Jan 2017 09:46:08 +0000 (10:46 +0100)]
i965: add a kernel_features bitfield to intel screen

We can use this to track various features that may or may not be supported
by the hw / kernel. Currently, we usually do this by checking the generation
and supported command parser versions in various places thoughtout the driver
code. With this patch, we centralize all these checks in just once place at
screen creation time, then we just query the bitfield wherever we need to
check if a particular feature is supported.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965/gen7: Enable OpenGL 4.0 in Haswell when supported
Iago Toral Quiroga [Tue, 3 Jan 2017 08:27:09 +0000 (09:27 +0100)]
i965/gen7: Enable OpenGL 4.0 in Haswell when supported

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965: get rid of brw->can_do_pipelined_register_writes
Iago Toral Quiroga [Wed, 4 Jan 2017 08:06:06 +0000 (09:06 +0100)]
i965: get rid of brw->can_do_pipelined_register_writes

Instead, check the screen field directly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965: Move the pipelined test for SO register access to the screen
Chris Wilson [Wed, 4 Jan 2017 07:34:59 +0000 (08:34 +0100)]
i965: Move the pipelined test for SO register access to the screen

Moving the test to the screen places it alongside the other global HW
feature tests that want to be shared between contexts.

Also, we need to know if we support pipelined register writes at
screen creation time so that we can tell if we can expose OpenGL 4.0
in gen7.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965/disasm: remove printing hstride and width in align16 DF source regions
Samuel Iglesias Gonsálvez [Wed, 14 Dec 2016 12:46:52 +0000 (13:46 +0100)]
i965/disasm: remove printing hstride and width in align16 DF source regions

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agovec4: use DIM instruction when loading DF immediates in HSW
Samuel Iglesias Gonsálvez [Wed, 7 Dec 2016 09:32:38 +0000 (10:32 +0100)]
vec4: use DIM instruction when loading DF immediates in HSW

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
7 years agoglcpp: Remove illegal characters from tests
Carl Worth [Tue, 5 Aug 2014 23:33:05 +0000 (16:33 -0700)]
glcpp: Remove illegal characters from tests

Some of the existing tests were using '@' and '"' incidentally within the test
body. Neither of these characters are actually legal for GLSL. And since we
are planning to start generating errors for illegal characters, we need to
first make the test suite clean.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoglcpp: Exhaustively test all legal characters in GLSL
Carl Worth [Tue, 5 Aug 2014 23:33:04 +0000 (16:33 -0700)]
glcpp: Exhaustively test all legal characters in GLSL

Here, each legal character (as defined by GLSL Language Specification version
4.30.6, section 3.1) appears at least once in the input file. Obviously,
characters with special meaning (like '#' and '\') aren't treated exhaustively
with respect to all their possible uses. We have many other tests for that.

Here, we're simply ensuring that the test suite sees every legal character at
least once.

v2 (by Ken): Fix expectations, move to src/compiler, renumber tests.

   Carl's .expected:            Updated .expected:

   ..                           ..

   . .                          . .
   . .                          . .
   . .                          . .
   . .                          . .
   .                            ..
   .                            .
   .                            .
   .

(For some reason, the original test expected ".." to produce two lines.
glcpp, cpp, and mcpp all follow my updated behavior, so I believe it to
be correct.)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoglcpp: Allow vertical tab and form feed characters in GLSL
Carl Worth [Tue, 5 Aug 2014 23:33:03 +0000 (16:33 -0700)]
glcpp: Allow vertical tab and form feed characters in GLSL

Of course, these aren't really useful for anything, but the GLSL language
specification does allow them:

The source character set used for the OpenGL shading languages,
outside of comments, is a subset of UTF-8. It includes the following
characters:
...

White space: the space character, horizontal tab, vertical tab, form
feed, carriage-return, and line- feed.

[GLSL Language Specification 4.30.6, section 3.1]

So treat vertical tab ('\v' or ^K) and form-feed ('\f' or ^L) as horizontal
space characters.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoglcpp: Add testing for no space between macro name and replacement list
Carl Worth [Tue, 5 Aug 2014 23:33:02 +0000 (16:33 -0700)]
glcpp: Add testing for no space between macro name and replacement list

GCC's preprocessor accepts a macro definition where there is no space between
the macro's identifier name and the replacementlist. (GCC does emit a "missing
space" warning that we don't, but that's fine.)

This is an exhaustive test that verifies that all legal GLSL characters that
could possibly be interpreted as separating the macro name from the
replacement list are interpreted as such. So the testing here includes all
valid GLSL symbols except for:

  * Characters that can be part of an identifier (a-z, A-Z, 0-9, _)

  * Backslash, (allowed only as line continuation)

  * Hash, (allowed only to introduce pre-processor directive, or as part of a
           paste operator in a replacement list---but not as first token of
           replacement list)

  * Space characters (since the point of the testing is to have missing space)

  * Left parenthesis (which would indicate a function-like macro)

v2 (Ken): Move to src/compiler, renumber tests.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agospirv: compute push constant access offset & range
Lionel Landwerlin [Tue, 13 Dec 2016 11:18:01 +0000 (11:18 +0000)]
spirv: compute push constant access offset & range

v2: Move relative push constant relative offset computation down to
    _vtn_load_store_tail() (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agospirv: move block_size() definition
Lionel Landwerlin [Sat, 17 Dec 2016 22:25:37 +0000 (22:25 +0000)]
spirv: move block_size() definition

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agova: call texture_get_handle while the mutex is being held
Marek Olšák [Wed, 4 Jan 2017 10:42:13 +0000 (11:42 +0100)]
va: call texture_get_handle while the mutex is being held

The context may be used by texture_get_handle.

Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
7 years agovdpau: call texture_get_handle while the mutex is being held
Marek Olšák [Wed, 4 Jan 2017 10:42:13 +0000 (11:42 +0100)]
vdpau: call texture_get_handle while the mutex is being held

The context may be used by texture_get_handle.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99158

Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: 13.0 <mesa-stable@lists.freedesktop.org>
7 years agoradeonsi: capitalize VM hex addr when dumping buffer list
Samuel Pitoiset [Tue, 3 Jan 2017 17:41:13 +0000 (18:41 +0100)]
radeonsi: capitalize VM hex addr when dumping buffer list

Useful when debugging with R600_DEBUG=vm,check_vm to match
addr in both outputs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
7 years agoi965: remove unused brwInitVtbl declaration
Tapani Pälli [Mon, 2 Jan 2017 13:02:03 +0000 (15:02 +0200)]
i965: remove unused brwInitVtbl declaration

function was removed by b3360d23ac1db61390b2ac8963756c6133ba6e23

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
7 years agoi965: remove brw_context dependency from intel_batchbuffer_init()
Iago Toral Quiroga [Tue, 3 Jan 2017 08:10:13 +0000 (09:10 +0100)]
i965: remove brw_context dependency from intel_batchbuffer_init()

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965: make intel_batchbuffer_free() take a batchbuffer as argument
Iago Toral Quiroga [Tue, 3 Jan 2017 07:39:27 +0000 (08:39 +0100)]
i965: make intel_batchbuffer_free() take a batchbuffer as argument

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965: make intel_batchbuffer_emit_dword() take a batchbuffer as argument
Iago Toral Quiroga [Mon, 2 Jan 2017 15:28:55 +0000 (16:28 +0100)]
i965: make intel_batchbuffer_emit_dword() take a batchbuffer as argument

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agoi965: Make intel_bachbuffer_reloc() take a batchbuffer argument
Iago Toral Quiroga [Mon, 2 Jan 2017 15:14:33 +0000 (16:14 +0100)]
i965: Make intel_bachbuffer_reloc() take a batchbuffer argument

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agonir: fix loop iteration count calculation for floats
Timothy Arceri [Tue, 3 Jan 2017 01:03:54 +0000 (12:03 +1100)]
nir: fix loop iteration count calculation for floats

Fixes performance regression in SynMark PSPom caused by loops with float
counters not always unrolling.

For example:

   for (float i = 0.02; i < 0.9; i += 0.11)
      ...

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
7 years agogallium/hud: add a path separator between dump directory and filename
Edmondo Tommasina [Sun, 1 Jan 2017 21:31:57 +0000 (22:31 +0100)]
gallium/hud: add a path separator between dump directory and filename

It's more user friendly and it avoids to write files in unexpected
places.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agor600/sb: Fix loop optimization related hangs on eg
Heiko Przybyl [Sun, 20 Nov 2016 13:42:28 +0000 (14:42 +0100)]
r600/sb: Fix loop optimization related hangs on eg

Make sure unused ops and their references are removed, prior to entering
the GCM (global code motion) pass, to stop GCM from breaking the loop
logic and thus hanging the GPU.

Turns out, that sb has problems with loops and node optimizations
regarding associative folding:

- the global code motion (gcm) pass moves ops up a loop level/basic block
until they've fulfilled their total usage count
- if there are ops folded into others, the usage count won't be
fulfilled and thus the op moved way up to the top
- within GCM the op would be visited and their deps would be moved
alongside it, to fulfill the src constaints
- in a loop, an unused op is moved out of the loop and GCM would move
the src value ops up as well
- now here arises the problem: if the loop counter is one of the src
values it would get moved up as well, the loop break condition would
never get hit and the shader turn into an endless loop, resulting in the
GPU hanging and being reset

A reduced (albeit nonsense) piglit example would be:

[require]
GLSL >= 1.20

[fragment shader]

uniform int SIZE;
uniform vec4 lights[512];

void main()
{
    float x = 0;
    for(int i = 0; i < SIZE; i++)
        x += lights[2*i+1].x;
}

[test]
uniform int SIZE 1
draw rect -1 -1 2 2

Which gets optimized to:

===== SHADER #12 OPT ================================== PS/BARTS/EVERGREEN =====
===== 42 dw ===== 1 gprs ===== 2 stack =========================================
ALU 3 @24
     1      y: MOV                R0.y,  0
            t: MULLO_UINT         R0.w,  [0x00000002 2.8026e-45].x, R0.z

LOOP_START_DX10 @22
PUSH @6
ALU 1 @30 KC0[CB0:0-15]
     2 M    x: PRED_SETGE_INT     __.x,  R0.z, KC0[0].x
JUMP @14 POP:1
LOOP_BREAK @20
POP @14 POP:1
ALU 2 @32
     3      x: ADD_INT            R0.x,  R0.w, [0x00000002 2.8026e-45].x

TEX 1 @36
               VFETCH             R0.x___, R0.x,   RID:0   MFC:16 UCF:0 FMT[..]
ALU 1 @40
     4      y: ADD                R0.y,  R0.y, R0.x
LOOP_END @4
EXPORT_DONE        PIXEL 0     R0.____  EOP
===== SHADER_END ===============================================================

Notice R0.z being the loop counter/break condition relevant register
and being never incremented at all. Also some of the loop content
has been moved out of it, to fulfill the requirements for the one unused
op.

With a debug build of mesa this would produce an error like
error at : PRED_SETGE_INT     __, __, EM.2,    R1.x.2||FP@R0.z, C0.x
  : operand value R1.x.2||FP@R0.z was not previously written to its gpr
and the compilation would fail due to this. On a release build it gets
passed to the GPU.

When using this patch, the loop remains intact:

===== SHADER #12 OPT ================================== PS/BARTS/EVERGREEN =====
===== 48 dw ===== 1 gprs ===== 2 stack =========================================
ALU 2 @24
     1      y: MOV                R0.y,  0
            z: MOV                R0.z,  0
LOOP_START_DX10 @22
PUSH @6
ALU 1 @28 KC0[CB0:0-15]
     2 M    x: PRED_SETGE_INT     __.x,  R0.z, KC0[0].x
JUMP @14 POP:1
LOOP_BREAK @20
POP @14 POP:1
ALU 4 @30
     3      t: MULLO_UINT         T0.x,  [0x00000002 2.8026e-45].x, R0.z

     4      x: ADD_INT            R0.x,  T0.x, [0x00000002 2.8026e-45].x

TEX 1 @40
               VFETCH             R0.x___, R0.x,   RID:0   MFC:16 UCF:0 FMT[..]
ALU 2 @44
     5      y: ADD                R0.y,  R0.y, R0.x
            z: ADD_INT            R0.z,  R0.z, 1
LOOP_END @4
EXPORT_DONE        PIXEL 0     R0.____  EOP
===== SHADER_END ===============================================================

Piglit: ./piglit summary console -d results/*_gpu_noglx
        name: unpatched_gpu_noglx patched_gpu_noglx
        ----  ------------------- -----------------
        pass:               18016             18021
        fail:                 748               743
        crash:                  7                 7
        skip:                1124              1124
        timeout:                0                 0
        warn:                  13                13
        incomplete:             0                 0
        dmesg-warn:             0                 0
        dmesg-fail:             0                 0
        changes:                0                 5
        fixes:                  0                 5
        regressions:            0                 0
        total:              19908             19908

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94900
Tested-by: Heiko Przybyl <lil_tux@web.de>
Tested-on: Barts PRO HD6850
Signed-off-by: Heiko Przybyl <lil_tux@web.de>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
7 years agoeditorconfig: Fix up the tab rendering width.
Eric Anholt [Tue, 27 Dec 2016 17:00:14 +0000 (09:00 -0800)]
editorconfig: Fix up the tab rendering width.

Our editorconfig file looked sensible, saying that we wanted to indent
with spaces and use 3/4/whatever space indentation.  However, the spec has
this little surprise:

    "tab_width: a whole number defining the number of columns used to
     represent a tab character. This defaults to the value of indent_size
     and doesn't usually need to be specified."

so once my editor started respecting editorconfig, the files that have
tabs left in them started getting rendered wrong, showing up like this in
brw_program.c:

   case GL_COMPUTE_PROGRAM_NV: {
      struct brw_program *prog = rzalloc(NULL, struct brw_program);
      if (prog) {
    prog->id = get_new_program_id(brw->screen);

    return _mesa_init_gl_program(&prog->program, target, id);
      }
      else
    return NULL;
   }

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
7 years agometa: Disable dithering during glGenerateMipmap
Chad Versace [Thu, 29 Dec 2016 21:05:27 +0000 (13:05 -0800)]
meta: Disable dithering during glGenerateMipmap

Fixes tests 'dEQP-GLES3.functional.texture.mipmap.*.generate.rgba5551*' on
Intel Broadwell 0x1616.

The GL 4.5 spec describes the algorithm of glGenerateMipmap as:

    The contents of the derived images are computed by repeated, filtered
    reduction of the level base image.  [...] No particular filter algorithm is
    required, though a box filter is recommended as the default filter.

Consider a texture for which all pixels are identical at level 0.
From the spec's description above, one may reasonably assume that the "filtered
reduction" of level 0 produces a new miplevel for which again all pixels are
identical. For any 2x2 subspan of identical pixels, it is difficult to see how
the "filtered reduction" of that subspan can produce a pixel that differs from
the source pixels.

Dithering during _mesa_meta_GenerateMipmap() violated that reasonable
assumption.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99210
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
7 years agodoc/features.txt: update for freedreno
Romain Failliot [Tue, 3 Jan 2017 15:41:22 +0000 (10:41 -0500)]
doc/features.txt: update for freedreno

I lost track of who created initial patch (Ilia?).. Romain rebased it.
I pushed it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95460
Signed-off-by: Rob Clark <robdclark@gmail.com>
7 years agoi965: Remove perf monitor/query backend
Robert Bragg [Wed, 22 Apr 2015 18:40:34 +0000 (11:40 -0700)]
i965: Remove perf monitor/query backend

In its current state the unified i965 backend for
AMD_performance_monitor and INTEL_performance_query isn't able to report
meaningful Observation Architecture metrics since we haven't so far had
the necessary kernel support to fully configure the OA unit, nor the
corresponding support for normalizing the counters into a form that can
be usefully interpreted by application developers (as opposed to raw
values that may, for example, scale by the number of EUs there are).

So that we can focus on implementing just one of these extensions fully
and since we anticipate some significant backend changes as we look to
use a new kernel interface to configure the OA unit, this patch removes
the current backend. This will simplify our ability to update the
frontend infrastructure and backend interface before updating our
support for performance counters.

Signed-off-by: Robert Bragg <robert@sixbynine.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
7 years agovl/zscan: fix "Fix trivial sign compare warnings"
Christian König [Wed, 14 Dec 2016 14:03:35 +0000 (15:03 +0100)]
vl/zscan: fix "Fix trivial sign compare warnings"

The variable actually needs to be signed, otherwise converting it to a
float doesn't work as expected.

Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=98914
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Fixes: 1fb4179f927 ("vl: Fix trivial sign compare warnings")
7 years agost/va: error handling
Nayan Deshmukh [Tue, 3 Jan 2017 10:47:47 +0000 (16:17 +0530)]
st/va: error handling

handle the cases when vl_compositor_set_csc_matrix(),
vl_compositor_init_state() and vl_compositor_init() fail

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agost/vdpau: error handling
Nayan Deshmukh [Tue, 3 Jan 2017 10:47:46 +0000 (16:17 +0530)]
st/vdpau: error handling

handle the cases when vl_compositor_set_csc_matrix(),
vl_compositor_init_state() and vl_compositor_init() fail

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agovl/compositor: implement error handling
Nayan Deshmukh [Tue, 3 Jan 2017 10:47:45 +0000 (16:17 +0530)]
vl/compositor: implement error handling

pipe_buffer_map and pipe_buffer_create may return NULL

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
7 years agoi965/vec4: enable ARB_gpu_shader_fp64 for Haswell
Iago Toral Quiroga [Thu, 23 Jun 2016 07:22:09 +0000 (09:22 +0200)]
i965/vec4: enable ARB_gpu_shader_fp64 for Haswell

Reviewed-by: Matt Turner <mattst88@gmail.com>