pipe-loader: note that we leak pipe_loader_drm_device->base->driver_name

The string is malloc'd (strdup) in loader_get_driver_for_fd().

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

automake: stop building i915-sw and drop explicit linking to softpipe

Unused and possibly broken. Will be completely removed in
upcomming commits.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

nv30: hack to avoid errors on unexpected color/zeta combinations

This is just a hack, it should be possible to create a temporary zeta
surface and render to that instead. However that's more complicated and
this avoids the render being entirely broken and errors being reported
by the card.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv30: tidy screen caps, add missing ones

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv30: avoid dangling references to deleted contexts

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv30: plug some memory leaks on screen destroy and shader compile

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

nv50: organize screen caps

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: organize screen caps

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: remove vport_int hack and instead use the usual state validation

Commit ad4dc772 fixed an issue with the viewport not being restored
correctly. However it's rather hackish and confusing. Instead just mark
the viewport dirty and let the viewport validation take care of it.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

r300g: don't advertize PIPE_FORMAT_B10G10R10X2_UNORM on < r500

Signed-off-by: David Heidelberger <david.heidelberger@ixit.cz>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: implement ARB_texture_query_lod

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

radeonsi: pass ARB_conservative_depth parameters to the hardware

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

gallium: implement ARB_texture_query_levels

The extension is always supported if GLSL 1.30 is supported.

Softpipe and llvmpipe support is also added (trivial).
Radeon and nouveau support is already done.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

st/mesa: set sampler_view::last_level correctly

It was set to pipe_resource::last_level and _MaxLevel was embedded in max_lod,
that's why it worked for ordinary texturing. However, min_lod doesn't have
any effect on texelFetch and textureQueryLevels, so we must still set
last_level correctly.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

st/mesa: handle array textures in st_texture_image_copy

Marek: also handle cube arrays

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

radeonsi: cosmetic changes in si_shader.c

reviewed by Michel Dänzer

radeonsi: implement ARB_texture_gather and Gather functions from GLSL 4.00

All ARB_texture_gather and gather-related ARB_gpu_shader5 piglit tests pass.

reviewed by Michel Dänzer

st/mesa: fix geometry shader max texture limit in state validation

Reviewed-by: Brian Paul <brianp@vmware.com>

r600g: fix the max vertex shader input limit

meta: Respect the driver's maximum number of draw buffers

Commit c1c1cf5f9 added infrastructure for saving and restoring draw
buffer state.  However, it universially used MAX_DRAW_BUFFERS, but many
drivers support far fewer than that at limit.  For example, the radeon
and i915 drivers only support 1.  Using MAX_DRAW_BUFFERS causes meta to
generate GL errors.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80115
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Kenneth Graunke <kenneth@whitecape.org> [on Broadwell]
Tested-by: jpsinthemix@verizon.net
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

gallivm: fix SCALED -> NORM conversions

Such conversions (which are most likely rather pointless in practice) were
resulting in shifts with negative shift counts and shifts with counts the same
as the bit width. This was always undefined in llvm, the code generated was
rather horrendous but happened to work.
So make sure such shifts are filtered out and replaced with something that
works (the generated code is still just as horrendous as before).

This fixes lp_test_format, https://bugs.freedesktop.org/show_bug.cgi?id=73846.

v2: prettify by using build context shift helpers.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

mesa: Remove glClear optimization based on drawable size

A drawable size of 0x0 means that we don't have buffers for a drawable yet,
not that we have a zero-sized buffer.  Core mesa shouldn't be optimizing out
drawing based on buffer size, since the draw call could be what triggers
the driver to go and get buffers.  As discussed in the referenced bug report,
the optimization was added as part of a scatter-shot attempt to fix a
different problem.  There's no other example in mesa core of using the
buffer size in this way.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74005
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: In emit_texenv() type mismatch was forced with typecast

Type mismatch caused random memory to be copied when casted
memory area was smaller than expected type.

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

radeon/uvd: disable VC-1 simple/main on UVD 2.x

It's about as broken as on later UVD revisions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66452
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>

radeonsi: add sampling of 4:2:2 subsampled textures

This makes 4:2:2 video surfaces work in VDPAU.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

util/u_format: move utility function from r600g

We need this for radeonsi, and it might be useful for other drivers,
too.

radeon/vce: set number of cpbs based on level

v2: add error check for cpb size 0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

radeon/vce: implement h264 level support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/omx/enc: implement h264 level support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

vl: add level interface

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/st/omx: fix switch-case indentation in vid_enc.c

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

glx: Add an error message when a direct renderer's createScreen() routine fails
because no matching fbConfigs or visuals could be found.

Nearly all the error cases in *createScreen() issue an error message to diagnose
the failure to initialize before branching to handle_error.  The few remaining
error cases which don't should probably do the same.

(At the moment, it seems this can be triggered in drisw with an X server which
reports definite values for MAX_PBUFFFER_(WIDTH|HEIGHT|SIZE), because those
attributes are checked for an exact match against 0.)

Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: unit test for copy propagation and writemask

This unit test demonstrates a subtle bug fixed by
4ddf51db6af36736d5d42c1043eeea86e47459ce.

Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965/vec4/gs: Silence warning about unused 'success' in release build.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965/disasm: Mark three_source_reg_encoding[] static.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965/blorp: Remove unused 'brw' member.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965/blorp: Mark branch unreachable to silence uninitialized var warning.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Silence warning about unused brw in release builds.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Mark backend_instruction and bblock_t as structs.

They have to be marked as structs for C code elsewhere. bblock_t is
already defined as a struct, and all of backend_instruction's fields are
public anyway.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Use standard SSE intrinsics instead of gcc built-ins.

Let's this file compile with clang.

Reviewed-by: Frank Henigman <fjhenigman@google.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: Remove unused functions from perfomance query code.

Perhaps useful for debugging? Never used otherwise. Added by commit
8cf5bdad.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: Remove unused extra_EXT_texture_integer.

Unused since commit b6475f94.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: Mark default case unreachable to silence warning.

Warned about 'coord' being undefined in the default case, which is
unreachable.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

egl: Remove unused variable dri_driver_path.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

swrast: Remove unused solve_plane_recip().

Unused since commit 9e8a961d.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: Remove 'struct' from ir_variable declaration.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

Revert "i965: Add 'wait' instruction support"

This reverts commit 20be3ff57670529a410b30a1008a71e768d08428.

No evidence of ever being used.

i965/fs: Optimize SEL with the same sources into a MOV.

instructions in affected programs:     474 -> 462 (-2.53%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Perform CSE on texture operations.

Helps Unigine Tropics and some (old) gstreamer shaders in shader-db.

instructions in affected programs:     792 -> 744 (-6.06%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Copy propagate from load_payload.

But only into non-load_payload instructions. Otherwise we would prevent
register coalescing from combining identical payloads.

i965/fs: Perform CSE on load_payload instructions if it's not a copy.

Since CSE creates instructions, if we let CSE generate things register
coalescing can't remove, bad things will happen. Only let CSE combine
non-copy load_payloads.

E.g., allow CSE to handle this

   load_payload vgrf4+0, vgrf5, vgrf6

but not this

   load_payload vgrf4+0, vgrf5+0, vgrf5+1

i965/fs: Support register coalescing on LOAD_PAYLOAD operands.

i965/fs: Emit load_payload instead of multiple MOVs for large VGRFs.

i965/fs: Only consider real sources when comparing instructions.

i965/fs: Apply cube map array fixup and restore the payload.

So that we don't have partial writes to a large VGRF. Will be cleaned up
by register coalescing.

i965/fs: Use LOAD_PAYLOAD in emit_texture_gen7().

i965/fs: Lower LOAD_PAYLOAD and clean up.

Clean up with with register_coalesce()/dead_code_eliminate().

i965/fs: Add SHADER_OPCODE_LOAD_PAYLOAD.

Will be used to simplify the handling of large virtual GRFs in SSA form.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

glsl: type check between switch init-expression and case

Patch adds a type check between switch init-expression and case label
and performs a implicit signed->unsigned type conversion when possible.

v2: add GLSL spec reference, do implicit conversion if possible (Matt)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79724
Reviewed-by: Matt Turner <mattst88@gmail.com>

nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX

Use TGSI_SEMANTIC_VIEWPORT_INDEX for the last consumer.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

docs: update GL3.txt, relnotes: mark GL_ARB_viewport_array as done for nvc0

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nvc0: implement multiple viewports/scissors, enable ARB_viewport_array

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: mark things dirty on ctx switch, 3d blit]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: make sure to mark first scissor dirty after blit

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965: Use 8x4 aligned rectangles for HiZ operations on Broadwell.

Like on Haswell, we need to use 8x4 aligned rectangle primitives for
hierarchical depth buffer resolves and depth clears.  See the comments
in brw_blorp.cpp's brw_hiz_op_params() constructor.  (The Broadwell
documentation confirms that this is still necessary.)

This patch makes the Broadwell code follow the same behavior as Chad and
Jordan's Gen7 BLORP code.  Based on a patch by Topi Pohjolainen.

This fixes es3conform's framebuffer_blit_functionality_scissor_blit
test, with no Piglit regressions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965: Make INTEL_DEBUG=mip print out whether HiZ is enabled.

We only enable HiZ for miplevels which are aligned on 8x4 blocks.  When
debugging HiZ failures, it's useful to know whether a particular
miplevel is using HiZ or not.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

glsl/cs: Fix local_size_y and local_size_z

flags.q.local_size has 3 bits. One each for x, y and z.

Fixes piglit's:
* spec/ARB_compute_shader/linker/mismatched_local_work_sizes
* spec/ARB_compute_shader/compiler/default_local_size.comp
* spec/ARB_compute_shader/compiler/work_group_size_too_large
* spec/ARB_compute_shader/compiler/gl_WorkGroupSize_matches_layout.comp

This was regressed in 738c9c3c.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

main/extensions: Only parse MESA_EXTENSION_OVERRIDE once

Previously, we would parse MESA_EXTENSION_OVERRIDE each time a context
was created. Now we will save the results of that parsing and use it
during context initialization.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

main/extensions: Build list of extensions that can't be disabled

This will allow us to utilize the early MESA_EXTENSION_OVERRIDE
parsing at the later extension string initialization step.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

main/extensions: Create extra extensions override string

This will allow us to utilize the early MESA_EXTENSION_OVERRIDE
parsing at the later extension string initialization step.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/cs: Use override structure rather than separate env var

In 25268b93, we added a new environment variable
(INTEL_COMPUTE_SHADER) to allow some constant values to be upgraded
for the ARB_compute_shader extension.

Now, we can look to see if the extension was enabled via the
MESA_EXTENSION_OVERRIDE environment variable.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

main/extensions: Add early extension override structures

During the early one_time_init phase of context creation, we
initialize two global gl_extensions structures.

We read the MESA_EXTENSION_OVERRIDE environment variable, and store
positive and negative overrides in two structures:
* struct gl_extensions _mesa_extension_override_enables
* struct gl_extensions _mesa_extension_override_disables

These are filled before the driver initializes extensions and
constants, therefore the driver can make adjustments based on the
desired overrides.

This can be useful during development of a new extension where the
extension is only partially ready. The driver can't actually advertise
support for the extension, but if it sees that the override is set for
the extension, then it can expose more supported parts of the
extension, such as upgrading context constants.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

main/extensions: Create a context-less set_extensions function

We will add new gl_extensions structures that capture the environment
variable extension overrides and are available early in context
creation.

This will allow a driver to take actions during its initialization
based on the extension overrides.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

main/extensions: Don't advertise unknown extensions overrides with (-)

Previously setting:
MESA_EXTENSION_OVERRIDE=-GL_MESA_ham_sandwich

Would cause Mesa to advertise support for the GL_MESA_ham_sandwich
extension, even though the override specifically asked for it to be
disabled.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

radeonsi: fixup sizes of shader resource and sampler arrays

This was wrong for a very long time. I wonder if the array size has any
effect on anything.

Reviewed-by: Christian König <christian.koenig@amd.com>

scons: Link libGL.so against xcb-dri2.

Fixing undefined xcb_dri2_* symbols.

Trivial.

r600g/radeonsi: Remove default case from PIPE_COMPUTE_CAP_* switch

This way, the compiler warns about unhandled caps.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

docs: update ARB_explicit_uniform_location status

+ modify release notes for 10.3

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>

Enable GL_ARB_explicit_uniform_location in the drivers.

v2: enable also for i915 (Ian)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>

glsl: parser changes for GL_ARB_explicit_uniform_location

Patch adds a preprocessor define for the extension and stores explicit
location data for uniforms during AST->HIR conversion. It also sets
layout token to be available when having the extension in place.

v2: change parser check to require GLSL 330 or enabling
    GL_ARB_explicit_attrib_location (Ian)
v3: fix the check and comment in AST->HIR (Petri)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>

glsl: add enable bit for ARB_explicit_uniform_location

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: support inactive uniforms in glUniform* functions

Support inactive uniforms that have explicit location set in
glUniform* functions.

v2: remove unnecessary extension check, use new define (Ian)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl/linker: assign explicit uniform locations

Patch refactors the existing uniform processing so explicit locations
are taken in to account during variable processing. These locations
are temporarily stored in gl_uniform_storage before actual locations
are set.

UNMAPPED_UNIFORM_LOC marks unset location so that we can use 0 as a
valid explicit location.

When locations are set, UniformRemapTable is first populated with
uniforms that have explicit location set (inactive and active ones),
rest are put after explicit location slots.

v2: introduce define for locations that have not been set yet (Ian)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl/linker: initialize explicit uniform locations

Patch initializes the UniformRemapTable for explicit locations. This
needs to happen before optimizations to make sure all inactive uniforms
get their explicit locations correctly.

v2: fix initialization bug, introduce define for inactive uniforms (Ian)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glsl: add glsl_type::uniform_locations() helper function

This function calculates the number of unique values from
glGetUniformLocation for the elements of the type.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: add new enum MAX_UNIFORM_LOCATIONS

Patch adds new implementation dependent value required by the
GL_ARB_explicit_uniform_location extension. Default value for user
assignable locations is calculated as sum of MaxUniformComponents
for each stage.

v2: fix descriptor in get_hash_params.py (Petri)
v3: simpler formula for calculating initial value (Ian)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

mesa: add enable bit for ARB_explicit_uniform_location

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glapi: add GL_ARB_explicit_uniform_location

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965/vec4: Use the sampler for pull constant loads on Broadwell.

We've used the LD sampler message for pull constant loads on earlier
hardware for some time, and also were already using it for the FS on
Broadwell.  This patch makes us use it for Broadwell VS/GS as well.

I believe that when I wrote this code in 2012, we still used the data
port in some cases, and I somehow neglected to convert it while
rebasing.

Improves performance in GLBenchmark 2.7 Egypt by 416.978% +/- 2.25821%
(n = 17).  Many other applications should benefit similarly: this speeds
up uniform array access in the VS, which is commonly used for skinning
shaders, among other things.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965: Add missing newlines to a few perf_debug messages.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965: Drop Broadwell perf_debugs about missing MOCS that aren't missing.

I actually added MOCS support for these things, but forgot to delete the
corresponding perf_debug() warnings.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965: Add missing MOCS setup for 3DSTATE_INDEX_BUFFER on Broadwell.

Somehow I missed this when adding all of the other MOCS values.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>

i965/vec4: Fix dead code elimination for VGRFs of size > 1.

When faced with code such as:

    mov vgrf31.0:UD, 960D
    mov vgrf31.1:UD, vgrf30.xxxx:UD

The dead code eliminator didn't consider reg_offsets, so it decided that
the second instruction was writing was writing to the same register as
the first one, and eliminated the first one.  But they're actually
different registers.

This fixes INTEL_DEBUG=shader_time for vertex shaders.  In the above
code, vgrf31.0 represents the offset into the shader_time buffer where
the data should be written, and vgrf31.1 represents the actual time
data.  With a completely undefined offset, results were...unexpected.

I think this is probably one of the few cases (maybe only case) where we
generate multiple MOVs to a large VGRF.  Normally, we just use them as
texturing results; the other SEND-from-GRF uses a size 1 VGRF.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79029
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: mesa-stable@lists.freedesktop.org

i965: Add SHADER_OPCODE_SHADER_TIME_ADD to dump_instructions() decode.

"shader_time_add" is a lot more informative than "op152".

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Fix clang mismatched-tags warnings with glsl_type.

Fix clang mismatched-tags warnings introduced with commit
4f5445a45d3ed02e00a061b10c943c0b079c6020.

./glsl_symbol_table.h:37:1: warning: class 'glsl_type' was previously declared as a struct [-Wmismatched-tags]
class glsl_type;
^
./glsl_types.h:86:8: note: previous use is here
struct glsl_type {
       ^
./glsl_symbol_table.h:37:1: note: did you mean struct here?
class glsl_type;
^~~~~

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

mesa/drivers: Fix clang constant-logical-operand warnings.

This patch fixes several clang constant-logical-operand warnings such as
the following.

../../../../../src/mesa/tnl_dd/t_dd_tritmp.h:130:32: warning: use of logical '||' with constant operand [-Wconstant-logical-operand]
   if (DO_TWOSIDE || DO_OFFSET || DO_UNFILLED || DO_TWOSTENCIL)
                               ^  ~~~~~~~~~~~
../../../../../src/mesa/tnl_dd/t_dd_tritmp.h:130:32: note: use '|' for a bitwise operation
   if (DO_TWOSIDE || DO_OFFSET || DO_UNFILLED || DO_TWOSTENCIL)
                               ^~
                               |

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

glsl: Correct more typos

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>

radeon/compute: Always report at least 1 compute unit

Some apps will abort if they detect 0 compute units.  This fixes
crashes in some OpenCV tests.

meta_blit: properly compute texture width for the CopyTexSubImage fallback

Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

freedreno/a3xx: vtx formats

Add support for more vertex buffer formats.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

freedreno: update generated headers

Signed-off-by: Rob Clark <robclark@freedesktop.org>