st/vdpau: fix bogus error handling in output/bitmap creation

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/vdpau: don't return a device if the screen doesn't support NPOT

NV3x cards don't support NPOT textures. Technically this restriction
could be worked around, but since it also doesn't expose any video
decoding hw, just turn it off entirely.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: 10.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>

pipe-loader: Fix build

pipe_loader_drm.c: In function 'pipe_loader_drm_probe_fd':
pipe_loader_drm.c:120:4: error: implicit declaration of function 'loader_get_pci_id_for_fd' [-Werror=implicit-function-declaration]

Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>

loader: ifdef libdrm specific code and include

Mesa provides the flexibility of building without the
need to have libdrm present on the system. The situation
has regressed with the recent commit

commit 8c2e7fd8460750543367053b1be9368cc38e1d6a
Author: Emil Velikov <emil.l.velikov@gmail.com>
Date:   Fri Jan 10 23:36:16 2014 +0000

    loader: introduce the loader util lib

By isolating libdrm code by #ifndef __NOT_HAVE_DRM_H we
can have libdrm-less builds on across all build systems.

This patch converts Android's _EGL_NO_DRM to __NOT_HAVE_DRM_H
to provide consistency with the other cases within mesa, allows
compilation of libloader on libdrm-less scons and conditionally
links against libdrm if present under automake.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73776
BUgzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73777
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Double the push constant space multipliers on Broadwell too.

Broadwell has 2Kb push constant size increments like Haswell GT3.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Update invariant state for Broadwell.

The only difference is that STATE_SIP takes a 48-bit address, so we need
to output two zeroes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Use the Sandybridge VUE format on Broadwell as well.

It hasn't changed.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>

i965: Create a new fragment shader backend for Broadwell.

This replaces the old fs_generator backend.

v2: Port to the C-based representation of assembly instructions.
    Fix texturing after the texture-grf merge.

v3: Add high quality derivative support.  Fix SET_SIMD4X2_OFFSET.

v4: Pass brw_context to gen8_instruction functions as required.

v5: Fixes for MRT, as well as zero render targets (alpha test only).

v6: Replace n-wide with SIMDn in comments and messages; port over
    Topi's blorp-generator changes; add missing TXF_MCS opcode,
    fix missing high quality derivatives for DDX; fix typo (all caught
    by Eric).  Simplify ADDC/SUBB handling; drop "Used only on Gen6+"
    comment (caught by Matt).  Emit SIMD16 versions of three source
    instructions (caught by both Eric and Matt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Create a new vec4 backend for Broadwell.

This replaces the old vec4_generator backend.

v2: Port to use the C-based instruction representation.  Also, remove
    Geometry Shader offset hacks - the visitor will handle those instead
    of this code.

v3: Texturing fixes (including adding textureGather support).

v4: Pass brw_context to gen8_instruction functions as required.

v5: Add SHADER_OPCODE_TXF_MCS support; port DUAL_INSTANCED gs fixes
    (caught by Eric).  Simplify ADDC/SUBB handling; add comments to
    gen8_set_dp_message calls (suggested by Matt).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Add a new infrastructure for generating Broadwell shader assembly.

This replaces the brw_eu_emit.c layer for Broadwell.  It will be
used by both the vector and scalar shader backends.

v2: Port to use the C-based instruction representation.

v3: Fix destination register type for CMP.

v4: Pass brw to gen8_instruction functions (required by rebase).

v5: Remove bogus assertion on math instructions (caught by Piglit).

v6: Remove more restrictions on math instructions (caught by Eric).
    Make ADDC and SUBB helpers set accumulator writes, like MAC and
    MACH (caught by Matt).

v7: Don't implicitly force ALU3 operations to SIMD8 (we've been able
    to do SIMD16 versions since Haswell, but didn't when I originally
    wrote this code).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Implement a disassembler for Broadwell's new instruction encoding.

Heavily based on Keith Packard's existing brw_disasm.c code.  I've tried
to go through most of the pieces (like SFIDs) and update the lists to
include features added in recent generations.

v2: Port to use the C-based instruction emitters.  This allows us to use
    C99 array initializers, which tidies up some of the code.

v3: Improve decoding of render target write messages.

v4: Update for BRW_REGISTER_TYPE becoming an abstraction.

v5: Rebase on Chris Forbes' SFID message defines.

v6: Fix disassembly of UV immediates; remove silly casts.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Add a new representation for Broadwell shader instructions.

Broadwell significantly changes the EU instruction encoding.  Many of
the fields got moved to different bit positions; some even got split
in two.

With so many changes, it was infeasible to continue using struct
brw_instruction.  We needed a new representation.

This new approach is a bit different: rather than a struct, I created a
class that has four DWords, and helper functions that read/write various
bits.  This has several advantages:

1. We can create several different names for the same bits.  For
   example, conditional modifiers, SFID for SEND instructions, and the
   MATH instruction's function opcode are all stored in bits 27:24.

   In each situation, we can use the appropriate setter function:
   set_sfid(), set_math_function(), or set_cond_modifier().  This
   is much easier to follow.

2. Since the fields are expressed using the original 128-bit numbers,
   the code to create the getter/setter functions follows the table in
   the documentation very closely.

To aid in debugging, I've enabled -fkeep-inline-functions when building
gen8_instruction.c.  Otherwise, these functions cannot be called by
gdb, making it insanely difficult to print out anything.

Kenneth Graunke wrote most of this code.  Damien Lespiau ported it to
C99.  Xiang Haihao added media fields.  Zhao Yakui added indirect
addressing support.  Eric Anholt added an assertion to make sure that
values fit in the alloted number of bits.

v2: Update for brw_reg_type_to_hw_type(), which necessitates passing
    brw_context pointers around everywhere.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Matt Turner <mattst88@gmail.com>

i965: Add SFID #defines for media stuff.

While we probably won't ever use these, having them makes it easy to
share disassembler code between intel-gpu-tools and Mesa.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: Add #defines for new Broadwell math functions.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

i965: add struct and SFID for pixel interpolator messages

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/Gen7: Only emit cube face enables for cubes.

This is not observed to actually fix anything, but the PRM says this
field must be zero for other surface types.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Improve dumping of Gen7 SURFACE_STATE

Previously this was missing many interesting fields. Having them decoded
makes debugging views much easier.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

i965: Add masks for more SURFACE_STATE fields

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

nv50: drop obsolete check from error path

At 'out_err' the nv50_context has been calloc-ated.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: assert before trying to out-of-bounds access framebuffer.cbufs

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: assert before trying to out-of-bounds access samplers

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: assert before trying to out-of-bounds access textures

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: pass vtxbuf index as unsigned

The index passed to the function is already unsigned, and internally
we threat it as unsigned.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: assert before trying to out-of-bounds access vtxbuf

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: typecast the result of ffs() to unsigned

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: assert before trying to out-of-bounds access constbuf

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: access only the available amount of constbuf

The textures array is defined as a number of NV50_MAX_PIPE_CONSTBUFS
per shader stage. Currently the nv50 driver handles only 3 shader
stages, thus we wreck chaos when accessing array-out-of-bounds.

Cc: 9.1 9.2 10.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

nv50: access only the available amount of textures

The textures array is defined as a number of PIPE_MAX_SAMPLERS per shader stage.
Currently nv50 driver handles only 3 shader stages, thus we wreck chaos when
accessing array-out-of-bounds.

Fixes a segfault in piglit/bin/arb_texture_buffer_object-data-sync -fbo -auto

Cc: 9.1 9.2 10.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>

loader: fallback to drmGetVersion() for non-pci devices

Use the kernel driver name are returned by drmGetVersion() for
non-pci(platform) devices.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
v2 (Emil): Rebased and weaked commit message.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

pipe-loader: add support for non-pci (platform) devices

Culled out of the "loader: refactor duplicated code into loader util lib"
patch by Rob Clark.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

pci_ids: no not include loader.h

As per original approach by Rob, each user of the loader lib should include
loader.h and the pci_id_driver_map.h header will be used exclusively by the
loader.

Add back the include guard __IS_LOADER and remove no longer needed include
folder in the scons build.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

egl_dri2: use loader util lib

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

pipe-loader: use loader util lib

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

st/egl: use loader util lib

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>

egl-static: use loader util lib

v2
* Drop the no longer used _EGL_NO_DRM from Android.mk.

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

gbm: use the loader util lib

Additionally this commit removes the following exported functions

   _gbm_udev_device_new_from_fd()
   _gbm_fd_get_device_name()
   _gbm_log()

All three were erroneously marked as exported since their inception.
Neither of them has ever been a part of the API thus there should be
no users of them.

Cc: Chad Versace <chad.versace@linux.intel.com>
Cc: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

glx: use the loader util lib

v2
* Set logger to ErrorMessageF. Spotted by Kristian

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

loader: introduce the loader util lib

All the various window system integration layers duplicate roughly the
same code for figuring out device and driver name, pci-id's, etc.  Which
is sad.  So extract it out into a loader util lib.

v2 (Emil)
* Separate the introduction of libloader from the code de-duplication.
* Strip out non-pci devices support.
* Add scons + Android build system support.
* Add VISIBILITY_CFLAGS to avoid exporting the loader funcs.

v3 (Emil)
* PIPE_OS_ANDROID is undefined at this scope, use ANDROID
* Make sure we define _EGL_NO_DRM when building only swrast

Signed-off-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Remove CACHED_BATCH support altogether.

Using an unoptimized variant of glamor spending 50% of its CPU time in
brw_draw_prims() (and hitting the cache *very* frequently):

    N           Min           Max        Median           Avg        Stddev
x 200         29200         40500         34900         34750     958.43256
+ 200         31000         40300         34700         34622     916.35941
No difference proven at 95.0% confidence

Similarly, no difference on GLB2.7:

    N           Min           Max        Median           Avg        Stddev
x  63          64.1         71.36         70.69     70.113175     1.6782026
+  63          63.6         71.18         70.75     70.223651     1.6044186
No difference proven at 95.0% confidence

v2: Rebase on master (by anholt)
v3: Add a missing BEGIN_BATCH(3) to aa_line_parameters -- CACHED_BATCH
    didn't have the asserts about batchbuffer usage that ADVANCE_BATCH
    does, so we started assertion failing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Replace 8-wide and 16-wide with SIMD8 and SIMD16.

Those are the terms used in the docs, and think "n-wide" was something I
just happened to say.  Note that shader-db needs updating for the
INTEL_DEBUG=fs parsing.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

i965: Stop doing our optimization on a copy of the GLSL IR.

The original intent was that we'd keep a driver-private copy, and there
would be the normal copy for swrast to make use of without the tuning (or
anything more invasive we might do) specific to i965.  Only, we don't
generate swrast code any more, because swrast can't render current shaders
anyway.  Thus, our private copy is rather a waste, and we can just do our
backend-specific operations on the linked shader.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

s/Tungsten Graphics/VMware/

Tungsten Graphics Inc. was acquired by VMware Inc. in 2008.  Leaving the
old copyright name is creating unnecessary confusion, hence this change.

This was the sed script I used:

    $ cat tg2vmw.sed
    # Run as:
    #
    #   git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed
    #

    # Rename copyrights
    s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g
    /Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./
    s/TUNGSTEN GRAPHICS/VMWARE/g

    # Rename emails
    s/alanh@tungstengraphics.com/alanh@vmware.com/
    s/jens@tungstengraphics.com/jowen@vmware.com/g
    s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/
    s/jrfonseca\?@tungstengraphics.com/jfonseca@vmware.com/g
    s/keithw\?@tungstengraphics.com/keithw@vmware.com/g
    s/michel@tungstengraphics.com/daenzer@vmware.com/g
    s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/
    s/zack@tungstengraphics.com/zackr@vmware.com/

    # Remove dead links
    s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g

    # C string src/gallium/state_trackers/vega/api_misc.c
    s/"Tungsten Graphics, Inc"/"VMware, Inc"/

Reviewed-by: Brian Paul <brianp@vmware.com>

trace: Re-license trace.xsl under MIT license.

I was the sole author, as Tungsten Graphics employee, which was since
then acquired by VMware Inc.

Reviewed-by: Brian Paul <brianp@vmware.com>

svga: fix crash when clearing null color buffer

Fixes regression since 9baa45f78b8ca7d66280e36009b6a685055d7cd6
but some of the piglit fbo-drawbuffers-none tests still don't
pass.

v2: use the right pointer type for 'h'

Reviewed-by: José Fonseca <jfonseca@vmware.com>

llvmpipe: handle NULL color buffer pointers

Fixes regression from 9baa45f78b8ca7d66280e36009b6a685055d7cd6

v2: incorporate a few small changes suggested by Roland.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

softpipe: handle NULL color buffer pointers

Fixes regression from 9baa45f78b8ca7d66280e36009b6a685055d7cd6

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

llvmpipe: fix large point rasterization with point_quad_rasterization

The whole round-pointsize-to-int stuff must only be done with GL legacy
rules (no point_quad_rasterization) or all the wrong edges are lit up.
This was previously in a private branch (d3d pointsprite test complains
loudly otherwise) and got lost in a merge. However, it should certainly
apply to GL point sprite rasterization as well.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

gallium: add bits for clipping points as tris (d3d-style)

OpenGL does whole-point clipping, that is a large point is either fully
clipped or fully unclipped (the latter means it may extend beyond the
viewport as long as the center is inside the viewport). d3d9 (d3d10 has
no large points) however requires points to be clipped after they are
expanded to a rectangle. (Note some IHVs are known to ignore GL rules at
least with some hw/drivers.)
Hence add a rasterizer bit indicating which way points should be clipped
(some drivers probably will always ignore this), and add the draw interaction
this requires. Drivers wanting to support this and using draw must support
large points on their own as draw doesn't implement vp clipping on the
expanded points (it potentially could but the complexity doesn't seem
warranted), and the driver needs to do viewport scissoring on such points.

Conflicts:

src/gallium/drivers/llvmpipe/lp_context.c
src/gallium/drivers/llvmpipe/lp_state_derived.c

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

mesa: fix GL_COLOR_SUM enum for drivers without ARB_vertex_program

Commit c13970808 (mesa: GL_EXT_secondary_color is not optional) changed

CHECK_EXTENSION2(EXT_secondary_color, ARB_vetex_program, cap)

to

CHECK_EXTENSION(ARB_vertex_program, cap)

However CHECK_EXTENSION2 checks that either extension is available, not
both. Remove the extension check entirely since the intent was for it to
always be enabled.

v2: Fix glGet*(GL_COLOR_SUM) too.  Suggested by Ian.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: 9.2 10.0 <mesa-stable@lists.freedesktop.org>

llvmpipe: do constant buffer bounds checking in shaders

It's possible to bind a smaller buffer as a constant buffer, than
what the shader actually uses/requires. This could cause nasty
crashes. This patch adds the architecture to pass the maximum
allowable constant buffer index to the jit to let it make
sure that the constant buffer indices are always within bounds.
The behavior follows the d3d10 spec, which says the overflow
should always return all zeros, and overflow is only defined
as access beyond the size of the currently bound buffer. Accesses
beyond the declared shader constant register size are not
considered an overflow and expected to return garbage but consistent
garbage (we follow the behavior which some wlk tests expect which
is to return the actual values from the bound buffer).

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>

nv50, nvc0: initialize ctx->sample_mask to ~0

Commit 95bf222603b (cso_context: Fix cso_context::sample_mask initial
value.) fixed the cso sample mask to be initialized to ~0. The cso code
is also careful not to needlessly call set_sample_mask, so we ended up
with the ctx->sample_mask never being set. This broke a number of
EXT_framebuffer_multisample piglit tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

mesa/main: Free ctx->DrawIndirectBuffer during teardown

ctx->DrawIndirectBuffer wasn't being free'd in _mesa_free_buffer_objects

With this patch, "valgrind --leak-check=full glxgears" on evergreen (CEDAR)
now shows:

LEAK SUMMARY:
   definitely lost: 0 bytes in 0 blocks
   indirectly lost: 0 bytes in 0 blocks
     possibly lost: 0 bytes in 0 blocks
   still reachable: 70,228 bytes in 651 blocks
        suppressed: 0 bytes in 0 blocks

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>

st/dri: prevent leak of dri option default values

v2: Change comment style

CC: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeon: Move gfx/dma cs cleanup to r600_common_context_cleanup

The radeonsi code was not cleaning up either of these items leading to
leaked memory.

v2: Move cleanup to r600_common_context_cleanup instead of duplicating
    the logic for SI

CC: "10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: Eliminate parameters to dd_function_table::Scissor

The i830 and i915 drivers used them, but they didn't really need to.
They will just be annoying in future patches.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Eliminate parameters to dd_function_table::DepthRange

No driver uses them.  They will just be annoying in future patches.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Eliminate parameters to dd_function_table::Viewport

No driver uses them.  They will just be annoying in future patches.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radeon: Remove dead code

A future patch will rename some of the fields of gl_viewport_attrib, and
I don't want to update dead code that I can't test.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Dave Airlie <airlied@redhat.com>

i915: Remove spurious calls to DepthRange

For both i830 and i915, the driver DepthRange function just calls
intelCalcViewport.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: Eric Anholt <eric@anholt.net>

mesa: Add COMPRESSED_RGBA_S3TC_DXT1_EXT to COMPRESSED_TEXTURE_FORMATS for GLES

The ES and desktop GL specs diverge here.  Yay!

In desktop OpenGL, the driver can perform online compression of
uncompressed texture data.  GL_NUM_COMPRESSED_TEXTURE_FORMATS and
GL_COMPRESSED_TEXTURE_FORMATS give the application a list of formats
that it could ask the driver to compress with some expectation of
quality.  The GL_ARB_texture_compression spec calls this "suitable for
general-purpose usage."  As noted above, this means
GL_COMPRESSED_RGBA_S3TC_DXT1_EXT is not included in the list.

In OpenGL ES, the driver never performs compression.
GL_NUM_COMPRESSED_TEXTURE_FORMATS and GL_COMPRESSED_TEXTURE_FORMATS give
the application a list of formats that the driver can receive from the
application.  It is the *complete* list of formats.  The
GL_EXT_texture_compression_s3tc spec says:

    "New State for OpenGL ES 2.0.25 and 3.0.2 Specifications

        The queries for NUM_COMPRESSED_TEXTURE_FORMATS and
        COMPRESSED_TEXTURE_FORMATS include COMPRESSED_RGB_S3TC_DXT1_EXT,
        COMPRESSED_RGBA_S3TC_DXT1_EXT, COMPRESSED_RGBA_S3TC_DXT3_EXT,
        and COMPRESSED_RGBA_S3TC_DXT5_EXT."

Note that the addition is only to the OpenGL ES specification!

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
See-also: http://lists.freedesktop.org/archives/mesa-dev/2013-October/047439.html
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>

scons: add new shaderimage.c file to the build

clover: Fix clover::keys and ::values to deal with r-value references properly.

Returning a reference is incorrect if the specified pair was a
temporary -- Instead of that, use decltype() to deduce the correct
return type qualifiers.  Fixes a crash in clCreateProgramWithBinary().

Reported-and-tested-by: "Dorrington, Albert" <albert.dorrington@lmco.com>

clover: Don't try to build programs created from a binary again.

According to the spec it's allowed to call clBuildProgram() on a
program created from a user-specified binary.  We don't need to do
anything to build the program in that case.

Reported-and-tested-by: "Dorrington, Albert" <albert.dorrington@lmco.com>

clover: Add missing fields to the clover::module serialization code.

Tested-by: "Dorrington, Albert" <albert.dorrington@lmco.com>

clover: Store map result into a temporary vector in clCreateProgramWithBinary.

This avoids the inefficient multiple evaluation of the map result in
the code below.  It should cause no functional changes.

Tested-by: "Dorrington, Albert" <albert.dorrington@lmco.com>

docs: Mark ARB_shader_image_load_store as work in progress.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Validate image units when the texture state changes.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Unbind deleted textures from the shader image units.

From ARB_shader_image_load_store:

   If a texture object bound to one or more image units is deleted by
   DeleteTextures, it is detached from each such image unit, as though
   BindImageTexture were called with <unit> identifying the image unit
   and <texture> set to zero.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Add image parameter queries for ARB_shader_image_load_store.

v2: Fix off-by-one error in index parameter bound checking.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Add ARB_shader_image_load_store to the extension table.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

glapi: Update dispatch XML files for ARB_shader_image_load_store.

And uncomment the relevant lines of the dispatch sanity test.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Implement the GL entry points defined by ARB_shader_image_load_store.

v2: Name image format classes consistently, fix array and 3D teximage
    selection with layered = GL_FALSE, make sure that the
    user-specified layer is less than the number of texture layers,
    add some asserts.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Add MESA_FORMAT_SIGNED_RG88 and _RG1616.

Including pack/unpack and texstore code.  ARB_shader_image_load_store
requires support for the GL_RG8_SNORM and GL_RG16_SNORM formats, which
map to MESA_FORMAT_SIGNED_GR88 and MESA_FORMAT_SIGNED_GR1616 on
little-endian hosts, and MESA_FORMAT_SIGNED_RG88 and
MESA_FORMAT_SIGNED_RG1616 respectively on big-endian hosts -- only the
former were already present, add support for the latter.

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Add MESA_FORMAT_ABGR2101010.

Including pack/unpack and texstore code.  This texture format is a
requirement for ARB_shader_image_load_store.

Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Add driver interface for ARB_shader_image_load_store.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Add state data structures required for ARB_shader_image_load_store.

v2: Increase MAX_IMAGE_UNITS to what i965 wants and add a separate
    MAX_IMAGE_UNIFORMS define, clarify a couple of comments.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

mesa: Define helper function to get the number of texture layers.

And to check if it can have layers at all.  This will be used by the
implementation of ARB_shader_image_load_store.

v2: Fix constness of texobj argument, use assert and return reasonable
    default rather than calling unreachable() in default switch case.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: use signed temporary variable to store _ColorDrawBufferIndexes

The temporary variable used to store _ColorDrawBufferIndexes must be
signed (GLint), otherwise the following conditional will be incorrectly
evaluated. Leading to crashes in the driver/mesa or accessing/writing
to arbitrary memory location. The bug dates back to 2009.

Cc: 10.0 9.2 9.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

automake: include the git sha in the opengl version string for oot builds

Acked-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

mesa: use signed temporary variable to store _ColorDrawBufferIndexes

_ColorDrawBufferIndexes is defined as GLint* and using a GLuint*
will result in the first part of the conditional to be evaluated to
true always.

Unintentionally introduced by the following commit, this will result
in a driver segfault if one is using an old version of the piglit test

    bin/clearbuffer-mixed-format -auto -fbo

commit 03d848ea1003abefd8fe51a5b4a780527cd852af
Author: Marek Olšák <marek.olsak@amd.com>
Date:   Wed Dec 4 00:27:20 2013 +0100

    mesa: fix interpretation of glClearBuffer(drawbuffer)

    This corresponding piglit tests supported this incorrect behavior instead of
    pointing at it.

Cc: Marek Olšák <marek.olsak@amd.com>
Cc: 10.0 9.2 9.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>

nouveau: add framebuffer validation callback

Fixes assertions when trying to attach textures to fbs with formats not
supported by the render engines.

See https://bugs.freedesktop.org/show_bug.cgi?id=73459

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>

clover: Use cl_ulong in the maximum allocation size calculation to avoid overflow.

i965: Emit 3DSTATE_VF on Broadwell too.

It's not just for Haswell.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Disable workaround flush for push constants on Broadwell.

If it wasn't necessary for Haswell, it's likely not to be necessary for
Broadwell either.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

i965: Enable native ETC texture support on Broadwell.

Broadwell, like Baytrail, has native ETC texture support.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

ilo: handle NULL renderbuffers correctly

Renderbuffers may be NULL since 9baa45f78b8ca7d66280e36009b6a685055d7cd6.

ilo: disable HiZ for misaligned levels

We need to disable HiZ for non-8x4 aligned levels, except for level 0, layer
0.  For the very first layer we can adjust Width and Height fields of
3DSTATE_DEPTH_BUFFER to make it aligned.

Specifically, add ILO_TEXTURE_HIZ and set the flag only for properly aligned
levels.  ilo_texture_can_enable_hiz() is updated to check for the flag.

In tex_layout_validate(), align the depth bo to 8x4 so that we can adjust
Width/Height of 3DSTATE_DEPTH_BUFFER without introducing out-of-bound access.

Finally in rectlist blitter, add the ability to adjust 3DSTATE_DEPTH_BUFFER.

ilo: use a helper to determine if HiZ is enabled

Add ilo_texture_can_enable_hiz and replace all checks for tex->hiz.bo by calls
to ilo_texture_can_enable_hiz().

ilo: decide on hiz first in texture allocation

Add tex_layout_init_hiz() before tex_layout_init_format() to decide whether
HiZ should be enabled.

On GEN6, because of layer offsetting, HiZ is enabled only when the texture is
non-mipmapped and non-array.  PIPE_USAGE_STAGING is also taken as a hint to
disable HiZ.

ilo: emit gen7_wa_pipe_control_wm_max_threads_stall on Haswell

Rename the workaround, as it is for 3DSTATE_PS instead of 3DSTATE_WM, and emit
it on Haswell too.

This does not fix any app, but an assertion failure.

ilo: use HALIGN_4 on GEN7 for depth buffers

The comment was no longer true since 6642381e7513926b847d6bc10bf590e1c0c54859.

ilo: OOM for HiZ is fatal on GEN6

On GEN6, HiZ and Separate Stencil Buffer must be enabled at the same time.

ilo: fix a HiZ bo leakage

Dereference the HiZ bo when the texture is destroyed.

ilo: simplify ilo_texture_set_slice_flags()

Call ilo_texture_get_slice() for the last slice so that we can get rid of the
duplicated assert().

egl-static: Fix build error.

Fix build regression introduced with commit
786af2f963925df2c2a6fb60b29a83e8340f03c7.

egl_pipe.c:46:38: fatal error: radeonsi/radeonsi_public.h: No such file or directory
 #include "radeonsi/radeonsi_public.h"
                                      ^

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73578
Signed-off-by: Vinson Lee <vlee@freedesktop.org>

radeonsi: Rename the commonly occurring rscreen variable.

The "r" stands for R600.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: Rename the commonly occurring rctx/r600 variables.

The "r" stands for R600.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: Rename r600_trace_emit->si_trace_emit.

I had previously considered that unsafe.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: Rename R600->SI in some remaining defines.

I had previously considered that unsafe.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: Rename radeonsi->si remaining identifiers in si_uvd.c.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>