mesa.git
4 years agomesa/st: glsl_to_nir: don't lower atomics to SSBOs if driver supports HW atomics
Gert Wollny [Sat, 28 Dec 2019 15:07:30 +0000 (16:07 +0100)]
mesa/st: glsl_to_nir: don't lower atomics to SSBOs if driver supports HW atomics

At least on r600 HW atomic operations are way less expensive than SSBO atomic
operations.

v2: use st->has_hw_atomics (Erik Anholt)

v3: remove second invocation of atomic to ssbo lowering (Erik Anholt)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agor600: Delete vertex buffer only if there is actually a shader state
Gert Wollny [Sat, 28 Dec 2019 16:17:02 +0000 (17:17 +0100)]
r600: Delete vertex buffer only if there is actually a shader state

Fixes: gl-2.0-vertexattribpointer
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agor600: Make SID and unsigned value
Gert Wollny [Sat, 28 Dec 2019 14:34:26 +0000 (15:34 +0100)]
r600: Make SID and unsigned value

The value is never negative, and makeing it unsigned fixes some
warnings

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agor600: Fix maximum line width
Gert Wollny [Sat, 28 Dec 2019 14:35:13 +0000 (15:35 +0100)]
r600: Fix maximum line width

There are only 13 bits available to store the line width, hence
it can't be larger than 8191

v2: Add Fixes tag

v3: - Unify value since for all r600 archs (Konstantin Kharlamov)
    - Correct the value the line width value is emitted as a 12.4
      fixed point value of 1/2 line width on r600-r700 and as
      8 * line width on Evergreen and newer.

Fixes: 06bfb2d28f7adca7edc6be9c210a7a3583023652
    r600: fork and import gallium/radeon

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agor600/sb: Correct SB disassambler for better debugging
Gert Wollny [Sat, 28 Dec 2019 14:35:39 +0000 (15:35 +0100)]
r600/sb: Correct SB disassambler for better debugging

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agor600: Make it possible to include r600_asm.h in a C++ file
Gert Wollny [Sun, 1 Dec 2019 18:04:16 +0000 (19:04 +0100)]
r600: Make it possible to include r600_asm.h in a C++ file

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agor600: Add functions to dump the shader info
Gert Wollny [Sun, 1 Dec 2019 18:01:20 +0000 (19:01 +0100)]
r600: Add functions to dump the shader info

This will be helpful to compare TGSI and NIR code path,

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Konstantin Kharlamov <hi-angel@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agogallium: tgsi_from_mesa - handle VARYING_SLOT_FACE
Gert Wollny [Tue, 17 Dec 2019 20:30:16 +0000 (21:30 +0100)]
gallium: tgsi_from_mesa - handle VARYING_SLOT_FACE

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agonir: make nir_get_texture_size/lod available outside nir_lower_tex
Gert Wollny [Sun, 22 Dec 2019 16:35:56 +0000 (17:35 +0100)]
nir: make nir_get_texture_size/lod available outside nir_lower_tex

This functions can be useful in other places.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agogallium/tgsi_from_mesa: Add 'extern "C"' to be able to include from C++
Gert Wollny [Mon, 25 Nov 2019 18:27:13 +0000 (19:27 +0100)]
gallium/tgsi_from_mesa: Add 'extern "C"' to be able to include from C++

The r600/nir backend is in C++ and needs to include this file.

Signed-off-by: Gert Wollny <gw.fossdev@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3286>

4 years agospirv: Fix glsl type assert in spir2nir.
Bas Nieuwenhuizen [Wed, 1 Jan 2020 13:56:26 +0000 (14:56 +0100)]
spirv: Fix glsl type assert in spir2nir.

Fixes: 624789e3708 "compiler/glsl: handle case where we have multiple users for types"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agoetnaviv: use a better name for FE_VERTEX_STREAM_UNK14680
Christian Gmeiner [Fri, 3 Jan 2020 09:27:00 +0000 (10:27 +0100)]
etnaviv: use a better name for FE_VERTEX_STREAM_UNK14680

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
4 years agoradv: Only use the gfx mipmap level offset/pitch for linear textures.
Bas Nieuwenhuizen [Fri, 3 Jan 2020 10:25:31 +0000 (11:25 +0100)]
radv: Only use the gfx mipmap level offset/pitch for linear textures.

The tiled-case is non-sensical for non-base mips, but Vulkan requires
that this function handles it but at the same time does not require
returning anything useful. So we can basically return anything.

Correct tiled pitch and offset are still required for our own WSI and
in the future getting the layouts of images with DRM format modifiers.
Both don't have to deal with images with more than 1 level though.

Fixes: 824bd0830e8 "radv: return the correct pitch for linear mipmaps on GFX10"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2301
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2304
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoRevert "amd/common: Always initialize gfx9 mipmap offset/pitch."
Bas Nieuwenhuizen [Fri, 3 Jan 2020 10:19:35 +0000 (11:19 +0100)]
Revert "amd/common: Always initialize gfx9 mipmap offset/pitch."

This reverts commit 973181c06cca3fe232c3a435abde31f2fc1b81ef.

Requested by Marek.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoiris: Delete remnants of the unimplemented ASTC 5x5 workaround
Kenneth Graunke [Sat, 23 Nov 2019 05:52:12 +0000 (21:52 -0800)]
iris: Delete remnants of the unimplemented ASTC 5x5 workaround

I copy and pasted some of the boilerplate but never the implementation.
For now, ASTC 5x5 is disabled and faked via uncompressed RGBA; let's
delete these remnants until such a time when we implement it properly.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
4 years agoiris: Disable ASTC 5x5 support on Gen9 for now.
Kenneth Graunke [Sat, 23 Nov 2019 05:41:58 +0000 (21:41 -0800)]
iris: Disable ASTC 5x5 support on Gen9 for now.

Intel Gen9 hardware has some nasty restrictions where ASTC 5x5 formats
and color compression can't both live in the sampler cache at the same
time.  To properly support it, we have to track which of those exist
in the cache and flush ASTC out or resolve away compression.

As far as I'm aware, very little uses ASTC 5x5 textures, so instead
of replicating all that for iris, we simply turn it off and rely on
the Gallium fallback mechanism to fake it via uncompressed RGBA.

This should avoid GPU hangs any time people use ASTC 5x5 with CCS.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
4 years agost/mesa: Allow ASTC5x5 fallbacks separately from other ASTC LDR formats.
Kenneth Graunke [Sat, 23 Nov 2019 05:33:19 +0000 (21:33 -0800)]
st/mesa: Allow ASTC5x5 fallbacks separately from other ASTC LDR formats.

This patch allows us to fake ASTC 5x5 specifically, while leaving the
other ASTC LDR formats with native support.  I plan to use this in iris,
at least for the time being.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoetnaviv: use nir_lower_clip_halfz instead of open-coding
Erik Faye-Lund [Sun, 15 Dec 2019 17:09:46 +0000 (18:09 +0100)]
etnaviv: use nir_lower_clip_halfz instead of open-coding

We already have a helper for this, so let's use that instead of rolling
our own version.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Paul Cercueil <paul@crapouillou.net>
4 years agonir/zink: move clip_halfz-lowering to common code
Erik Faye-Lund [Sun, 15 Dec 2019 17:03:49 +0000 (18:03 +0100)]
nir/zink: move clip_halfz-lowering to common code

Etnaviv also does the same thing, so let's try to avoid repetition here,
and use the same for it code as well.

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Paul Cercueil <paul@crapouillou.net>
4 years agozink: remove unused code-path in lower_pos_write
Erik Faye-Lund [Thu, 19 Dec 2019 13:41:09 +0000 (14:41 +0100)]
zink: remove unused code-path in lower_pos_write

This code is never reached, because we don't call nir_lower_io before
lowering this. So let's get rid of it.

4 years agozink: use nir_fmul_imm
Erik Faye-Lund [Sun, 15 Dec 2019 16:52:56 +0000 (17:52 +0100)]
zink: use nir_fmul_imm

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Paul Cercueil <paul@crapouillou.net>
4 years agozink: implement load_vertex_id
Erik Faye-Lund [Fri, 3 Jan 2020 11:21:02 +0000 (12:21 +0100)]
zink: implement load_vertex_id

Not 100% sure if this matches the semantics, but it seems to pass the
tests, so it seems like an improvement.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agozink: factor out builtin-var creation
Erik Faye-Lund [Fri, 3 Jan 2020 11:20:02 +0000 (12:20 +0100)]
zink: factor out builtin-var creation

This is useful so we can reuse it for the next patch

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agozink: simplify front-face type
Erik Faye-Lund [Fri, 3 Jan 2020 11:19:10 +0000 (12:19 +0100)]
zink: simplify front-face type

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agoanv: Ignore some CreateInfo structs when rasterization is disabled
Caio Marcelo de Oliveira Filho [Fri, 3 Jan 2020 21:23:32 +0000 (13:23 -0800)]
anv: Ignore some CreateInfo structs when rasterization is disabled

According to the description of VkGraphicsPipelineCreateInfo(),
pViewportState, pMultisampleState, pDepthStencilState and
pColorBlendState must be ignored when rasterization is not enabled.

This avoids potentially invalid pointers being dereferenced when
rasterization is disabled.  Tested with `demos_x64 VK_Parameter_Zoo`
from Renderdoc repository.

v2: Don't store the `raster_enabled` as part of anv_pipeline, just
    query it from the create info.  This avoids storing a state that's
    only used during pipeline creation. (Jason)

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2258
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch> [v1]
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoanv: Drop unused function parameter
Caio Marcelo de Oliveira Filho [Sat, 21 Dec 2019 07:00:57 +0000 (23:00 -0800)]
anv: Drop unused function parameter

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
4 years agoradeonsi: remove the "display_dcc_offset == 0" assertion
Marek Olšák [Thu, 2 Jan 2020 19:10:46 +0000 (14:10 -0500)]
radeonsi: remove the "display_dcc_offset == 0" assertion

I think it's not needed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
4 years agoradeonsi: ignore PIPE_BIND_SCANOUT for imported textures
Marek Olšák [Fri, 27 Dec 2019 22:11:51 +0000 (17:11 -0500)]
radeonsi: ignore PIPE_BIND_SCANOUT for imported textures

It's obtained from the BO metadata.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
4 years agoradeonsi: preserve the scanout flag for shared resources on gfx9 and gfx10
Marek Olšák [Fri, 27 Dec 2019 20:53:12 +0000 (15:53 -0500)]
radeonsi: preserve the scanout flag for shared resources on gfx9 and gfx10

Closes: #2195
Closes: #2294
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
4 years agolima: fix allocation of GP outputs storage for indexed draw
Vasily Khoruzhick [Fri, 3 Jan 2020 04:58:19 +0000 (20:58 -0800)]
lima: fix allocation of GP outputs storage for indexed draw

For indexed draw number of VS invocations is (ctx->max_index - ctx->min_index + 1),
so we have to use this number when calculating space for varyings, gl_Position and
gl_PointSize.

Fixes dEQP-GLES2.functional.buffer.write.use.index_array.array and
dEQP-GLES2.functional.buffer.write.use.index_array.element_array

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
4 years agoanv: Drop unneeded struct keywords
Jason Ekstrand [Fri, 3 Jan 2020 17:20:22 +0000 (11:20 -0600)]
anv: Drop unneeded struct keywords

All VkFoo structs are typedef'd to not need the struct keyword.  Leaving
it in there is just extra characters and breaks Vulkan's aliasing when
stuff gets promoted to core versions.  It's better to just never use
struct for VkFoo.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
4 years agor600: Remove HEVC related code since HEVC is not supported
Thong Thai [Thu, 19 Dec 2019 19:53:47 +0000 (14:53 -0500)]
r600: Remove HEVC related code since HEVC is not supported

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>

4 years agoradeon: Use P010 for decoding of 10-bit videos
Thong Thai [Wed, 18 Dec 2019 16:33:22 +0000 (11:33 -0500)]
radeon: Use P010 for decoding of 10-bit videos

Previously, P016 was used for the decoding of 10-bit HEVC/H.265 encoded
videos, which worked fine for mpv and ffmpeg. GStreamer specifically looks
for P010, so this patch sets the default buffer type to P010 for HEVC
decoding.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>

4 years agost/va: Add support for P010, used for 10-bit videos
Thong Thai [Wed, 18 Dec 2019 16:31:28 +0000 (11:31 -0500)]
st/va: Add support for P010, used for 10-bit videos

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>

4 years agogallium: Add PIPE_FORMAT_P010 support
Thong Thai [Wed, 18 Dec 2019 16:26:34 +0000 (11:26 -0500)]
gallium: Add PIPE_FORMAT_P010 support

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>

4 years agoutil/format: Add the P010 format used for 10-bit videos
Thong Thai [Wed, 18 Dec 2019 13:59:17 +0000 (08:59 -0500)]
util/format: Add the P010 format used for 10-bit videos

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>

4 years agozink: implement some more trivial opcodes
Erik Faye-Lund [Fri, 3 Jan 2020 11:22:55 +0000 (12:22 +0100)]
zink: implement some more trivial opcodes

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agozink: implement txf
Erik Faye-Lund [Fri, 20 Dec 2019 14:56:08 +0000 (15:56 +0100)]
zink: implement txf

texelFetch is a requirement for OpenGL 3.0, so this gets us a step
closer to GL 3.0 support.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agoradv: implement VK_AMD_mixed_attachment_samples
Samuel Pitoiset [Fri, 6 Dec 2019 15:09:48 +0000 (16:09 +0100)]
radv: implement VK_AMD_mixed_attachment_samples

With VK_AMD_mixed_attachment_samples, the number of depth/stencil
samples isn't always equal to the number of color samples. Adjust
the number of Z samples when it's different but make sure to have
a consistent sample count if there are no depth/stencil attachments.

Also adjust the number of samples used for fragment shaders which is
the number of color samples if mixed attachment samples are used.

Only enabled on GFX8+ because it's untested on previous chips.

All dEQP-VK.pipeline.multisample.mixed_attachment_samples.* now pass.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3018>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3018>

4 years agoradv: record number of color/depth samples for each subpass
Samuel Pitoiset [Fri, 6 Dec 2019 13:14:25 +0000 (14:14 +0100)]
radv: record number of color/depth samples for each subpass

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3018>

4 years agoetnaviv: gc400 does not support any vertex sampler
Christian Gmeiner [Thu, 2 Jan 2020 11:50:22 +0000 (12:50 +0100)]
etnaviv: gc400 does not support any vertex sampler

On STM32MP1 fixes the dEQPs below and changes the dEQP run statistics to:

-  Passed:        16856/17346 (97.2%)
-  Failed:        236/17346 (1.4%)
-  Not supported: 199/17346 (1.1%)
+  Passed:        16780/17346 (96.7%)
+  Failed:        86/17346 (0.5%)
+  Not supported: 425/17346 (2.5%)
   Warnings:      55/17346 (0.3%)

dEQP-GLES2.functional.shaders.struct.uniform.sampler_vertex
dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_vertex
dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_vertex
dEQP-GLES2.functional.shaders.struct.uniform.sampler_in_function_arg_vertex
dEQP-GLES2.functional.shaders.struct.uniform.sampler_in_array_function_arg_vertex
dEQP-GLES2.functional.shaders.texture_functions.vertex.texture2d
dEQP-GLES2.functional.shaders.texture_functions.vertex.texture2dproj_vec3
dEQP-GLES2.functional.shaders.texture_functions.vertex.texture2dproj_vec4
dEQP-GLES2.functional.shaders.texture_functions.vertex.texture2dlod
dEQP-GLES2.functional.shaders.texture_functions.vertex.texture2dprojlod_vec3
dEQP-GLES2.functional.shaders.texture_functions.vertex.texture2dprojlod_vec4
dEQP-GLES2.functional.shaders.texture_functions.vertex.texturecube
dEQP-GLES2.functional.shaders.texture_functions.vertex.texturecubelod
dEQP-GLES2.functional.shaders.random.texture.vertex.0
dEQP-GLES2.functional.shaders.random.texture.vertex.1
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dEQP-GLES2.functional.uniform_api.value.initial.render.basic_array.sampler2D_vertex
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dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.basic_array_first_elem_without_brackets.sampler2D_vertex
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.basic_array_first_elem_without_brackets.sampler2D_both
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dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.struct_in_array.sampler2D_samplerCube_vertex
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.struct_in_array.sampler2D_samplerCube_both
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.array_in_struct.sampler2D_samplerCube_vertex
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.array_in_struct.sampler2D_samplerCube_both
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.nested_structs_arrays.sampler2D_samplerCube_vertex
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.get_uniform.nested_structs_arrays.sampler2D_samplerCube_both
dEQP-GLES2.functional.uniform_api.value.assigned.by_pointer.render.basic.sampler2D_vertex
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dEQP-GLES2.functional.uniform_api.value.assigned.by_value.get_uniform.basic_array_first_elem_without_brackets.sampler2D_both
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dEQP-GLES2.functional.uniform_api.value.assigned.by_value.get_uniform.struct_in_array.sampler2D_samplerCube_vertex
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dEQP-GLES2.functional.uniform_api.value.assigned.by_value.get_uniform.array_in_struct.sampler2D_samplerCube_vertex
dEQP-GLES2.functional.uniform_api.value.assigned.by_value.get_uniform.array_in_struct.sampler2D_samplerCube_both
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dEQP-GLES2.functional.uniform_api.value.assigned.basic_array_assign_full.basic_array.sampler2D_both
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dEQP-GLES2.functional.uniform_api.value.assigned.basic_array_assign_partial.basic_array.sampler2D_vertex
dEQP-GLES2.functional.uniform_api.value.assigned.basic_array_assign_partial.basic_array.sampler2D_both
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dEQP-GLES2.functional.uniform_api.value.assigned.basic_array_assign_partial.array_in_struct.sampler2D_samplerCube_both
dEQP-GLES2.functional.uniform_api.value.assigned.unused_uniforms.sampler2D_samplerCube_vertex
dEQP-GLES2.functional.uniform_api.value.assigned.unused_uniforms.sampler2D_samplerCube_both
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dEQP-GLES2.functional.uniform_api.random.3
dEQP-GLES2.functional.uniform_api.random.6
dEQP-GLES2.functional.uniform_api.random.11
dEQP-GLES2.functional.uniform_api.random.14
dEQP-GLES2.functional.uniform_api.random.21
dEQP-GLES2.functional.uniform_api.random.22
dEQP-GLES2.functional.uniform_api.random.24
dEQP-GLES2.functional.uniform_api.random.25
dEQP-GLES2.functional.uniform_api.random.29
dEQP-GLES2.functional.uniform_api.random.30
dEQP-GLES2.functional.uniform_api.random.32
dEQP-GLES2.functional.uniform_api.random.33
dEQP-GLES2.functional.uniform_api.random.37
dEQP-GLES2.functional.uniform_api.random.41
dEQP-GLES2.functional.uniform_api.random.49
dEQP-GLES2.functional.uniform_api.random.51
dEQP-GLES2.functional.uniform_api.random.55
dEQP-GLES2.functional.uniform_api.random.61
dEQP-GLES2.functional.uniform_api.random.69
dEQP-GLES2.functional.uniform_api.random.72
dEQP-GLES2.functional.uniform_api.random.78
dEQP-GLES2.functional.uniform_api.random.79
dEQP-GLES2.functional.uniform_api.random.82
dEQP-GLES2.functional.uniform_api.random.87
dEQP-GLES2.functional.uniform_api.random.88
dEQP-GLES2.functional.uniform_api.random.94
dEQP-GLES2.functional.uniform_api.random.95
dEQP-GLES2.functional.uniform_api.random.96

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
4 years agoetnaviv: check if MSAA is supported
Christian Gmeiner [Wed, 1 Jan 2020 21:36:10 +0000 (22:36 +0100)]
etnaviv: check if MSAA is supported

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
4 years agou_vbuf: don't try to delete NULL driver CSO
Iago Toral Quiroga [Thu, 2 Jan 2020 09:10:57 +0000 (10:10 +0100)]
u_vbuf: don't try to delete NULL driver CSO

Since 18a8c3f7f11 we don't create a driver CSO if there are any
incompatible elements, so only ask backends to delete it if it exists.

Fixes multiple CTS crashes in V3D.

Fixes: 18a8c3f7f11 ("u_vbuf: Only create driver CSO if no incompatible elements")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agoiris: Set nir_shader_compiler_options::unify_interfaces.
Kenneth Graunke [Mon, 17 Jun 2019 22:12:25 +0000 (17:12 -0500)]
iris: Set nir_shader_compiler_options::unify_interfaces.

This is technically enabling the option in the common intel backend
code, but only the st/nir linker uses the option, so it's iris-only.

Fixes Piglit's spec/glsl-1.50/execution/geometry/clip-distance-vs-gs-out

Closes: #2274
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3249>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3249>

4 years agost/nir: Optionally unify inputs_read/outputs_written when linking.
Kenneth Graunke [Mon, 17 Jun 2019 22:10:06 +0000 (17:10 -0500)]
st/nir: Optionally unify inputs_read/outputs_written when linking.

i965 and iris use inputs_read/outputs_written for a shader stage to
determine the layout of input and output storage.  Adjacent stages must
agree on the layout, so adjacent input/output bitfields must match.

This patch adds a new nir_shader_compiler_options::unify_interfaces
flag which asks the linker to unify the input/output interfaces between
adjacent stages.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3249>

4 years agointel: Drop Gen11 WaBTPPrefetchDisable workaround
Kenneth Graunke [Thu, 2 Jan 2020 01:38:01 +0000 (17:38 -0800)]
intel: Drop Gen11 WaBTPPrefetchDisable workaround

This isn't needed on production Icelake hardware.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3250>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3250>

4 years agointel: Remove unused Tigerlake PCI ID
Jordan Justen [Thu, 2 Jan 2020 21:27:33 +0000 (13:27 -0800)]
intel: Remove unused Tigerlake PCI ID

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
4 years agopan/midgard: Use upper ALU tags for MFBD writeout
Alyssa Rosenzweig [Thu, 2 Jan 2020 17:33:25 +0000 (12:33 -0500)]
pan/midgard: Use upper ALU tags for MFBD writeout

It's not clear yet what the distinction is.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Identity ld_color_buffer as 32-bit
Alyssa Rosenzweig [Thu, 2 Jan 2020 17:28:54 +0000 (12:28 -0500)]
pan/midgard: Identity ld_color_buffer as 32-bit

I'm not sure why I mistakenly identified it as an 8-bit op before.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Remove old comment
Alyssa Rosenzweig [Thu, 2 Jan 2020 17:28:41 +0000 (12:28 -0500)]
pan/midgard: Remove old comment

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Generate MRT writeout loops
Alyssa Rosenzweig [Thu, 2 Jan 2020 17:27:59 +0000 (12:27 -0500)]
pan/midgard: Generate MRT writeout loops

They need a very particular form; the naive way we did before is not
sufficient in practice, it doesn't look like. So let's follow the rough
structure of the blob's writeout since this is fixed code anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Generalize IS_ALU and quadword_size
Alyssa Rosenzweig [Wed, 1 Jan 2020 02:39:23 +0000 (21:39 -0500)]
pan/midgard: Generalize IS_ALU and quadword_size

There are more ALU tags, let's do some cleanup while we're at it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Use better heuristic for shader termination
Alyssa Rosenzweig [Tue, 31 Dec 2019 19:21:26 +0000 (14:21 -0500)]
pan/midgard: Use better heuristic for shader termination

This still may not be perfect (in the sense that legal shaders might
still get cut off) but this fits how writeout is done with both Panfrost
and the blob, so it's good enough for what we need and allows MRT
shaders to be sanely disassembled.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Fix memory corruption in constant combining
Alyssa Rosenzweig [Thu, 2 Jan 2020 18:44:40 +0000 (13:44 -0500)]
pan/midgard: Fix memory corruption in constant combining

It's a long story... but we'd try to insert constants that weren't there
and end up clobbering fields in the bundle following the constant
array...

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Pack MRT blend shaders into a single BO
Alyssa Rosenzweig [Wed, 1 Jan 2020 02:37:30 +0000 (21:37 -0500)]
panfrost: Pack MRT blend shaders into a single BO

Blend shader size and location in memory is considerably constrained,
probably to facilitate optimizations (my guess is that blend shaders are
run strictly out of i-cache). We need to pack the blend shaders for each
RT of a single framebuffer together. The easiest way to do this is at
draw time which is not terribly efficient but will hold us over for now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Handle RGB16F colour clear
Alyssa Rosenzweig [Tue, 31 Dec 2019 22:52:03 +0000 (17:52 -0500)]
panfrost: Handle RGB16F colour clear

We don't handle this format yet, but we will soon, and the abort in
pan_pack_color is possible even without exposing the format... Handling
this gracefully might not be required by the spec but let's not crash.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Store internal format
Tomeu Vizoso [Thu, 2 Jan 2020 15:44:18 +0000 (16:44 +0100)]
panfrost: Store internal format

It's needed by u_transfer_helper to know when the depth+stencil buffer
has been split.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Map with size of first layer for 3D textures
Tomeu Vizoso [Thu, 2 Jan 2020 10:27:00 +0000 (11:27 +0100)]
panfrost: Map with size of first layer for 3D textures

As that's what Gallium expects in transfer.layer_stride.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Dynamically allocate array of texture pointers
Tomeu Vizoso [Thu, 2 Jan 2020 10:24:19 +0000 (11:24 +0100)]
panfrost: Dynamically allocate array of texture pointers

With 3D textures we can have lots of layers, so better allocate it
dynamically at runtime.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agomeson: Enable -Werror=int-conversion.
Bas Nieuwenhuizen [Thu, 31 Oct 2019 11:00:52 +0000 (12:00 +0100)]
meson: Enable -Werror=int-conversion.

I think implicit conversions here are almost always wrong:

1) wrong argument position ptr vs. int
2) will often have issues with 32-bit platforms.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2570>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2570>

4 years agoturnip: Use VK_NULL_HANDLE instead of NULL.
Bas Nieuwenhuizen [Thu, 2 Jan 2020 11:29:29 +0000 (12:29 +0100)]
turnip: Use VK_NULL_HANDLE instead of NULL.

Only occurrence of implicitly converting pointer->int.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2570>

4 years agoamd/common: Always initialize gfx9 mipmap offset/pitch.
Bas Nieuwenhuizen [Tue, 31 Dec 2019 20:28:23 +0000 (21:28 +0100)]
amd/common: Always initialize gfx9 mipmap offset/pitch.

The WSI expects pitch to be meaningful even for tiled
textures.

(It is used for the pitch in modesetting and X11)

Fixes: 824bd0830e8 "radv: return the correct pitch for linear mipmaps on GFX10"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2301
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2304
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3245>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3245>

4 years agonir: print non-uniform tex fields.
Bas Nieuwenhuizen [Wed, 1 Jan 2020 13:47:14 +0000 (14:47 +0100)]
nir: print non-uniform tex fields.

To ease debugging in the future.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3246>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3246>

4 years agonir: Add clone/hash/serialize support for non-uniform tex instructions.
Bas Nieuwenhuizen [Wed, 1 Jan 2020 13:42:58 +0000 (14:42 +0100)]
nir: Add clone/hash/serialize support for non-uniform tex instructions.

These were missed when the fields got added. Added it everywhere where
texture_index got used and it made sense.

Found this in "The Surge 2", where the inliner does not copy the fields,
resulting in corruption and hangs.

Fixes: 3bd54576415 "nir: Add a lowering pass for non-uniform resource access"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1203
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3246>

4 years agopan/midgard: Optimize branches with inverted arguments
Afonso Bordado [Fri, 27 Dec 2019 17:09:51 +0000 (17:09 +0000)]
pan/midgard: Optimize branches with inverted arguments

Remove the invert on arguments to branches, and invert the branch
condition instead. This saves one instruction per inverted argument.

Closes #2088

Signed-off-by: Afonso Bordado <afonsobordado@az8.co>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Move midgard_is_branch_unit to helpers
Afonso Bordado [Fri, 27 Dec 2019 20:36:36 +0000 (20:36 +0000)]
pan/midgard: Move midgard_is_branch_unit to helpers

Signed-off-by: Afonso Bordado <afonsobordado@az8.co>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agoetnaviv: Do not filter out PIPE_FORMAT_S8_UINT_Z24_UNORM on pre-HALTI2
Marek Vasut [Mon, 23 Dec 2019 13:40:59 +0000 (14:40 +0100)]
etnaviv: Do not filter out PIPE_FORMAT_S8_UINT_Z24_UNORM on pre-HALTI2

The format PIPE_FORMAT_S8_UINT_Z24_UNORM is supported even on pre-HALTI
hardware like GCnano. Do not report it as unsupported format.

This fixes the following dEQP on GCnano:
dEQP-GLES2.functional.fbo.completeness.renderable.texture.color0.depth_stencil_unsigned_int_24_8

Fixes: 64c7cdcae51 ("etnaviv: add missing formats")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3200>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3200>

4 years agoetnaviv: Report correct number of vertex buffers
Marek Vasut [Tue, 31 Dec 2019 10:53:55 +0000 (11:53 +0100)]
etnaviv: Report correct number of vertex buffers

The GCnano has only 4 vertex buffers instead of 16. This information
can be extracted from the GPU status registers and is already stored
in screen->specs.stream_count. Use PIPE_CAP_MAX_VERTEX_BUFFERS to
report this information and permit u_vbuf to reorganize the shaders
to fit.

This fixes the following dEQP on GCnano:
dEQP-GLES2.functional.shaders.conversions.vector_combine.float_float_float_float_to_vec4_vertex

This fixes all the other dEQP-GLES2.functional.shaders.conversions.*
which used to fail on GCnano.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3241>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3241>

4 years agoaco: Fix uniform i2i64.
Timur Kristóf [Tue, 31 Dec 2019 12:39:56 +0000 (13:39 +0100)]
aco: Fix uniform i2i64.

Fixes 240 failing test cases in dEQP-VK.spirv_assembly which
were failing due to a bad s_ashr_i32 instruction. This commit
fixes the instruction format along with the definitions of the
instruction.

Fixes: 11f43caaeca166c96ae49dbd506b6f58dd4a13fb
Cc: 19.3 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
4 years agoandroid: Fix u_format_table.c being generated twice
Robert Foss [Fri, 20 Dec 2019 14:06:33 +0000 (15:06 +0100)]
android: Fix u_format_table.c being generated twice

Two competing rules for defining u_format_table.c exists,
which is an error.

Additionally the more general rule lacks the inclusion of
format/u_format.csv.

Fixes: 882ca6dfb0 ("util: Move gallium's PIPE_FORMAT utils to /util/format/")
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
4 years agopan/midgard: Remove prepacked_branch
Alyssa Rosenzweig [Tue, 31 Dec 2019 00:02:23 +0000 (19:02 -0500)]
pan/midgard: Remove prepacked_branch

It's an ugly hack that's no longer used.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Convert fragment writeout to proper branches
Alyssa Rosenzweig [Mon, 30 Dec 2019 23:53:04 +0000 (18:53 -0500)]
pan/midgard: Convert fragment writeout to proper branches

This eliminates the only use of prepacked_branch, which is a such a
hack anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agowinsys/radeon: initialize pte_fragment_size
Marek Olšák [Fri, 27 Dec 2019 23:02:33 +0000 (18:02 -0500)]
winsys/radeon: initialize pte_fragment_size

Cc: 19.2 19.3 <mesa-stable@lists.freedesktop.org>
Closes: #2179
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agoRevert "u_vbuf: Regard non-constant vbufs with non-instance elements as free"
Marek Olšák [Mon, 30 Dec 2019 23:41:04 +0000 (18:41 -0500)]
Revert "u_vbuf: Regard non-constant vbufs with non-instance elements as free"

This reverts commit c6ef79c488bb5fffde31e7065fd3e575f3c25fb5.

It broke torcs.

4 years agopanfrost: Respect glPointSize()
Alyssa Rosenzweig [Mon, 30 Dec 2019 17:55:50 +0000 (12:55 -0500)]
panfrost: Respect glPointSize()

We have native support for this somehow. Fixes the mesa demo `points`

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Remove MRT indirection in blend shaders
Alyssa Rosenzweig [Mon, 30 Dec 2019 17:13:45 +0000 (12:13 -0500)]
panfrost: Remove MRT indirection in blend shaders

Since we have a separate blend shader for each render target, let's
simplify this structure and reduce the options memory footprint by 88%
or something goofy like that.

Should also enable separate blending per render target.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Implement integer varyings
Alyssa Rosenzweig [Fri, 27 Dec 2019 21:01:34 +0000 (16:01 -0500)]
panfrost: Implement integer varyings

We need to actually work out the varying format on demand, rather than
assuming rgba32f.

Fixes dEQP-GLES3.functional.fragment_out.basic.int.*

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Disable some CAPs we want lowered
Alyssa Rosenzweig [Fri, 27 Dec 2019 20:33:33 +0000 (15:33 -0500)]
panfrost: Disable some CAPs we want lowered

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopanfrost: Identify glProvokingVertex flag
Alyssa Rosenzweig [Fri, 27 Dec 2019 20:33:21 +0000 (15:33 -0500)]
panfrost: Identify glProvokingVertex flag

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Implement flat shading
Alyssa Rosenzweig [Fri, 27 Dec 2019 20:32:50 +0000 (15:32 -0500)]
pan/midgard: Implement flat shading

We need to shuffle around some lowerings but it's just a flag.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Use type-appropriate st_vary
Alyssa Rosenzweig [Fri, 27 Dec 2019 19:25:00 +0000 (14:25 -0500)]
pan/midgard: Use type-appropriate st_vary

We would like to store (u)ints as well.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agopan/midgard: Promote tilebuffer reads to 32-bit
Alyssa Rosenzweig [Wed, 25 Dec 2019 04:58:28 +0000 (23:58 -0500)]
pan/midgard: Promote tilebuffer reads to 32-bit

Fixes (among others)
dEQP-GLES3.functional.fbo.render.shared_colorbuffer_clear.tex2d_rgba16f

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agoglsl: Set .flat for gl_FrontFacing
Alyssa Rosenzweig [Mon, 30 Dec 2019 16:40:29 +0000 (11:40 -0500)]
glsl: Set .flat for gl_FrontFacing

It is a boolean.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3237>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3237>

4 years agoradv: return the correct pitch for linear mipmaps on GFX10
Samuel Pitoiset [Mon, 30 Dec 2019 12:47:30 +0000 (13:47 +0100)]
radv: return the correct pitch for linear mipmaps on GFX10

On GFX9, the pitch of a level is always the pitch of the entire image
but not on GFX10.

This fixes graphics glithes with Halo - The Master Chief Collection.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2188
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
4 years agometa: Cleanup function for DrawTex
Yevhenii Kolesnikov [Fri, 19 Jul 2019 12:10:25 +0000 (15:10 +0300)]
meta: Cleanup function for DrawTex

Buffer object was never freed, causing memory leaks.

Fixes: 76cfe2bc443 ("meta: Don't pollute the buffer object namespace in _mesa_meta_DrawTex")
CC: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1390>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/1390>

4 years agogallium/gallivm/tgsi: enable tessellation shaders
Jan Zielinski [Thu, 12 Dec 2019 15:03:46 +0000 (16:03 +0100)]
gallium/gallivm/tgsi: enable tessellation shaders

Tessellation Control and Evaluation shaders are implementing
tessellation and require special handling of their inputs
and outputs.

TCS can write out not only per-vertex, but also per-patch
(per-primitive) attributes and tessellation factor values
that control the tessellator.

TES can read TCS outputs, plus must be feeded with new
system values (tessellation coordinates) that are
outputs of the tessellator fixed function.

TCS can also contain calls to barrier() function (similar
to compute shaders).

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Alok Hota <alok.hota@intel.com>
4 years agollvmpipe: enable ARB_shader_group_vote.
Dave Airlie [Fri, 13 Dec 2019 04:44:59 +0000 (14:44 +1000)]
llvmpipe: enable ARB_shader_group_vote.

This just adds the NIR paths for shader group vote.

v2: drop feq for now. (Roland)

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3213>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3213>

4 years agoamd/common: Handle alignment of 96-bit formats.
Bas Nieuwenhuizen [Mon, 23 Dec 2019 01:02:20 +0000 (02:02 +0100)]
amd/common: Handle alignment of 96-bit formats.

addrlib doesn't quite do it right, so do it ourselves.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2162
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
4 years agopanfrost: Fix Makefile.sources
Caio Marcelo de Oliveira Filho [Sat, 28 Dec 2019 04:02:25 +0000 (20:02 -0800)]
panfrost: Fix Makefile.sources

Add missing `\`.  Fixes Android build.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: de077c20788e9cccd0ef ("panfrost: Remove mali_alt_func")
4 years agomesa: avoid returning a value in a void function
Eric Engestrom [Fri, 27 Dec 2019 21:50:24 +0000 (21:50 +0000)]
mesa: avoid returning a value in a void function

Fixes: 1d1722e91070d7c37687 ("mesa: add EXT_dsa NamedProgram functions")
Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
4 years agomeson: simplify install_megadrivers.py invocation
Eric Engestrom [Tue, 26 Mar 2019 10:55:37 +0000 (10:55 +0000)]
meson: simplify install_megadrivers.py invocation

Note: `find_program()` needs a shebang on scripts.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
4 years agonine: fix empty-body-issues
Eric Engestrom [Thu, 31 Oct 2019 01:26:05 +0000 (01:26 +0000)]
nine: fix empty-body-issues

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
4 years agoamd: fix empty-body issues
Eric Engestrom [Mon, 28 Oct 2019 23:47:48 +0000 (23:47 +0000)]
amd: fix empty-body issues

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`")
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
4 years agou_format: move format tests to util/tests/
Eric Engestrom [Sat, 16 Nov 2019 19:14:56 +0000 (19:14 +0000)]
u_format: move format tests to util/tests/

Suggested-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agoutil/format: add trivial srgb<->linear conversion test
Eric Engestrom [Thu, 7 Nov 2019 17:33:19 +0000 (17:33 +0000)]
util/format: add trivial srgb<->linear conversion test

This would've caught 8829f9ccb0267d113283 ("u_format: add ETC2 to
util_format_srgb/util_format_linear").

Suggested-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agoutil/format: add PIPE_FORMAT_ASTC_*x*x*_SRGB to util_format_{srgb,linear}()
Eric Engestrom [Thu, 7 Nov 2019 18:08:09 +0000 (18:08 +0000)]
util/format: add PIPE_FORMAT_ASTC_*x*x*_SRGB to util_format_{srgb,linear}()

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agoutil/format: remove left-over util_format_description_table declaration
Eric Engestrom [Thu, 7 Nov 2019 17:29:00 +0000 (17:29 +0000)]
util/format: remove left-over util_format_description_table declaration

Fixes: 3c45c4bc44310c1af4f0 ("util: Cope with the fact that formats in u_format.csv are not ordered.")
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
4 years agogallivm: fixup const int64 builder.
Dave Airlie [Fri, 27 Dec 2019 19:41:44 +0000 (05:41 +1000)]
gallivm: fixup const int64 builder.

Pointed out by Ilia.

Fixes: 84ba00877496 (gallivm: add 64-bit const int creator.)
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
4 years agoradeonsi/gfx10: improve performance for TES using PrimID but not exporting it
Marek Olšák [Tue, 17 Dec 2019 02:05:05 +0000 (21:05 -0500)]
radeonsi/gfx10: improve performance for TES using PrimID but not exporting it

This field is really for the primitive export to the pixel shader.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
4 years agoradeonsi/gfx10: enable NGG passthrough for eligible shaders
Marek Olšák [Tue, 17 Dec 2019 00:09:21 +0000 (19:09 -0500)]
radeonsi/gfx10: enable NGG passthrough for eligible shaders

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>