i965: Fix and enable forgotten validation test

I seem to have forgotten I still had work to do.

i965: Only insert error message if not already present

Some restrictions require something like strides to match between src
and dest. For multi-source instructions, I'd rather encapsulate the
logic for not inserting already present errors in ERROR_IF than
open-coding it multiple places.

i965: Avoid validation error when src1 is not present

There can be no violation of the restriction that source offsets are
aligned if there is only one source offset.

i965: Remove validate_reg()

Replaced by the assembly validator, and in fact gets in the way of
writing tests for the assembly validator.

i965: Add and use STRIDE and WIDTH macros

You'll notice there were bugs in some of the code being replaced.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

i965: Add parentheses around usage of macro arguments

Otherwise I cannot use this macro in test_eu_validate.cpp

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

i965: Add GLK, CFL, CNL to test_eu_validate.c

i965: Add Atom graphics names to parse_devid_override()

i965: Fix support for disassembling 64-bit integer immediates

The type suffixes were wrong, and the 16 was missing the 0 prefix.

Fixes: 92f787ff86ab ("i965: Add support for disassembling 64-bit integer immediates")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

i965/fs: Rewrite fsign64 to skip the float -> double conversion

... without the float -> double conversion. Low power parts have
additional restrictions when it comes to operating on 64-bit types, and
the instruction used to do the conversion violates one of them:
specifically, the restriction that "Source and Destination horizontal
stride must be aligned to the same qword".

Previously we generated a float and then converted, but we can avoid the
conversion by using the same extract-the-sign-bit + or-in-1.0 algorithm
by directly operating on the high four bytes of each double-precision
component in the result.

In SIMD8 and SIMD16 this cuts one instruction from the implementation,
and more importantly that instruction is the one which violated the
regioning restriction.

Along the way I removed some comments that I did not think helped, and
some code about double comparisons which does not seem to be necessary
today.

This prevents validation failures caught by the new EU validation code
added in later patches.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

i965/fs: Unpack count argument to 64-bit shift ops on Atom

64-bit operations on Atom parts have additional restrictions over their
big-core counterparts (validated by later patches).

Specifically, the restriction that "Source and Destination horizontal
stride must be aligned to the same qword" is violated by most shift
operations since NIR uses a 32-bit value as the shift count argument,
and this causes instructions like

   shl(8)          g19<1>Q         g5<4,4,1>Q      g23<4,4,1>UD

where src1 has a 32-bit stride, but the dest and src0 have a 64-bit
stride.

This caused ~4 pixels in the ARB_shader_ballot piglit test
fs-readInvocation-uint.shader_test to be incorrect. Unfortunately no
ARB_gpu_shader_int64 test hit this case because they operate on
uniforms, and their scalar regions are an exception to the restriction.

We work around this by effectively unpacking the shift count, so that we
can read it with a 64-bit stride in the shift instruction. Unfortunately
the unpack (a MOV with a dst stride of 2) is a partial write, and cannot
be copy-propagated or CSE'd.

Bugzilla: https://bugs.freedesktop.org/101984

i965/fs: Don't apply POW/FDIV workaround on Gen10+

The documentation says it applies only to Gens 8 and 9.

Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>

i965: Fix src0 vs src1 typo

A typo caused us to copy src0's reg file to src1 rather than reading
src1's as intended. This caused us to fail to compact instructions like

   mov(8)   g4<1>D    0D              { align1 1Q };

because src1 was set to immediate rather than architecture file. Fixing
this reenables compaction (after the precompact() pass changes the data
types):

   mov(8)   g4<1>UD   0x00000000UD    { align1 1Q compacted };

Fixes: 1cb0a7941b27 ("i965: Switch to using the logical register types")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

radv: enable tc compatible htile for d32s8 also.

This enables tc compatible htile for stencil surfaces as well.

This gives a 3-5fps boost on Mad Max on high@4k.

It also depends on Bas's tc-compat htile patch.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: dump SPIRV when a GPU hang is detected

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: dump NIR when a GPU hang is detected

This looks a bit ugly to me, but the existing codepath
is not terribly elegant as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac: silence a warning

egl/wayland: Don't use dmabuf with no modifiers

The dmabuf interface requires a valid modifier to be sent. If we don't
explicitly get a modifier from the driver, we can't know what to send;
it must be inferred from legacy side-channels (or assumed to linear, if
none exists).

If we have no modifier, then we can only have a single-plane format
anyway, so fall back to the old wl_drm buffer import path.

Fixes: a65db0ad1c ("st/dri: don't expose modifiers in EGL if the driver doesn't implement them")
Fixes: 02cc359372 ("egl/wayland: Use linux-dmabuf interface for buffers")
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Andy Furniss <adf.lists@gmail.com>
Cc: Marek Olšák <marek.olsak@amd.com>

egl/wayland: Check queryImage return for wl_buffer

When creating a wl_buffer from a DRIImage, we extract all the DRIImage
information via queryImage. Check whether or not it actually succeeds,
either bailing out if the query was critical, or providing sensible
fallbacks for information which was not available in older DRIImage
versions.

Fixes: a65db0ad1c ("st/dri: don't expose modifiers in EGL if the driver doesn't implement them")
Fixes: 02cc359372 ("egl/wayland: Use linux-dmabuf interface for buffers")
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reported-by: Andy Furniss <adf.lists@gmail.com>
Cc: Marek Olšák <marek.olsak@amd.com>

travis: move include path from $CC to $CFLAGS

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

wayland-egl: adds CFLAGS for wayland.egl.h include

Starting with commit ab0589c6ed ("wayland-egl: remove no longer needed
wayland-client dependency") the wayland-egl.h include was missing leading to a
build failure:

  CC       wayland-egl.lo
wayland-egl.c:33:10: fatal error: wayland-egl.h: No such file or directory
 #include "wayland-egl.h"
          ^~~~~~~~~~~~~~~

Strictly speaking we should be checking for wayland-egl in configure and
propagating its CFLAGS here.

Yet again, the current wayland-egl split is bonkers as the Wayland repo
provides single header, no pkg-config file or library.

That will be resolved at a later stage, but in the meanwhile fix the
build.

Fixes: ab0589c6ed ("wayland-egl: remove no longer needed wayland-client
dependency")
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil Velikov: add some text about CFLAGS and current wayland-egl situation]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

automake: add texcompress_s3tc_tmp.h to the sources list

Otherwise it will be missing from the tarball.

Fixes: f7daa737d17 ("mesa: Combine libtxc_dxtn sources into
texcompress_s3tc_tmp.h")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

st/va: add RGB support to vlVaPutSurface

Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/va: don't re-allocate interlaced buffer with pakced format

It caused corruption, when vlVaPutImage putting raw data to the fields

v2: add RGB formats since it got uploaded here as well

Cc: mesa-stable@lists.freedesktop.org
Cc: Andy Furniss <adf.lists@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

st/vdpau: don't re-allocate interlaced buffer with packed YUV format

It caused corruption, when vlVdpVideoSurfacePutBitsYCbCr putting YUV to the fields

Cc: mesa-stable@lists.freedesktop.org
Cc: Andy Furniss <adf.lists@gmail.com>
Tested-by: Andy Furniss <adf.lists@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

radv: Implement TC compatible HTILE.

The situations where we enable it are quite limitied, but it works,
even for madmax, so lets just enable it.

Reviewed-by: Dave Airlie <airlied@redhat.com>

radv: emit fmuladd instead of fma to llvm.

For Vulkan SPIR-V the spec states
fma() Inherited from OpFMul followed by OpFAdd.

Matt says the backend will do the right thing depending on the
hardware being compiled for, if you use the fmuladd intrinsic.

Using the Mad Max pts test, on high settings at 4K:
CHP: 55->60
HGDD: 46->50
LM: 55->60
No change on Stronghold.

Thanks to Feral for spending the time to track this down.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

android: fix build issues with brw_nir_trig_workarounds.c

Fixes: 848da66222 ("intel: use a flag instead of setting PYTHONPATH")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

intel: compiler: vec4: add missing default 0 lod

We set a similar default value for LOD in the fs backend for TXS/TXL.
Without this we end up generating invalid MOV with a null src.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: "17.2 17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>

anv: Remove base_vertex/instance from push_constants

This is just legacy cruft.  We don't push these values; we pass them in
as vertex attributes.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

util: include string.h in u_string.h

To fix MinGW compiler warning about missing strlen() prototype.
Not sure how I missed this when fixing the malloc() / stdlib.h issue.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

llvmpipe: silence 'variable may be used uninitialized' warnings

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

mesa: silence 'variable may be used uninitialized' warning in teximage.c

Found with MinGW optimized build.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

mesa: silence 'variable may be used uninitialized' warning in bufferobj.c

Found with MinGW optimized build.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: wrap long comments in svga_tgsi_vgpu10.c

Trivial.

svga: tweak pre-VGPU10 rasterization offsets

It seems there's no perfect x/y biases for line drawing to satisfy all
applications.  Depending on the biases, either real apps produce results
similar to VGPU10 while Piglit's gl-1.0-ortho-pos fails, or vice versa.

Let's lean toward real applications (Solidworks, SolidEdge, Google Earth)
over Piglit.

Using (-0.5, -0.5) for points, lines and triangles, seems to generally
work well.

We don't seem to have these issues with VGPU10.

Tested with Piglit and CAD-oriented apitraces.  See VMware bugs 1775498
and 1905053.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: if we get nr_samples==1, store nr_samples=0

We need to be more careful not to treat nr_samples=1 as an msaa surface.
This patch prevents us from errantly declaring an MSAA shader resource
with 1 sample.

No Piglit regressions, fixes the above-described errors.

Reviewed-by: Neha Bhende <bhenden@vmware.com>

svga: emit sampler constants only if sampler view exists

It is possible to have holes in the shader emitter's sampler_target array.
0 sampler_target does not necessarily mean there is no sampler view
specified since texture buffer target has the value 0.
With this patch, a sampler_view array is added to the shader emitter structure
to specify if there is a sampler view for each texture unit. Only if there
is a sampler view, we will emit constant for texcoord scale factor or texture
buffer size for that sampler view.

Fixes a rendering issue with Turbine after commit 1020e960440.

Reviewed-by: Brian Paul <brianp@vmware.com>

svga: fix incorrect case in svga_typeless_format()

For the case of SVGA3D_X32_G8X24_UINT we incorrectly returned
SVGA3D_R32_FLOAT_X8X24.  We should return SVGA3D_R32G8X24_TYPELESS.

Note that we never actually use SVGA3D_X32_G8X24_UINT so this has
no impact.

No Piglit regressions.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: add typeless switch cases in svga_typeless_format()

We sometimes pass typeless formats to this function.  By adding switch
cases we avoid the "Unexpected format XXX in svga_typeless_format"
warning messages.  No functional change.

No Piglit regressions, no above-mentioned warning messages.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>

svga: Allow sRGB format with PIPE_BIND_DISPLAY_TARGET binding flag on vgpu10.

This patch allows to use sRGB formats for DISPLAY_TARGET on vgpu10.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>

etnaviv: Set up unknown GC3000 states

Set up new states that the blob started setting for GC3000 consistently.

This makes sure that when another test or driver leaves the GPU in
unpredictable state, these states are set up correctly for our
rendering.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: Fix point sprite rendering on GC3000

Setting PA_VIEWPORT_UNK state correctly is necessary to make point sprite
rendering on GC3000 work.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: Add support for DP2 instruction

A two-component dot product instruction is supported with HALTI2, use it
on hardware that supports it.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: Support opcodes with bit 6 set in assembler

Support opcodes with bit 6 set in assembler, and assert that only ops
0x00..0x7f are used.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

travis: add meson build for vulkan drivers.

v2: - use -isystem`pwd` instead of cp to include fake linux header
      (Eric E., Emil)

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

meson: convert gtest to an internal dependency

In truth gtest is an external dependency that upstream expects you to
"vendor" into your own tree. As such, it makes sense to treat it more
like a dependency than an internal library, and collect it's
requirements together in a dependency object.

v2: - include with -isystem instead of setting compiler args (Eric)

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: set C++ standard to C++11

RadeonSI requires C++11, clover requires C++11, LLVM requires it, so
llvmpipe may require it, and that covers most of the C++ code in mesa.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: add window system deps to intel vulkan common

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

meson: look for libelf as a library if there is no pkgconfig

Required for older versions of libelf that don't have a pkgconfig file.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

egl/surfaceless: Use KMS swrast fallback

The kms_swrast extension is an actively developed software fallback,
and platform_surfaceless can use it if there are no available
hardware drivers.

v2: Split into 2 patches, use booleans, check LIBGL_ALWAYS_SOFTWARE,
    and modify the eglLog level (Emil, Eric, Tomasz).

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl/surfaceless: add probe device helper function

This will help us initialize a software driver, if it's needed
or requested.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

gallium/u_tests: fix ifdef for sync_file fences

include libsync.h only when libdrm is compiled in

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

util: include stdlib.h in u_string.h to silence MinGW warning

Otherwise we don't get a prototype for malloc().

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

intel: Always set Cube Face Enables for all surfaces.

These shouldn't matter for non-cubes, and we always enable them all
for cubes, so we may as well set them all the time.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel: Make Cube Face Enable fields consistent across generations.

I decided to use the one-boolean-per-cube-face approach because it's
clearer which bits correspond to which cube face.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

docs: Document that libtxc_dxtn is now no longer needed

docs: GL_ARB_indirect_parameters is now supported on i965/gen7+

travis: Remove libtxc_dxtn from the build

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

build: Remove HAVE_DLOPEN

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Delete now unused dlopen.h

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Remove force_s3tc_enable driconf variable

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

gallium: Remove util_format_s3tc_init()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

gallium: Remove util_format_s3tc_enabled

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa/st: Drop has_lib_dxtc argument from st_init_extensions()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Drop Mesa_DXTn from gl_context

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Drop function pointer checks in s3tc code

Now never null!

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Call DXTn functions directly

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Remove fprintf referring to libdxtn

When this file is included by Gallium, the fprintf causes it to fail to
compile. This is an unreachable error case, and we shouldn't be calling
fprintf directly.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Remove prototypes and mark S3TC functions static

This file will be #included, so the functions should be static.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Remove commented-out DXTn fetch code

Has been disabled for 12 years.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Combine libtxc_dxtn sources into texcompress_s3tc_tmp.h

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

mesa: Import libtxc_dxtn sources

Imported from master (commit ef07298391c6dcad843e0b13e985090c1dd76e76)
of https://cgit.freedesktop.org/~mareko/libtxc_dxtn/

Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>

anv: Remove unreachable cases from isl_format_for_size()

The dstOffset and fillSize parameters must be multiple of 4.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.1 17.2" <mesa-stable@lists.freedesktop.org>

anv: Fix vkCmdFillBuffer()

The vkCmdFillBuffer() command fills a buffer with an uint32_t value.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "17.1 17.2" <mesa-stable@lists.freedesktop.org>

st/mesa: don't use pipe_surface for passing information about EGLImage

Use st_egl_image instead. radeonsi doesn't like when we create
a pipe_surface with PIPE_FORMAT_NV12.

This fixes NV12 texturing on radeonsi using kmscube.

Cc: 17.1 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/u_tests: test sync_file fences

This should be sufficient for testing all kernel/libdrm/radeonsi codepaths
that are used by radeonsi.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

i965: Implement ARB_indirect_parameters.

We can implement ARB_indirect_parameters for i965 by
taking advantage of the conditional rendering mechanism.
This works by issuing maxdrawcount draw calls and using
conditional rendering to predicate each of them with
"drawcount > gl_DrawID"

Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Refactor brw_try_draw_prims.

In order to add our ARB_indirect_parameters implementation we
need to refactor brw_try_draw_prims so that it operates on a
per primitive basis and move the loop into brw_draw_prims.
This commit refactors the brw_try_draw_prims function and
renames it to brw_draw_single_prim.

Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Indroduce brw_finish_drawing.

In order to add our ARB_indirect_parameters implementation we
need to refactor brw_try_draw_prims so that it operates on a
per primitive basis and move the loop into brw_draw_prims.
This commit introduces the brw_finish_drawing function where
we move the code that executes once after the loop.

Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Introduce brw_prepare_drawing.

In order to add our ARB_indirect_parameters implementation we
need to refactor brw_try_draw_prims so that it operates on a
per primitive basis and move the loop into brw_draw_prims.
This commit introduces the brw_prepare_drawing function where
we move the code that executes once before the loop.

Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

glsl: Remove spurious assertions

It's inside an if-statement that already checks that the variables are
not NULL.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl: Move 'foo = foo;' optimization to opt_dead_code_local

The optimization as done in opt_copy_propagation would have to be
removed in the next patch.  If we just eliminate that optimization
altogether, shader-db results, even on platforms that use NIR, are hurt
quite substantially.  I have not investigated why NIR isn't picking up
the slack here.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>

glsl/ast: Use logical-or instead of conditional assignment to set fallthru_var

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl/ast: Generate a more compact expression to disable execution of default case

Instead of generating a sequence like:

    run_default = true;
    if (i == 3) // some label that appears after default
        run_default = false;
    if (i == 4) // some label that appears after default
        run_default = false;
    ...
    if (run_default) {
        ...
    }

generate something like:

    run_default = !((i == 3) || (i == 4) || ...);
    if (run_default) {
        ...
    }

This eliminates one use of conditional assignment, and it enables the
elimination of another.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl/ast: Explicitly track the set of case labels that occur after default

Previously the instruction stream was walked looking for comparisons
with case-label values.  This should generate nearly identical code.
For at least fs-default-notlast-fallthrough.shader_test, the code is
identical.

This change will make later changes possible.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl/ast: Convert ast_case_label::hir to ir_builder

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl/ast: Use ir_binop_equal instead of ir_binop_all_equal

The values being compared are scalars, so these are the same.  While
I'm here, simplify the run_default condition to just deref the flag
(instead of comparing a scalar bool with true).

There is a bit of extra change in this patch.  When constructing an
ir_binop_equal ir_expression, there is an assertion that the types are
the same.  There is no such assertion for ir_binop_all_equal, so
passing glsl_type::uint_type with glsl_type::int_type was previously
fine.  A bunch of the code motion is to deal with that.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl/ast: Stop processing a switch-statement after an error in the init-expression

This happens to work now because ir_binop_all_equal is used.  This
causes vector typed init-expressions to produce scalar Boolean values
after comparison.

The next commit changes ir_binop_all_equal to ir_binop_equal.  Vector
typed init-expressions will then produce vector Boolean values, and, in
debug builds, the ir_assignment constructor will fail an assertion.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl: Don't pass NULL to ir_assignment constructor when not necessary

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl: Convert lower_variable_index_to_cond_assign to ir_builder

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>

glsl: Fix coding standards issues in lower_variable_index_to_cond_assign

Mostly tabs-before-spaces, but there was some other trivium too.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>

glsl: Convert lower_vec_index_to_cond_assign to using ir_builder

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>

glsl: Return ir_variable from compare_index_block

This is basically a wash now, but it simplifies later patches that
convert to using ir_builder.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>

glsl: Fix coding standards issues in lower_vec_index_to_cond_assign

Mostly tabs-before-spaces, but there was some other trivium too.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>

glsl: Fix coding standards issues in lower_if_to_cond_assign

Mostly tabs-before-spaces issues.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>

nir/spirv: Allow loop breaks in a switch body.

Per the SPIR-V spec 2.11 Structured Control Flow:

"The only blocks in a construct that can branch outside the construct are

...
- a break block for the innermost loop it is inside of.
..."

With

"Break block: A block containing a branch to the Merge Block of a loop header's merge instruction."

Note that it puts no restriction on not being in an if or switch within the innermost loop.

This passes the loop_break block to the switch body so it can properly detect loop breaks.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

freedreno/a5xx: fix missing restore state

RB_CLEAR_CNTL seems to be in a funny state after boot (at least on
8x96/a530).

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

radv: make radv_dynamic_state_copy() static

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

meson: change vulkan icd config to - instead of _

Just to be consistent.

v2: - update meson.build too
v3: - remove unrelated whitespace change

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>