Bas Nieuwenhuizen [Sun, 2 Apr 2017 10:32:39 +0000 (12:32 +0200)]
radv: Rework guard band calculation.
We want the guardband_x/y to be the largerst scalars such that each
viewport scaled by that amount is still a subrange of [-32767, 32767].
The old code has a couple of issues:
1) It used scissor instead of viewport_scissor, potentially taking into
account a viewport that is too small and therefore selecting a scale
that is too large.
2) Merging the viewports isn't ideal, as for example viewports with
boundaries [0,1] and [1000, 1001] would allow a guardband scale of ~30k,
while their union [0, 1001] only allows a scale of ~32.
The new code just determines the guardband per viewport and takes the minimum.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Mon, 3 Apr 2017 19:33:51 +0000 (21:33 +0200)]
radv: Enable VK_KHR_incremental_present.
Just enabling the driver-independent implementation that Jason did.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Tue, 24 Jan 2017 23:13:31 +0000 (15:13 -0800)]
anv: Implement VK_KHR_incremental_present
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Jason Ekstrand [Tue, 24 Jan 2017 23:29:43 +0000 (15:29 -0800)]
vulkan/wsi/wayland: Pass damage through to the compositor
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Jason Ekstrand [Tue, 24 Jan 2017 23:11:01 +0000 (15:11 -0800)]
vulkan/wsi: Plumb present regions through the common code
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Sat, 1 Apr 2017 05:15:31 +0000 (22:15 -0700)]
vulkan/wsi: Fix some line wrapping
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Dave Airlie [Mon, 3 Apr 2017 03:43:15 +0000 (04:43 +0100)]
radv: fix interp at sample code.
Interp at sample needs to use the center, since the sample
positions it retrieves are relative to the center.
This fixes a bunch of CTS tests with multisample_interpolation.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 3 Apr 2017 03:38:12 +0000 (04:38 +0100)]
radv: overhaul fragment shader sample positions.
The current code was broken, and I decided to redesign it instead.
This puts the sample positions for all samples into the queue
constant descriptor buffer after all the spill/ring descriptors.
It then uses a single offset register to point how far into the
samples the samples for num_samples are. This saves one user sgpr
and means we only generate the sample position data in the rare
single case where we need it currently.
This doesn't fix the failing CTS tests without the followup
fix.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Lionel Landwerlin [Sun, 2 Apr 2017 00:07:37 +0000 (01:07 +0100)]
aubinator/gen_decoder/i965: decode instructions from dword 0
Some packets like 3DSTATE_VF_STATISTICS, 3DSTATE_DRAWING_RECTANGLE,
3DPRIMITIVE, PIPELINE_SELECT, etc... have configurable fields in
dword0, we probably want to print those.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Lionel Landwerlin [Sun, 2 Apr 2017 14:54:14 +0000 (15:54 +0100)]
intel: gen_decoder: store pointer to current decoded field in iterator
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Dave Airlie [Sun, 19 Mar 2017 03:39:29 +0000 (13:39 +1000)]
radv/ac: fix texture derivative ordering
The ordering NIR gives us is correct for the hw, this fixes:
dEQP-VK.glsl.texture_functions.texturegrad.* (mainly trigged
on isampler/usampler 3d textures.).
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 15 Mar 2017 05:45:05 +0000 (15:45 +1000)]
radv/ac: round cube array coordinate before fixup.
This fixes:
dEQP-VK.glsl.texture_functions.texture.samplercubearray*
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 3 Apr 2017 18:57:14 +0000 (04:57 +1000)]
radv: move to using common buffer load format.
Get rid of usage of SI.vs.load.input.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Brian Paul [Mon, 3 Apr 2017 14:45:07 +0000 (08:45 -0600)]
util: fix MSVC warning in u_align_u32()
To silence
C:\Users\Brian\projects\mesa\src\util/u_vector.h(41) : warning C4146: unary
minus operator applied to unsigned type, result still unsigned
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Brian Paul [Mon, 3 Apr 2017 14:44:10 +0000 (08:44 -0600)]
util: #include "c99_compat.h" to fix Windows build
Otherwise, we were getting the definition for 'inline' by chance from
some other preceeding #include.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Brian Paul [Mon, 3 Apr 2017 14:36:45 +0000 (08:36 -0600)]
util: s/SHA1_H/MESA_SHA1_H/
To follow the convention of other header include guards.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Brian Paul [Mon, 3 Apr 2017 14:42:36 +0000 (08:42 -0600)]
svga: add comment on svga_buffer_hw_storage_map()
Trivial.
Rhys Kidd [Sun, 2 Apr 2017 20:48:39 +0000 (16:48 -0400)]
travis: Support LLVM 3.8+ on Trusty-based Travis-CI via apt-get not apt addon
Per comments by Travis-CI, the apt addon is only really needed for the
container-based Precise builds, as they don't yet support Trusty on that platform.
Mesa currently uses Trusty fully-virtualized environment (due to sudo: required).
See further:
https://docs.travis-ci.com/user/trusty-ci-environment/#Fully-virtualized-via-sudo%3A-required
https://github.com/travis-ci/apt-source-whitelist/pull/205#issuecomment-
216054237
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Grazvydas Ignotas [Thu, 30 Mar 2017 22:26:25 +0000 (01:26 +0300)]
util/u_atomic: provide 64bit atomics where they're missing
There are still some distributions trying to support unfortunate people
with old or exotic CPUs that don't have 64bit atomic operations. When
compiling for such a machine, gcc conveniently inserts a library call to
a helper, but it's implementation is missing and we get a linker error.
This allows us to provide our own implementation, which is marked weak
to prefer a better implementation, should one exist.
v2: changed copyright, some style adjustments
v3: [mattst88] Print results with AC_MSG_CHECKING/AC_MSG_RESULT
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93089
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Rob Clark [Fri, 24 Mar 2017 20:07:03 +0000 (16:07 -0400)]
gallium/util: libunwind support
It's kinda sad that (a) we don't have debug_backtrace support on !X86
and that (b) we re-invent our own crude backtrace support in the first
place. If available, use libunwind instead. The backtrace format is
based on what xserver and weston use, since it is nice not to have to
figure out a different format.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Rob Clark [Fri, 24 Mar 2017 19:04:58 +0000 (15:04 -0400)]
gallium/util: clean up stack frame printing
Prep work for next patch.
Ideally 'struct debug_stack_frame' would be opaque, but it is embedded
in a bunch of places. But at least we can treat it opaquely.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Samuel Pitoiset [Fri, 31 Mar 2017 10:48:03 +0000 (12:48 +0200)]
st/mesa: add st_convert_image()
Should be used by the state tracker when glGetImageHandleARB()
is called in order to create a pipe_image_view template.
v3: - move the comment to *.c
v2: - make 'st' const
- describe the function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Thu, 30 Mar 2017 16:55:02 +0000 (18:55 +0200)]
st/mesa: make 'st' const in st_mesa_format_to_pipe_format()
This avoids a compilation warning since st_convert_image()
requires 'st' to be const.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bartosz Tomczyk [Thu, 30 Mar 2017 20:31:09 +0000 (22:31 +0200)]
mesa/glthread: Call unmarshal_batch directly in glthread_finish
Call it directly when batch queue is empty. This avoids costly thread
synchronisation. This commit improves performance of games that have
previously regressed with mesa_glthread=true.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Fri, 31 Mar 2017 00:45:34 +0000 (11:45 +1100)]
mesa: disable glthread when DEBUG_OUTPUT_SYNCHRONOUS is enabled
We could re-enable it also but I haven't tested that yet, and I'm
not sure we care much anyway.
V2: don't disable it from with the call itself. We need a custom
marshalling function or we get stuck waiting for thread to
finish.
V3: tidy up redundant code copied from generated version.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Grazvydas Ignotas [Sun, 2 Apr 2017 17:22:21 +0000 (20:22 +0300)]
amd/addrlib: fix optimized build warnings
All the -Wunused-but-set-variable ones.
Found a way to do it with a oneliner.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Grazvydas Ignotas [Sun, 2 Apr 2017 17:22:11 +0000 (20:22 +0300)]
radeonsi: use unreachable to fix a warning
si_state.c: In function ‘si_make_texture_descriptor’:
si_state.c:3240:25: warning: ‘num_format’ may be used uninitialized
si_state.c:3240:12: warning: ‘data_format’ may be used uninitialized
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Constantine Kharlamov [Sun, 26 Mar 2017 15:36:22 +0000 (18:36 +0300)]
r600g: Add more (un)likely functions
1-st is obvious because of assert, 2-nd stolen frmo si_draw_vbo(),
and 3-rd is just a small refactoring.
Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Constantine Kharlamov [Sun, 26 Mar 2017 15:36:21 +0000 (18:36 +0300)]
r600g: Remove intermediate assignment of pipe_draw_info
It removes a need to copy whole struct every call for no reason. Comparing
objdump -d output for original and this patch compiled with -O2, shows reduce
of the function by 16 bytes.
Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Constantine Kharlamov [Sun, 26 Mar 2017 15:36:20 +0000 (18:36 +0300)]
r600g: Use separate index_bias variable
Needed to get rid of a separate struct allocation in the next patch, because
the one in argument is a constant, and don't allow changing its fields.
Signed-off-by: Constantine Kharlamov <Hi-Angel@yandex.ru>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Sun, 2 Apr 2017 14:57:39 +0000 (10:57 -0400)]
nv30: fp/rast may be null when validating fb/scissor due to clear
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 2 Apr 2017 14:48:11 +0000 (10:48 -0400)]
nvc0: fragprog may not be set when e.g. clearing
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 6 Mar 2017 00:45:00 +0000 (19:45 -0500)]
nv50: don't assume a rast is set when validating for clears
Clears can happen before a rast is set, which can in turn cause scissors
and fragprog to be validated. Make sure that we handle this case.
Reported-by: Andrew Randrianasulu <randrianasulu@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Dave Airlie [Sun, 2 Apr 2017 04:36:51 +0000 (14:36 +1000)]
radv: fix order of the guardband register emission.
y is vert, x is horiz.
Noticed in visual inspection compared to radeonsi.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Edward O'Callaghan [Fri, 17 Mar 2017 05:24:06 +0000 (16:24 +1100)]
mesa/main: Fix memset in formatquery.c
v2: We explicitly set each member to -1 over using a confusing
memset().
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Samuel Pitoiset [Thu, 30 Mar 2017 17:58:02 +0000 (19:58 +0200)]
radeonsi: add load_image_desc()
Similar to load_sampler_desc(). Same deal for bindless.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Thu, 30 Mar 2017 17:58:01 +0000 (19:58 +0200)]
radeonsi: rework the load_sampler_desc() helpers
Will be more convenient for bindless because the 64bit handle is
actually the base_ptr of the descriptor (ie. 'list' will be fetched
from TGSI_FILE_CONSTANT/TGSI_FILE_TEMPORARY instead).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Samuel Pitoiset [Thu, 30 Mar 2017 17:57:43 +0000 (19:57 +0200)]
gallivm: add lp_build_emit_fetch_src() helper
lp_build_emit_fetch() is useful when the source type can be
infered from the instruction opcode.
However, for bindless samplers/images we can't do that easily
because tgsi_opcode_infer_src_type() returns TGSI_TYPE_FLOAT for
TEX instructions, while we need TGSI_TYPE_UNSIGNED64 if the
resource register is bindless.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Andres Gomez [Sat, 1 Apr 2017 15:51:40 +0000 (18:51 +0300)]
docs: add news item and link release notes for 17.0.1
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Sat, 1 Apr 2017 15:47:00 +0000 (18:47 +0300)]
docs: add sha256 checksums for 17.0.3
Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit
71d2f05a9e831af04ea26dd8c975d285e0b964ec)
Andres Gomez [Sat, 1 Apr 2017 14:29:34 +0000 (17:29 +0300)]
docs: add release notes for 17.0.3
Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit
7f34ecae7fddd3435346f0475557b34920763422)
Erik Faye-Lund [Wed, 24 Sep 2014 11:41:25 +0000 (13:41 +0200)]
glsl: ir_explog_to_explog2 is no more
Since
63684a9a ("glsl: Combine many instruction lowering passes
into one.", Thu Nov 18 2010), we no longer have anything called
ir_explog_to_explog2. So it's only confusing to have those
references there.
Update with the appropriate method, so people can grep for it in
the current tree if they encounter it.
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Erik Faye-Lund [Wed, 21 Aug 2013 13:59:14 +0000 (15:59 +0200)]
gallium/docs: remove documentation of removed arg
geom was removed in
e968975 ("gallium: remove the geom_flags param
from is_format_supported", Tue Mar 8 00:01:58 2011 +0100), but the
documentation of it was left over. Let's bring the documentation up
to date.
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Erik Faye-Lund [Mon, 8 Aug 2016 08:11:31 +0000 (10:11 +0200)]
st/mesa: avoid aliasing violation in st_cb_perfmon.c
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Michal Srb [Tue, 28 Mar 2017 20:39:28 +0000 (23:39 +0300)]
st: Add cubeMapFace parameter to st_finalize_texture.
st_finalize_texture always accesses image at face 0, but it may not be
set if we are working with cubemap that had other face set.
This fixes crash in piglit
same-attachment-glFramebufferTexture2D-GL_DEPTH_STENCIL_ATTACHMENT.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Jason Ekstrand [Sat, 1 Apr 2017 05:16:24 +0000 (22:16 -0700)]
vulkan: Bump the header and XML to the latest public version
Karol Herbst [Sun, 26 Mar 2017 19:46:01 +0000 (21:46 +0200)]
nv50/ir: also do PostRaLoadPropagation for FMA
Helps Feral-ported games, due to their use of fma()
shader-db changes:
total instructions in shared programs :
3934925 ->
3934327 (-0.02%)
total gprs used in shared programs : 481563 -> 481563 (0.00%)
total local used in shared programs : 27469 -> 27469 (0.00%)
total bytes used in shared programs :
36061888 ->
36056504 (-0.01%)
local gpr inst bytes
helped 0 0 228 228
hurt 0 0 0 0
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Sun, 26 Mar 2017 19:46:00 +0000 (21:46 +0200)]
gm107/ir: add LIMM form of mad
v2: renamed commit
reordered modifiers
add assert(dst == src2)
v3: reordered modifiers again
v5: no rounding bit for limms
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Sun, 26 Mar 2017 19:45:59 +0000 (21:45 +0200)]
gk110/ir: add LIMM form of mad
v2: renamed commit
reordered modifiers
add assert(dst == src2)
v3: removed wrong neg mod emission
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Sun, 26 Mar 2017 19:45:58 +0000 (21:45 +0200)]
nv50/ir: implement mad post ra folding for nvc0+
changes for GpuTest /test=pixmark_piano /benchmark /no_scorebox /msaa=0
/benchmark_duration_ms=60000 /width=1024 /height=640:
score: 1026 -> 1045
changes for shader-db:
total instructions in shared programs :
3943335 ->
3934925 (-0.21%)
total gprs used in shared programs : 481563 -> 481563 (0.00%)
total local used in shared programs : 27469 -> 27469 (0.00%)
total bytes used in shared programs :
36139384 ->
36061888 (-0.21%)
local gpr inst bytes
helped 0 0 3587 3587
hurt 0 0 0 0
v2: removed TODO
reorderd to show changes without RA modification
removed stale debugging print() call
v3: remove predicate checks
enable only for gf100 ISA
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Sun, 26 Mar 2017 19:45:57 +0000 (21:45 +0200)]
nv50/ir: restructure and rename postraconstantfolding pass
we might want to add more folding passes here, so make it a bit more generic
v2: leave the comment and reword commit message
v4: rename it to PostRaLoadPropagation
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Tue, 21 Mar 2017 17:37:47 +0000 (18:37 +0100)]
nvc0/ir: also do ConstantFolding for FMA
Helps mainly Feral-ported games, due to their use of fma()
shader-db changes:
total instructions in shared programs :
3941587 ->
3940749 (-0.02%)
total gprs used in shared programs : 481511 -> 481460 (-0.01%)
total local used in shared programs : 27469 -> 27481 (0.04%)
total bytes used in shared programs :
36123344 ->
36115776 (-0.02%)
local gpr inst bytes
helped 2 48 243 243
hurt 2 3 32 32
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Tue, 21 Mar 2017 17:37:46 +0000 (18:37 +0100)]
nvc0/ir: disable support for LIMMs on MAD/FMA
I hit an assert in the emiter while toying around with optimizations, because
ConstantFolding immediated a big int into a mad.
There is special handling for FMA/MAD in insnCanLoad, which is broken. With
this patch the special path should be not hit anymore. Anyway, the constraints
for the LIMMS can't be guarenteed in SSA form and I have patches pending to
use it via a post-SSA optimization pass.
As a result, immediates get immediated for int mad/fmas as well.
changes in shader-db:
total instructions in shared programs :
3943335 ->
3941587 (-0.04%)
total gprs used in shared programs : 481563 -> 481511 (-0.01%)
total local used in shared programs : 27469 -> 27469 (0.00%)
total bytes used in shared programs :
36139384 ->
36123344 (-0.04%)
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
[imirkin: remove extra bit from insnCanLoad as well]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Wed, 15 Mar 2017 21:15:03 +0000 (17:15 -0400)]
nvc0: Add support for NV_fill_rectangle for the GM200+
This enables support for the GL_NV_fill_rectangle extension on the
GM200+ for Desktop OpenGL.
Signed-off-by: Lyude <lyude@redhat.com>
Changes since v1:
- Fix commit message
- Add note to reldocs
Changes since v2:
- Remove unnessecary parens in nvc0_screen_get_param()
- Fix sorting in release notes
- Don't execute FILL_RECTANGLE method on pre-GM200+ GPUs
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Thu, 16 Mar 2017 22:15:21 +0000 (18:15 -0400)]
st/mesa: Add support for NV_fill_rectangle
Signed-off-by: Lyude <lyude@redhat.com>
Changes since v1:
- Fix commit name
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Wed, 8 Mar 2017 01:06:39 +0000 (20:06 -0500)]
gallium: Add NV_fill_rectangle to pipe state
Signed-off-by: Lyude <lyude@redhat.com>
Changes since v1:
- Fix accidental widening of bitfields
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Thu, 16 Mar 2017 22:00:05 +0000 (18:00 -0400)]
gallium: Add a cap to check if the driver supports fill_rectangle
Changes since v1:
- Add pipe caps for etnaviv, freedreno, swr and virgl
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Tue, 7 Mar 2017 02:47:00 +0000 (21:47 -0500)]
mesa: Add support for GL_NV_fill_rectangle
Since we don't have the bits required to support this in OpenGLES yet,
this only enables support for Desktop OpenGL
Signed-off-by: Lyude <lyude@redhat.com>
Changes since v1:
- Simply _mesa_PolygonMode() a little bit
- Fix formatting in OpenGL spec excerpts
- Move polygon mode checking into _mesa_valid_to_render()
Changes since v3:
- Improve error message for invalid drawings with GL_FILL_RECTANGLE_NV
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Tue, 7 Mar 2017 02:21:05 +0000 (21:21 -0500)]
glapi: Add GL_NV_fill_rectangle
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Marek Olšák [Thu, 7 Aug 2014 00:05:10 +0000 (02:05 +0200)]
gallium: remove support for predicates from TGSI (v2)
Neved used.
v2: gallivm: rename "pred" -> "exec_mask"
etnaviv: remove the cap
gallium: fix tgsi_instruction::Padding
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Thu, 30 Mar 2017 07:48:49 +0000 (08:48 +0100)]
radv: enable tessellation shaders.
This enables tessellation shaders and sets some values for
the maximums.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 19:15:23 +0000 (20:15 +0100)]
radv/ac: setup lds for tessellation
This seems to get lost in the rebases, should fix
the tessellation demos, crash in llvm.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:10:06 +0000 (08:10 +0100)]
radv: add ia_multi_vgt_param tessellation support.
This just ports the relevant radeonsi pieces.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:47:38 +0000 (08:47 +0100)]
radv/cmd: emit tessellation state.
This emits the tessellation shaders and state to the command stream.
It contains the logic to emit the LS/HS shaders.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:45:42 +0000 (08:45 +0100)]
radv/pipeline: handle tessellation shader compilation
So tess shaders have some circular dependencies,
TCS needs the TES primitive mode
TES needs the TCS vertices out
This builds the nir for each shader first to get the
info, executes a tes specific nir pass, then builds
the LLVM shaders.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:44:26 +0000 (08:44 +0100)]
radv/ac: handle writing out tess factors.
This ports the code from radeonsi to build the if/endif,
and ports the tess factor emission code. This code has
an optimisation TODO that we can deal with later.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:28:46 +0000 (08:28 +0100)]
radv/ac: add support for TCS/TES inputs/outputs.
This adds support for the tessellation inputs/outputs to the
shader compiler, this is one of the main pieces of the patch.
It is very similiar to the radeonsi code (post merge we should
consider if there are better sharing opportunities). The main
differences from radeonsi, is that we can have "compact" varyings
for clip/cull/tess factors, and we have to add special handling
for these.
This consists of treating the const index from the deref different
depending on the compactness.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:26:28 +0000 (08:26 +0100)]
radv/ac: add clip support for tess eval shader.
As this may be the last shader to emit clip distances.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:25:18 +0000 (08:25 +0100)]
radv/ac: hook up tessellation intrinsics.
This just adds support for the nir intrinsics that tessellation uses.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:23:36 +0000 (08:23 +0100)]
radv/ac: hook up shader information handling for tessellation
This hooks up the tessellation shader info to the nir values
and ctx generated ones.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:18:13 +0000 (08:18 +0100)]
radv/pipeline: start calculating tess stage.
This calculates the pipeline state for tessellation.
It moves the gs ring calculation down to below
where the tessellation shaders will be compiled,
as it needs the info from those shaders.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:15:43 +0000 (08:15 +0100)]
radv: add tessellation support to variant code.
This just fills out the rsrc registers for tess shaders.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:14:45 +0000 (08:14 +0100)]
radv: add tessellation support to shader naming
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:13:48 +0000 (08:13 +0100)]
radv: add tess ctrl stage barrier workaround for SI.
This just ports the workaround from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:12:27 +0000 (08:12 +0100)]
radv/ac: add support for patch inputs to unique index code.
This add support for tessellation patch inputs to the code
that finds the unique parameter index.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:10:46 +0000 (08:10 +0100)]
radv: port polaris vgt vertex reuse workaround.
This ports the VGT_VERTEX_REUSE register settings
for Polaris GPUs from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:09:22 +0000 (08:09 +0100)]
radv: configure tessellation distribution register.
This just takes the radeonsi values.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:08:07 +0000 (08:08 +0100)]
radv/ac: setup tessellation shader inputs.
This just configures all the register inputs for the tessellation
related stages.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:05:42 +0000 (08:05 +0100)]
radv/ac: setup tess rings on compiler side.
This just sets up the necessary pointers on the compiler
side for the rings needed for tessellation.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:02:14 +0000 (08:02 +0100)]
radv: add tessellation ring allocation support. (v2)
This patch adds support for the offchip rings for storing
tessellation factors and attribute data.
It includes the register setup for the TF ring
v2: always do tess ring size calcs (Bas)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:58:22 +0000 (07:58 +0100)]
radv: add support for some device specific tess information.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:55:23 +0000 (07:55 +0100)]
radv/ac: add tess changes to shader keys/info
This adds the tess pieces for shader keys and shader info,
it adds the necessary bits to the vertex key/info as well.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:53:24 +0000 (07:53 +0100)]
radv: add tess shader stage user data support.
This just adds support for tess to the shader stage conversion
and emits the per-stage descriptors/constants for tess stages.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:49:59 +0000 (07:49 +0100)]
radv: use defines for ring descriptor offsets.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:44:20 +0000 (07:44 +0100)]
radv: add helper function to denote if tess is enabled on a pipeline.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:51:42 +0000 (08:51 +0100)]
radv: handle clip dist in es outputs.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:51:31 +0000 (08:51 +0100)]
radv: drop unneeded start
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 31 Mar 2017 20:56:46 +0000 (06:56 +1000)]
radv: fixup geometry clip emission since using the geom pass
Fixes: 2b35b60d: radv: move to using nir clip/cull merge pass.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Tue, 28 Mar 2017 01:38:47 +0000 (03:38 +0200)]
radeonsi/gfx9: allow CMASK fast clear with RB+
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 17:06:31 +0000 (19:06 +0200)]
radeonsi/gfx9: don't compare src_va w/ dst_va for CP_DMA_CLEAR
src_va contains the clear value in this case.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 14:18:45 +0000 (16:18 +0200)]
radeonsi/gfx9: fix 1D array fetches with derivs, bias, or Z compare value
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 01:34:06 +0000 (03:34 +0200)]
radeonsi/gfx9: fix and enable single-sample CMASK fast clear
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 08:58:02 +0000 (10:58 +0200)]
radeonsi/gfx9: fix and enable MSAA compression
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 20 Mar 2017 15:22:16 +0000 (16:22 +0100)]
radeonsi/gfx9: disable CE
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Feb 2017 21:25:43 +0000 (22:25 +0100)]
radeonsi/gfx9: fix linear mipmap CPU access
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Mar 2017 14:53:19 +0000 (16:53 +0200)]
radeonsi: add tests verifying that VM faults don't hang
GFX9 hangs instead of writing VM faults to dmesg.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Feb 2017 22:49:19 +0000 (23:49 +0100)]
radeonsi: unify HS max_offchip_buffers workarounds
Vulkan doesn't set more than 508.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Feb 2017 22:17:07 +0000 (23:17 +0100)]
radeonsi: adjust checking for SC bug workarounds
no change in behavior, just making sure that no later chips will use
the workarounds
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Fri, 31 Mar 2017 03:14:08 +0000 (21:14 -0600)]
glsl: use -O1 optimization for builtin_functions.cpp with MinGW
Some versions of MinGW-w64 such as 5.3.1 and 6.2.0 produce bad code
with -O2 or -O3 causing a random driver crash when running programs
that use GLSL. Most Mesa demos in the glsl/ directory trigger the
bug, but not the fragcoord.c test.
Use a #pragma to force -O1 for this file for later MinGW versions.
Luckily, this is basically one-time setup code. I suspect the bug
is related to the sheer size of this file.
This should let us move to newer versions of MinGW-w64 for Mesa.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 29 Mar 2017 16:50:00 +0000 (10:50 -0600)]
tnl: remove unused var to silence warning
Trivial.