mesa: fix indentation

Reviewed-by: Eric Anholt <eric@anholt.net>

mesa: remove _mesa from static framebuffer object function

Reviewed-by: Eric Anholt <eric@anholt.net>

gallivm: Fix build against LLVM SVN >= r302589

deregisterEHFrames doesn't take any parameters anymore.

Reviewed-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

mesa: small _mesa_UseProgram() tidy up

Makes the code easier to follow.

Reviewed-by: Eric Anholt <eric@anholt.net>

mesa: add KHR_no_error support for glBindProgramPipeline()

Reviewed-by: Eric Anholt <eric@anholt.net>

mesa: add KHR_no_error support for glActiveShaderProgram()

Reviewed-by: Eric Anholt <eric@anholt.net>

mesa: add KHR_no_error support for glUseProgramStages()

Reviewed-by: Eric Anholt <eric@anholt.net>

mesa: create use_program_stages() helper

This will be used to create a KHR_no_error version of
glUseProgramStages().

Reviewed-by: Eric Anholt <eric@anholt.net>

radv: handle fragment shader srgb resolve pass better

Bas pointed out the fs key doesn't take srgb into account,
since there is just one srgb variant, just create a separate
pipeline for it. This also uses dest format to be more consistent
on when srgb matters.

Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965: Make INTEL_DEBUG=bat decode VS/CLIP/GS/SF/WM/CC_STATE on Gen4-5.

This is something the original decoder did, but I didn't bother with
until now.  I recently had to debug an Ironlake issue, and wanted to
inspect VS_STATE.  So, now it's back.

The other packets in the switch statement are all Gen6/7+, where we
use offsets from dynamic state base address, so we don't need the
gtt_offset subtraction introduced here.  We might want to make a
helper for this hack at some point - perhaps when we introduce the
next occurance.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>

i965: Switch BRW_NEW_CURBE_OFFSETS to BRW_NEW_PUSH_CONSTANT_ALLOCATION.

The BRW_NEW_CURBE_OFFSETS dirty bit is signalled when changing the
partitioning of the Constant Buffer URB section between the various
shader stages, on Gen4-5.

BRW_NEW_PUSH_CONSTANT_ALLOCATION is basically the same thing on Gen7+.

So, save a bit, and use the new name.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Drop BRW_NEW_PUSH_CONSTANT_ALLOCATION from Gen6 code.

Gen6 doesn't have a configurable push constant region.  This is only
used on Gen7+.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

i965: Only #if...#endif a single function or related section at a time.

Previously we guarded large swathes of code with #if GEN ... #endif
blocks.  This made it difficult to see which generations include what.

This patch splits up the #if..#endif sections so they surround a small
section of code - usually a single function/atom, or sometimes a group
of related functions.  It should make the code easier to work on.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

i965: Turn brw_get_line_width_float() into brw_get_line_width().

Drop the old brw_get_line_width() helper which return the unsigned
fixed-point encoding of the line width - it's been dead since the
conversion to GENXML (which does the encoding for us).

Then rename brw_get_line_width_float() to the shorter name.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>

i965: Drop INTEL_DEBUG=stats.

For whatever reason, we had an INTEL_DEBUG=stats option that enabled
various statistics counters on Gen4-5 systems.  It's been around
forever, though I can't think of a single time that it's been useful.

On Gen6+, we enable statistics all the time because they're necessary
to support various query object targets.  Turning them off would break
those queries.

Gen4-5 don't support those queries, so the statistics counters generally
aren't useful; we disabled them by default.  This patch disables them
altogether.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

i965: Disable ARB_pipeline_statistics_query on Gen4-5.

We apparently enabled this on all platforms in Mesa 10.6.  However, it
was only ever implemented for Gen6+.  The Gen4-5 query code goes up in
flames with an "Unrecognized query target" unreachable() error if you
even attempt to use any of the new functionality.

This wasn't caught because the Piglit tests require OpenGL 3.0, which
Gen4-5 cannot support.  The extension spec does say 3.0 is required,
though I'm not sure why - it seems like 2.1 would work fine.

We could implement it anyway, but it's a little bit of a pain due to the
lack of hardware contexts (so we have to snapshot around batches).

Given that it's been 100% broken for two years and I haven't seen a bug
report about it, I'm not terribly inclined to care.  So, let it go.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

radeonsi: add new vega10 pci ids

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Cc: 17.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

st/mesa: move the logic of all_varyings_in_vbos into st_update_array

The function was pretty slow. This brings a substantial decrease in draw
call overhead when min/max index bounds are not needed:

Before:  DrawElements (1 VBO) w/ no state change:          5.75 million
After:   DrawElements (1 VBO) w/ no state change:          7.03 million

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: unify common code in st_draw_vbo functions

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: make st_draw_vbo static

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove upload code for zero-stride vertex attribs

st/mesa takes care of it now.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: upload zero-stride vertex attributes here

This is the best place to do it. Now drivers without u_vbuf don't have to
do it.

v2: use correct upload size and optimal alignment

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX

The next patch will use it. This is really for svga and GL2-level drivers.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: simplify the signature of get_client_array

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: remove vpv->num_inputs dereferences in st_update_array

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: fold error handling into setup_(non_)interleaved_attribs

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: fold cso calls into setup_(non_)interleaved_attribs

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: don't call util_draw_init_info in st_draw_vbo

gallium: remove pipe_index_buffer and set_index_buffer

pipe_draw_info::indexed is replaced with index_size. index_size == 0 means
non-indexed.

Instead of pipe_index_buffer::offset, pipe_draw_info::start is used.
For indexed indirect draws, pipe_draw_info::start is added to the indirect
start. This is the only case when "start" affects indirect draws.

pipe_draw_info::index is a union. Use either index::resource or
index::user depending on the value of pipe_draw_info::has_user_indices.

v2: fixes for nine, svga

gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytes

For faster initialization of non-indirect draws.

gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytes

docs: add news item and link release notes for 17.1.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

docs: add sha256 checksums for 17.1.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 806f802e7b6a898a4f8c47bc56b97579a86a873e)

docs: Update 17.1.0 release notes

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit 15a38605fc3aa49c01943f9ec2be19d58fef4aac)

st/glsl_to_tgsi: make sure resource file for samplers is PROGRAM_SAMPLER

Similar to how image resources are handled. That way we are sure
that inst->resource.file is PROGRAM_SAMPLER for "bound" samplers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: silent a compiler warning

This fixes:

si_shader.c: In function ‘si_shader_dump_stats’:
si_shader.c:6704:31: warning: passing argument 1 of ‘si_get_max_workgroup_size’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers]
     si_get_max_workgroup_size(shader);
                               ^~~~~~
si_shader.c:5832:17: note: expected ‘struct si_shader *’ but argument is of type ‘const struct si_shader *’
 static unsigned si_get_max_workgroup_size(struct si_shader *shader)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: use u_bit_scan() in update_program_texture_state()

The check in update_single_program_texture() can also be
removed.

v2: - remove unused 's' variable

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

mesa: remove never used gl_shader_compiler_options::EmitNoFunctions

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Elie Tournier <elie.tournier@collabora.com>

radeonsi: dump compute descriptor lists

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: dump both enabled and required descriptor slots

This allows a meaningful dump with info == NULL (for compute shaders).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: dump compute shader as part of debug dump

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: move struct si_compute into a header

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: split descriptor list dumping

Prepare for dumping CS descriptor list.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: split shader dumping

Prepare for dumping compute shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: more const qualifiers in shader dump functions

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ddebug: implement dd_dump_launch_grid

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

ddebug: extract dd_dump_shader

Will be re-used for compute shaders.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/util: dump tokens in util_dump_shader_state only if type is TGSI

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

gallium/util: add util_dump_grid_info

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radv: always free nir shaders from modules on stack

valgrind reports them as leaked, and I could not find anything making a
copy of the nir pointer. Also, radv_device_init_meta_blit_color() is
already freeing them unconditionally like this.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

anv: don't leak DRM devices

After successful drmGetDevices2() call, drmFreeDevices() needs to be
called.

Fixes: b1fb6e8d "anv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> # radv version

anv: fix possible stack corruption

drmGetDevices2 takes count and not size. Probably hasn't caused problems
yet in practice and was missed as setups with more than 8 DRM devices
are not very common.

Fixes: b1fb6e8d "anv: do not open random render node(s)"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

i965/vec4: Delete the system value infastructure

The only thing still using it is INVOCATION_ID for geometry shaders.
That's easily enough inlined into the nir_intrinsic_load_invocation_id
handling code.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Use NIR to do GS input remapping

We're already doing this in the FS back-end.  This just does the same
thing in the vec4 back-end.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Move remapping of gl_PointSize to the NIR level

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/nir: Inline remap_inputs_with_vue_map

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Use NIR remapping for VS attributes

The NIR pass already handles remapping system values to attributes for
us so we delete the system value code as part of the conversion.

We also change nir_lower_vs_inputs to take an explicit inputs_read
bitmask and pass in the inputs_read from prog_data instead from pulling
it out of NIR.  This is because the version in prog_data may get
EDGEFLAG added to it on some old platforms.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/compiler/vs: Move inputs_read handling to generic code

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vec4: Set VERT_BIT_EDGEFLAG based on the VUE map

We also add a nice little comment to make it more clear exactly what
happens with the edge flag copy.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/fs: Lower gl_VertexID and friends to inputs at the NIR level

NIR calls these system values but they come in from the VF unit as
vertex data.  It's terribly convenient to just be able to treat them as
such in the back-end.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/vs: Set uses_vertexid and friends from brw_compile_vs

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965: Move multiply by 4 for VS ATTR setup into the scalar backend.

The vec4 backend will want to count in units of vec4s, not scalar
components.  The simplest solution is to move the multiplication by 4
into the scalar backend.  This also improves consistency with how we
count varyings.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

i965/nir: Inline remap_vs_attrs

Now that we have nice block iterators, there's no good reason for this
to be off on it's own.  While we're here, we convert to using the NIR
const index getters/setters instead of whacking const_index values
directly.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

nir: Embed the shader_info in the nir_shader again

Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info
from being embedded into being just a pointer.  The idea was that
sharing the shader_info between NIR and GLSL would be easier if it were
a pointer pointing to the same shader_info struct.  This, however, has
caused a few problems:

 1) There are many things which generate NIR without GLSL.  This means
    we have to support both NIR shaders which come from GLSL and ones
    that don't and need to have an info elsewhere.

 2) The solution to (1) raises all sorts of ownership issues which have
    to be resolved with ralloc_parent checks.

 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been
    using nir_gather_info to fill out the final shader_info.  Thanks to
    cloning and the above ownership issues, the nir_shader::info may not
    point back to the gl_shader anymore and so we have to do a copy of
    the shader_info from NIR back to GLSL anyway.

All of these issues go away if we just embed the shader_info in the
nir_shader.  There's a little downside of having to copy it back after
calling nir_gather_info but, as explained above, we have to do that
anyway.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

mesa: Make _mesa_primitive_restart_index a static inline in the header.

It's now basically a single expression, so it probably makes sense to
have it inlined into the callers.

Suggested by Marek.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

freedreno: fix clang error in fd_get_compute_param

With commit 10c17f23b752 ("freedreno: core compute state support"),
Android builds fail with the following error:

external/mesa3d/src/gallium/drivers/freedreno/freedreno_screen.c:610:17: error: format string is not a string literal (potentially insecure) [-Werror,-Wformat-security]
                        sprintf(ret, ir);
                                     ^~

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

mesa/vbo: fix invalid min/max indexes

Fixes: c3f37e9b ("st/mesa: use min_index and max_index directly from vbo")
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

intel: compiler: prevent integer overflow

CID: 1399477, 1399478 (Integer handling issues)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

intel: compiler: remove duplicated code

CID: 1399470: (Control flow issues)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

intel: gen decoder: don't check for size_t negative values

We should get either 0 or 1 here.

CID: 1373562 (Control flow issues)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Matt Turner <mattst88@gmail.com>

bin/*py: honor editorconfig formatting

Replace the two stray tabs with respective space.

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

bin: use tabs for coding style on *.sh files

v2: Instead of changing *.sh, adapt the editorconfig file (Emil).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

android: i965: add per-gen libmesa_i965_gen{4,45,5} static

Needed to fix android building errors:

external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:148: error: undefined reference to 'gen5_init_atoms'
external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:150: error: undefined reference to 'gen45_init_atoms'
external/mesa/src/mesa/drivers/dri/i965/brw_state_upload.c:152: error: undefined reference to 'gen4_init_atoms'
clang++: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: 5a19d0b ("i965: Get real per-gen atom lists")
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

swr: fix polygonmode for front==back

Rasterizer core only supports polygonmode front==back.  Add logic for
populating fillMode for the rasterizer only for that case correctly.
Provide enum conversion between mesa enums and core enums.

The core renders lines/points as tris. Previously, code would enable
stipple for polygonmode != FILL.  Modify stipple enable logic so that
this works correctly.

No regressions in vtk tests.
Fixes the following piglit tests:
pointsprite
gl-1.0-edgeflag-const

v2: remove cc stable, and remove "not implemented" assert
v3: modified commit message

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

swr/rast: support polygonmode point

Add support for polygonmode point in the binner.  This is done by
splitting BinPostSetupPoints from BinPoints, so the earlier call can be
called from BinTriangles.  Setup has already been done at the time
BinPostSetupPoints needs to be called.

This checkin just adds support in the rasterizer.  A separate checkin
will add the appropriate driver support.

v2: remove cc stable
v3: modified commit message and subject line

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

util: move ALWAYS_INLINE macro to util/macro.h

Also added clang check.

macro.h is include by p_compiler.h so no other change is needed.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

swr: move msaa resolve to generalized StoreTile

v3: list piglit tests fixed by this patch. Fixed typo Tim pointed out.
v2: Reword commit message to more closely adhere to community
guidelines.

This patch moves msaa resolve down into core/StoreTiles where the
surface format conversion routines are available.  The previous
"experimental" resolve was limited to 8-bit unsigned render targets.

This fixes a number of piglit msaa tests by adding resolve support for
all the render target formats we support.

Specifically:
layered-rendering/gl-layer-render: fail->pass
layered-rendering/gl-layer-render-storage: fail->pass
multisample-formats *[2,4,8,16] gl_arb_texture_rg: crash->pass
multisample-formats *[2,4,8,16] gl_ext_texture_snorm: crash->pass
multisample-formats *[2,4,8,16] gl_arb_texture_float: fail->pass
multisample-formats *[2,4,8,16] gl_arb_texture_rg-float: fail->pass

MSAA is still disabled by default, but can be enabled with
"export SWR_MSAA_MAX_COUNT=4" (1,2,4,8,16 are options)
The default is 0, which is disabled.

This patch improves the number of multisample-formats supported by swr,
and fixes several crashes currently in the 17.1 branch.  Therefore, it
should be considered for inclusion in the 17.1 stable release.  Being
disabled by default, it poses no risk to most users of swr.

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
cc: mesa-stable@lists.freedesktop.org

glsl: Don't allow redefining builtin functions on GLSL 1.00.

The spec text cited above says you can't, but only the GLSL 3.00 (redefine
or overload) case was implemented.

Fixes dEQP scoping.invalid.redefine_builtin_fragment/vertex.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Matt Turner <mattst88@gmail.com>

glsl: Restrict func redeclarations (not just redefinitions) on GLSL 1.00.

Fixes DEQP's scoping.invalid.redeclare_function_fragment/vertex.

v2: Fix accidental rejection of prototype+decl.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Tested-by: Matt Turner <mattst88@gmail.com>

glsl: Ban #undefining __LINE__ and friends on GLES2.

Fixes deqp_gles2 undefine_invalid_object_* failures.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Matt Turner <mattst88@gmail.com>

glsl: Restrict functions to not return arrays or SOAs in GLSL 1.00.

From the spec,

    Arrays are allowed as arguments, but not as the return type. [...] The
    return type can also be a structure if the structure does not contain
    an array.

Fixes DEQP shaders.functions.invalid.return_array_in_struct_fragment.

v2: Spec cite wording change

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Matt Turner <mattst88@gmail.com>

nir: fix (hopefully) windows build

Fixes: 53aa109b ("nir: add pass to lower atomic counters to SSBO")
Signed-off-by: Rob Clark <robdclark@gmail.com>

radeonsi: rename si_eliminate_const_vs_outputs -> si_optimize_vs_outputs

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

ac: fix broken elimination of duplicated VS exports

The renumbering code didn't take into account that multiple VS exports
can have the same PARAM index. This also significantly simplifies
the renumbering. Thankfully, we have piglits for this:

    spec@arb_gpu_shader5@arb_gpu_shader5-interpolateatcentroid-packing
    spec@glsl-1.50@execution@interface-blocks-complex-vs-fs

Reported by Michel Dänzer.

Fixes: b08715499e61 ("ac: eliminate duplicated VS exports")
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

egl: Fix -Wint-to-pointer-cast

main/egldisplay.c: In function '_eglParseX11DisplayAttribList':
main/egldisplay.c:491:38: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
          display->Options.Platform = (void *)value;

The fix: cast to uinptr_t before void*.
                                      ^
Fixes: ddb99127 egl/x11: Honor the EGL_PLATFORM_X11_SCREEN_EXT attribute
Cc: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

st/mesa: remove unused st parameter in init_velement_lowered

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: use PIPE_MAX_ATTRIBS as the max number of vertex buffers

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: simplify code due to unification to st_common_program

v2: use the st_common_program() helper

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: simplify update_constants functions

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: unify TCS, TES, GS st_*_program structures

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: decrease the size of remaining st_translate_program array params

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: remove unused outputSlotToAttr

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: remove st_context::vertex_result_to_slot

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: decrease the size of st_vertex_program

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>

st/mesa: remove struct st_tracked_state

It contains only one member: the update function. Let's use the update
function directly.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: split per-patch from per-vertex indices

Make it a bit clearer that the index spaces are logically seperate by
having them defined in different functions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: clarify documentation of existing SI workaround

Limiting LS-HS to a single wave is required on all SI chips due to an
issue with a power management feature.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: fix gl_PrimitiveID in tessellation with instanced draws on SI

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: load patch_id for TES-as-ES when exporting for PS

For some reason, this change is only necessary on SI.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radeonsi: fix primitive ID in fragment shader when using tessellation

In a VS->TCS->TES->PS pipeline, the primitive ID is read from TES exports,
so it is as if TES were using the primitive ID.

Specifically, this fixes a bug where the primitive ID is not reset at
the start of a new instance.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>