Marius Predut [Thu, 23 Apr 2015 15:41:14 +0000 (18:41 +0300)]
i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6
On SNB and IVB hw, for 1 pixel line thickness or less,
the general anti-aliasing algorithm give up - garbage line is generated.
Setting a Line Width of 0.0 specifies the rasterization of
the “thinnest” (one-pixel-wide), non-antialiased lines.
Lines rendered with zero Line Width are rasterized using
Grid Intersection Quantization rules as specified
by bspec section 6.3.12.1 Zero-Width (Cosmetic) Line Rasterization.
v2: Daniel Stone: Fix = used instead of == in an if-statement.
v3: Ian Romanick: Use "._Enabled" flag insteed ".Enabled".
Add code comments. re-word wrap the commit message.
Add a complete bugzillia list.
Improve the hardcoded values to produce better results.
v4: Matt Turner: typo fixes and adjust <= 1.49 to become < 1.5
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=28832
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=9951
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27007
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60797
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=15006
Acked-by: Chris Forbes <chrisf@ijw.co.nz>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Marius Predut <marius.predut@intel.com>
Matt Turner [Tue, 21 Apr 2015 21:45:19 +0000 (14:45 -0700)]
i965: Remove end-of-thread SEND alignment code.
This was present in Eric's initial implementation of the compaction code
for Sandybridge (commit
077d01b6). There is no documentation saying this
is necessary, and removing it causes no regressions in piglit on any
platform.
Boyan Ding [Wed, 25 Mar 2015 11:36:54 +0000 (19:36 +0800)]
i965: Add XRGB8888 format to intel_screen_make_configs
Some application, such as drm backend of weston, uses XRGB8888 config as
default. i965 doesn't provide this format, but before commit
65c8965d,
the drm platform of EGL takes ARGB8888 as XRGB8888. Now that commit
65c8965d makes EGL recognize format correctly so weston won't start
because it can't find XRGB8888. Add XRGB8888 format to i965 just as
other drivers do.
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89689
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Emil Velikov [Tue, 5 May 2015 13:39:08 +0000 (14:39 +0100)]
nir: add nir_array.h to the sources list
Otherwise `make distcheck' will fail.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Samuel Iglesias Gonsalvez [Mon, 9 Feb 2015 09:36:36 +0000 (10:36 +0100)]
glsl: don't lower fragdata array if the output data types don't match
Commit
7e414b58640aee6e243d337e72cea290c354f632 broke the gl_FragData array
into separate gl_FragData[i] variables, so drivers can eliminate useless
writes to gl_FragData improving their performance.
The problem occurs when GLSL IR code is linked in the following case:
* The FS output variable base data type does not match gl_FragData one (float
vector)
* The FS output variable is replaced by gl_out_FragDataX because of commit
7e414b58640aee6 with X from 0 to GL_MAX_DRAW_BUFFERS.
Then the FS output variable base data type is lost in the resulting GLSL IR,
making that the driver does a wrong assignment to gl_out_FragData components
because of unmatching data types.
This patch reverts the fragdata array lowering when the output var base data type
doesn't match gl_out_FragData, i.e., when output variable base data type is
not a float or a float vector.
This patch fixes 250 dEQP tests (tested in an Intel Haswell machine)
dEQP-GLES3.functional.fragment_out.random.* (22 failed tests)
dEQP-GLES3.functional.fragment_out.array.uint.* (120 failed tests)
dEQP-GLES3.functional.fragment_out.array.int.* (108 failed tests)
Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Neil Roberts [Thu, 19 Feb 2015 19:33:43 +0000 (19:33 +0000)]
i965/skl: Align compressed textures to four times the block size
On Skylake it is possible to choose your own alignment values for
compressed textures but they are expressed as a multiple of the block
size. The minimum alignment value we can use is 4 so we effectively
have to align to 4 times the block size. This patch makes it initially
set mt->align_[wh] to the large alignment value and then later divides
it by the block size so that it can be uploaded as part of the surface
state.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Dave Airlie [Mon, 4 May 2015 23:10:34 +0000 (09:10 +1000)]
egl: image_dma_buf_export - use KHR 64-bit type
After talking to Jon Leech he suggested this should be fine.
update spec to the version in the registry.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Ian Romanick [Wed, 29 Apr 2015 20:15:06 +0000 (13:15 -0700)]
glapi/es3.1: Add support for GLES versions > 3.0
Make the checks in the Python script and the generated code more generic
to support arbitrary GLES versions >= 2.0.
The updated dispatch_sanity.cpp test discovered this problem. Without
this, the next patch would erroneously enable GLES 3.1 functions in GLES
2.0 and GLES 3.0.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Tue, 28 Apr 2015 22:12:58 +0000 (15:12 -0700)]
glsl/es3.1: Allow misc ARB_gpu_shader5 built-ins in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Ian Romanick [Tue, 28 Apr 2015 22:00:22 +0000 (15:00 -0700)]
glsl/es3.1: Allow textureGather and textureGatherOffset in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 21:38:13 +0000 (14:38 -0700)]
glsl/es3.1: Allow enhnaced packing functions in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 19:50:51 +0000 (12:50 -0700)]
glsl/es3.1: Allow interger mix built-ins in GLSL ES 3.10
v2: Add missing lexer support. Noticed by Tapani.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> [v1]
Ian Romanick [Tue, 28 Apr 2015 19:46:46 +0000 (12:46 -0700)]
glsl/es3.1: Allow separate shader objects in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 19:38:46 +0000 (12:38 -0700)]
glsl/es3.1: Allow explicit uniform locations in GLSL ES 3.10
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 19:13:21 +0000 (12:13 -0700)]
glsl/es3.1: Allow 3.10 ES shaders in a GLES 3.1 context
Currently no 3.10 ES features (beyond 3.00 ES) are enabled. That will
come later.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:58:56 +0000 (11:58 -0700)]
mesa/es3.1: Add _mesa_is_gles31 helper
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Wed, 29 Apr 2015 01:01:00 +0000 (18:01 -0700)]
docs/GL3: Update GLES 3.1 dependencies
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 20:15:46 +0000 (13:15 -0700)]
glsl: Add glsl_parser_state::has_atomic_counters helper
v2: Change GL version from 400 to 420. Noticed by Tapani and Ilia.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:57:39 +0000 (11:57 -0700)]
mesa: Use bool in _mesa_is_ helpers instead of GLboolean
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:26:33 +0000 (11:26 -0700)]
mesa: Trivial coding standards cleanups
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Tue, 28 Apr 2015 18:18:42 +0000 (11:18 -0700)]
mesa: Use bool instead of GLboolean
v2: Squash in whitespace fixes.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Ian Romanick [Tue, 21 Apr 2015 23:58:59 +0000 (08:58 +0900)]
glsl: Silence unused parameter warnings
I opted to comment out "last_field" because it was not obvious what the
meaning of the dangling bool would be. For the other parameters, the
meaning was more intuitive without the name.
link_uniform_blocks.cpp:70:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void enter_record(const glsl_type *type, const char *name,
^
link_uniform_blocks.cpp:77:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void leave_record(const glsl_type *type, const char *name,
^
link_uniform_blocks.cpp:93:62: warning: unused parameter 'record_type' [-Wunused-parameter]
bool row_major, const glsl_type *record_type,
^
link_uniform_blocks.cpp:94:34: warning: unused parameter 'last_field' [-Wunused-parameter]
bool last_field)
^
link_uniforms.cpp:547:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void enter_record(const glsl_type *type, const char *name,
^
link_uniforms.cpp:556:65: warning: unused parameter 'name' [-Wunused-parameter]
virtual void leave_record(const glsl_type *type, const char *name,
^
link_uniforms.cpp:567:34: warning: unused parameter 'last_field' [-Wunused-parameter]
bool last_field)
^
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Dylan Baker <baker.dylan.c@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Ian Romanick [Wed, 29 Apr 2015 18:53:18 +0000 (11:53 -0700)]
mesa: Restore functionality to dispatch sanity test
Along with a couple secondary goals, the dispatch sanity test had two
major, primary goals.
1. Ensure that all functions part of an API version are set in the
dispatch table.
2. Ensure that functions that cannot be part of an API version are not
set in the dispatch table.
Commit
4bdbb58 removed the tests ability to fulfill either of its
primary goals by removing anything that used _mesa_generic_nop(). It
seems like the problem on Windows could have been resolved by adding the
NULL context pointer check from nop_handler to _mesa_generic_nop().
There is, however, some debugging benefit to actually getting the
(supposed) function name logged in the "unsupported function called"
message.
The preceding commit added a function, _glapi_new_nop_table, that
allocates a table of per-entry point no-op functions. Restore the
ability to actually validate the sanity of the dispatch table by using
_glapi_new_nop_table.
Previous to this commit removing a function from one of the
*_functions_possible lists would not cause the test to fail. With this
commit removing such a function will result in failure, as is expected.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Francisco Jerez [Thu, 19 Feb 2015 12:49:10 +0000 (14:49 +0200)]
i965: Fix variable indexing of sampler arrays under non-uniform control flow.
ARB_gpu_shader5 requires sampler array indexing expressions to be
dynamically uniform, this however doesn't have any implications on the
control flow that leads to the evaluation of that expression being
uniform. Use emit_uniformize() to obtain an arbitrary live value from
the binding table index calculation instead of assuming that the first
channel is always live.
Fixes the following Piglit test cases:
arb_gpu_shader5/execution/sampler_array_indexing/fs-nonuniform-control-flow.shader_test
arb_gpu_shader5/execution/sampler_array_indexing/vs-nonuniform-control-flow.shader_test
part of the series:
http://lists.freedesktop.org/archives/piglit/2015-February/014615.html
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Thu, 19 Feb 2015 12:48:29 +0000 (14:48 +0200)]
i965: Fix variable indexing of UBO arrays under non-uniform control flow.
ARB_gpu_shader5 requires UBO array indexing expressions to be
dynamically uniform, this however doesn't have any implications on the
control flow that leads to the evaluation of that expression being
uniform. Use emit_uniformize() to obtain an arbitrary live value from
the binding table index calculation instead of assuming that the first
channel is always live.
Fixes the following Piglit tests:
arb_gpu_shader5/execution/ubo_array_indexing/fs-nonuniform-control-flow.shader_test
arb_gpu_shader5/execution/ubo_array_indexing/vs-nonuniform-control-flow.shader_test
part of the series:
http://lists.freedesktop.org/archives/piglit/2015-February/014616.html
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Fri, 20 Mar 2015 12:16:09 +0000 (14:16 +0200)]
i965: Define helper function to copy an arbitrary live component from some register.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Fri, 20 Feb 2015 18:25:04 +0000 (20:25 +0200)]
i965: Perform basic optimizations on the FIND_LIVE_CHANNEL opcode.
v2: Save some CPU cycles by doing 'return progress' rather than
'depth++' in the discard jump special case.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 23 Apr 2015 11:42:53 +0000 (14:42 +0300)]
i965: Introduce the FIND_LIVE_CHANNEL pseudo-opcode.
This instruction calculates the index of an arbitrary channel enabled
in the current execution mask. It's expected to be used as input for
the BROADCAST opcode, but it's implemented as a separate instruction
rather than being baked into BROADCAST because FIND_LIVE_CHANNEL has
no dependencies so it can always be CSE'ed with other instances of the
same instruction within a basic block.
v2: Whitespace fixes.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Thu, 19 Feb 2015 12:52:24 +0000 (14:52 +0200)]
i965: Perform basic optimizations on the BROADCAST opcode.
v2: Style fixes.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Fri, 20 Feb 2015 18:14:24 +0000 (20:14 +0200)]
i965: Introduce the BROADCAST pseudo-opcode.
The BROADCAST instruction picks the channel from its first source
given by an index passed in as second source. This will be used in
situations where all channels from the same SIMD thread have to agree
on the value of something, e.g. a surface binding table index.
This is in particular the case for UBO, sampler and image arrays,
which can be indexed dynamically with the restriction that all active
SIMD channels access the same index, provided to the shared unit as
part of a single scalar field of the message descriptor. Simply
taking the index value from the first channel as we were doing until
now is incorrect, because it might contain an uninitialized value if
the channel had previously been disabled by non-uniform control flow.
v2: Minor style fixes. Improve commit message.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Wed, 28 Jan 2015 15:42:37 +0000 (17:42 +0200)]
glsl: Keep track of the early_fragment_tests flag in gl_shader.
And rename _mesa_glsl_parse_state::early_fragment_tests to
fs_early_fragment_tests for consistency with other FS-specific flags in the
same struct.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Thu, 4 Dec 2014 08:54:13 +0000 (10:54 +0200)]
glsl: Error out on invalid uses of the early_fragment_tests layout qualifier.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Sat, 31 Jan 2015 20:07:47 +0000 (22:07 +0200)]
glsl: Forbid use of image qualifiers in declarations of type other than image.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Sat, 31 Jan 2015 20:01:35 +0000 (22:01 +0200)]
glsl: Split off memory qualifiers from storage qualifiers.
Image memory qualifiers (coherent, volatile, restrict, readonly and writeonly)
follow slightly different rules from storage qualifiers, e.g. the uniqueness
rule doesn't apply. Make them a separate non-terminal.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Thu, 4 Dec 2014 08:42:11 +0000 (10:42 +0200)]
glsl: Forbid opaque variables as operands of the ternary operator.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Wed, 21 Jan 2015 14:47:02 +0000 (16:47 +0200)]
mesa: Update image unit state when glBindImageTexture is called with texture=0.
There's no indication in the spec that the image unit state other than the
bound texture object shouldn't be updated when glBindImageTexture() is called
passing the zero texture as argument. It's very unlikely that any application
would ever have relied on this, but it's easy to get right, and it fixes the
"state" ARB_shader_image_load_store piglit test.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Sat, 31 Jan 2015 15:00:19 +0000 (17:00 +0200)]
mesa: Initialize image units to default state on context creation.
This is the required initial image unit state according to "Table 23.45. Image
State (state per image unit)" of the OpenGL 4.3 specification.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Tue, 20 Jan 2015 15:50:15 +0000 (17:50 +0200)]
mesa: Implement image uniform queries.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Tue, 20 Jan 2015 14:12:18 +0000 (16:12 +0200)]
mesa: Validate original image internal format rather than derived mesa format.
This matches what _mesa_BindImageTextures() does. The derived image format
(gl_texture_image::TexFormat) isn't necessarily equivalent to the internal
format of the texture image. If a forbidden internal format has been
specified we need to mark the image unit as invalid as required by the spec,
regardless of the derived format. Fixes the "invalid"
ARB_shader_image_load_store piglit test.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Tue, 20 Jan 2015 12:42:48 +0000 (14:42 +0200)]
mesa: Call _mesa_test_texobj_completeness() before using _MaxLevel in image validation.
gl_texture_object::_MaxLevel doesn't have any meaningful value until
_mesa_test_texobj_completeness() has been run. Fixes the "level"
ARB_shader_image_load_store piglit test.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Fri, 14 Nov 2014 18:31:13 +0000 (20:31 +0200)]
mesa: Add support for binding a buffer texture to a shader image unit.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Wed, 12 Nov 2014 01:47:13 +0000 (03:47 +0200)]
mesa: Add extern "C" guards to shaderimage.h to allow inclusion from C++ code.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Francisco Jerez [Tue, 18 Nov 2014 12:14:46 +0000 (14:14 +0200)]
mesa: Export shader image format to mesa format conversion function.
This function will be useful for back-ends to translate an image internal
format as specified in GLSL code into a mesa format.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Iago Toral Quiroga [Mon, 4 May 2015 07:58:36 +0000 (09:58 +0200)]
swrast: Fix rgba_draw_pixels with GL_COLOR_INDEX
When we implemented the format conversion rewrite we forgot to handle
GL_COLOR_INDEX here, which needs special handling.
Fixes the following piglit test:
bin/gl-1.0-drawpixels-color-index -auto -fbo
Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90213
Tested-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Francisco Jerez [Thu, 23 Apr 2015 11:30:28 +0000 (14:30 +0300)]
i965: Add memory fence opcode.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Francisco Jerez [Thu, 23 Apr 2015 11:28:25 +0000 (14:28 +0300)]
i965: Add typed surface access opcodes.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Francisco Jerez [Thu, 23 Apr 2015 11:24:14 +0000 (14:24 +0300)]
i965: Add untyped surface write opcode.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 19 Mar 2015 13:12:01 +0000 (15:12 +0200)]
i965: Reorder sources of the untyped atomic opcode.
This is consistent with the untyped surface read opcode. From now on
all typed and untyped surface access opcodes will follow the same
pattern: src[0] will be the message payload, src[1] will be the
surface index and src[2] will be a control immediate (atomic operation
for atomic opcodes and number of vector components for surface read
and write opcodes).
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 19 Mar 2015 13:11:28 +0000 (15:11 +0200)]
i965: Pass the number of components as a source of the untyped surface read opcode.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 26 Feb 2015 15:42:47 +0000 (17:42 +0200)]
i965/vec4: Add support for untyped surface message sends from GRF.
This doesn't actually enable untyped surface message sends from GRF
yet, the upcoming atomic counter and image intrinsic lowering code
will.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 26 Feb 2015 15:41:46 +0000 (17:41 +0200)]
i965: Don't request untyped atomic writeback message if the destination is null.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 22 Apr 2015 18:10:43 +0000 (21:10 +0300)]
i965: Simplify generator code for untyped surface messages.
The generate_untyped_*() methods do nothing useful other than calling
the corresponding function from brw_eu_emit.c. The calls to
brw_mark_surface_used() will go away too in a future commit.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 23 Apr 2015 11:21:31 +0000 (14:21 +0300)]
i965: Fix the untyped surface opcodes to deal with indirect surface access.
Change brw_untyped_atomic() and brw_untyped_surface_read() to take the
surface index as a register instead of a constant and to use
brw_send_indirect_message() to emit the indirect variant of send with
a dynamically calculated message descriptor. This will be required to
support variable indexing of image arrays for
ARB_shader_image_load_store.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Chia-I Wu [Sat, 2 May 2015 07:33:27 +0000 (15:33 +0800)]
ilo: use ilo_image exclusively in core
Initialize ilo_view_surface and ilo_zs_surface from ilo_image instead of
ilo_texture.
Chia-I Wu [Sat, 2 May 2015 07:36:59 +0000 (15:36 +0800)]
ilo: add ilo_image_can_enable_aux()
It replaces ilo_texture_can_enable_hiz().
Chia-I Wu [Sat, 2 May 2015 07:06:36 +0000 (15:06 +0800)]
ilo: make ilo_image more self-contained
Add depth0, sample_count, and scanout to ilo_image.
Chia-I Wu [Sat, 2 May 2015 06:14:15 +0000 (14:14 +0800)]
ilo: add ilo_image_init_for_imported()
It replaces ilo_image_update_for_imported_bo() and enables more error
checkings for imported textures.
Chia-I Wu [Sat, 2 May 2015 06:25:17 +0000 (14:25 +0800)]
ilo: prepare for image init for imported bo
Refactoring in prepraration for ilo_image_init_for_imported().
Chia-I Wu [Sat, 2 May 2015 06:24:04 +0000 (14:24 +0800)]
ilo: constify ilo_image_params
Make ilo_image_params const in functions that do not modify it.
Chia-I Wu [Sat, 2 May 2015 04:04:26 +0000 (12:04 +0800)]
ilo: improve readability of ilo_image
Improve docs, rename struct fields, and reorder walk types. No real changes.
Chia-I Wu [Fri, 1 May 2015 07:33:56 +0000 (15:33 +0800)]
ilo: move command builder to core
Chia-I Wu [Fri, 1 May 2015 03:47:13 +0000 (11:47 +0800)]
ilo: move ilo_state_3d* to core
ilo state structs (struct ilo_xxx_state) are moved as well.
Chia-I Wu [Fri, 1 May 2015 07:07:13 +0000 (15:07 +0800)]
ilo: add ilo_buffer.h to core
Rename the original ilo_buffer to ilo_buffer_resource to avoid name conflict.
Chia-I Wu [Wed, 25 Mar 2015 04:22:40 +0000 (12:22 +0800)]
ilo: move BOs from ilo_texture to ilo_image
We want to work with ilo_image instead of ilo_texture in core.
Chia-I Wu [Sun, 8 Mar 2015 05:39:02 +0000 (13:39 +0800)]
ilo: move ilo_layout.[ch] to core as ilo_image.[ch]
Move files and s/layout/image/.
Chia-I Wu [Wed, 25 Mar 2015 02:18:46 +0000 (10:18 +0800)]
ilo: add ilo_format.[ch] to core
The original ilo_format.[ch] are removed.
Chia-I Wu [Sat, 7 Mar 2015 05:31:52 +0000 (13:31 +0800)]
ilo: add ilo_fence.h to core
Implement pipe_fence_handle on top of ilo_fence.
Chia-I Wu [Sat, 7 Mar 2015 20:45:16 +0000 (04:45 +0800)]
ilo: add ilo_dev_init() to core
Move init_dev() from ilo_screen.c to core.
Chia-I Wu [Sat, 7 Mar 2015 20:37:02 +0000 (04:37 +0800)]
ilo: rename ilo_dev_info to ilo_dev
With intel_winsys being embedded in it, drop the "_info" suffix.
Chia-I Wu [Sat, 7 Mar 2015 20:33:49 +0000 (04:33 +0800)]
ilo: move intel_winsys to ilo_dev_info
We want to use ilo_dev_info instead of ilo_screen in core.
Chia-I Wu [Sat, 7 Mar 2015 20:22:19 +0000 (04:22 +0800)]
ilo: add ilo_dev.h to core
Move what are remaining in ilo_common.h (that is, ilo_dev_*) to ilo_dev.h.
Chia-I Wu [Sat, 7 Mar 2015 20:18:14 +0000 (04:18 +0800)]
ilo: add ilo_debug.[ch] to core
They consist of the debug helpers that used to live in ilo_common.h and
ilo_screen.c.
Chia-I Wu [Sat, 7 Mar 2015 20:16:34 +0000 (04:16 +0800)]
ilo: add ilo_core.h to core
ilo_core.h includes the common gallium headers that were included in
ilo_common.h.
Chia-I Wu [Sat, 7 Mar 2015 20:26:45 +0000 (04:26 +0800)]
ilo: move intel_winsys.h to core
Add a new subdirectory and start moving files that do not depend on
ilo_screen/ilo_context to it.
Jordan Justen [Wed, 27 Aug 2014 18:10:35 +0000 (11:10 -0700)]
i965: Upload atomic buffer state for compute shaders
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 28 Aug 2014 07:48:16 +0000 (00:48 -0700)]
i965/cs: Emit MEDIA_STATE_FLUSH after WALKER
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 28 Aug 2014 21:47:19 +0000 (14:47 -0700)]
i965/cs: Implement brw_emit_gpgpu_walker
Tested on Ivybridge, Haswell and Broadwell.
v2:
* Use SET_FIELD. (Ken)
* Use simd_size / 16 to support SIMD8/16/32. Ken suggested
that we might be able to do it arithmetically rather than just
supporting SIMD8 and SIMD16 with a conditional.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Wed, 22 Apr 2015 18:43:50 +0000 (11:43 -0700)]
i965/state: Emit pipeline select when changing pipelines
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Fri, 10 Jan 2014 03:43:18 +0000 (19:43 -0800)]
i965: Implement DispatchCompute() back-end
brw_emit_gpgpu_walker will be implemented in a subsequent patch.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Fri, 10 Jan 2014 03:21:41 +0000 (19:21 -0800)]
main/cs: Implement front end code for glDispatchCompute().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Fri, 10 Jan 2014 02:54:35 +0000 (18:54 -0800)]
mesa/cs: Add DispatchCompute() to driver function table.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 12 Mar 2015 05:51:00 +0000 (22:51 -0700)]
i965/cs: Emit state base address
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 16 Apr 2015 01:27:50 +0000 (18:27 -0700)]
i965/fs: Add CS shader time support
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 28 Aug 2014 22:35:57 +0000 (15:35 -0700)]
i965/cs: Upload brw_cs_state
v3:
* Add defines. Misc cleanup suggestions. (Ken)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 14 Mar 2015 19:55:54 +0000 (12:55 -0700)]
i965/cs: Support CS program precompile
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Tue, 21 Apr 2015 07:31:12 +0000 (00:31 -0700)]
i965: Add brw_setup_tex_for_precompile. Use in VS, GS & FS.
Suggested-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Thu, 28 Aug 2014 22:27:22 +0000 (15:27 -0700)]
i965/cs: Emit compute shader code and upload programs
v2:
* Don't bother checking for 'gen > 5' (krh)
* Populate sampler data in key (krh)
v3:
* Drop no8 support, and simplify code in several places (Ken)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Wed, 29 Apr 2015 17:54:17 +0000 (10:54 -0700)]
i965/cs: Set invocation counts based on max_cs_threads
For ES, we set the max counts based on SIMD8, which is currently
accurate.
For desktop GL, we set the max counts based on SIMD16, which can fail
in some cases where a SIMD16 program is not currently supported.
Therefore, this value is not currently accurate, but will work fine in
many cases, and lets us run more test cases. Eventually we want to
always be able to generate a SIMD16 program.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Fri, 13 Mar 2015 23:42:40 +0000 (16:42 -0700)]
i965/cs: Add max_cs_threads
Add values for gen7 & gen8. These are the number threads in a
subslice.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Mon, 13 Apr 2015 19:25:39 +0000 (12:25 -0700)]
i965: Remove comment about chv device numbers being preliminary
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 31 Aug 2014 02:57:39 +0000 (19:57 -0700)]
i965/fs: Support compute programs in fs_visitor
v2:
* Clean out some unneeded code copied from run_fs (krh)
* Always use NIR
* Split shader time out into a separate commit
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 15 Mar 2015 00:06:26 +0000 (17:06 -0700)]
i965/cache: Add support for CS in program state cache
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 11 Jan 2014 05:39:25 +0000 (21:39 -0800)]
i965/cs: Add brw_cs_prog_data, brw_cs_prog_key and brw_context::cs.
jordan.l.justen@intel.com:
* Added brw_cs_prog_key structure
* Added brw_cs_prog_data::dispatch_grf_start_reg_16
* Added brw_cs_prog_data::local_size
* Added brw_cs_prog_data::simd_size
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Wed, 27 Aug 2014 18:33:25 +0000 (11:33 -0700)]
i965/cs: Add generator support for CS_OPCODE_CS_TERMINATE
v2:
* Don't rely on brw_eu* to generate the send instruction. We now
generate the send here, and drop the "i965/cs: Add support for the
SEND message that terminates a CS thread" brw_eu* patch.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sat, 27 Sep 2014 18:15:28 +0000 (11:15 -0700)]
i965/cs: Mark g0 as used by CS_OPCODE_CS_TERMINATE
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 12 Apr 2015 09:06:57 +0000 (02:06 -0700)]
i965/fs: Add emit_cs_terminate to emit CS_OPCODE_CS_TERMINATE
v2:
* Do more work at the visitor level. g0 is loaded and sent to the
generator now.
v3:
* Use Ken's comment explaining g0 usage
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Wed, 27 Aug 2014 18:32:08 +0000 (11:32 -0700)]
i965/cs: Add CS_OPCODE_CS_TERMINATE
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jordan Justen [Sun, 25 Jan 2015 05:35:54 +0000 (21:35 -0800)]
i965/cs: Add BRW_NEW_CS_PROG_DATA and BRW_CACHE_CS_PROG
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 11 Jan 2014 05:39:25 +0000 (21:39 -0800)]
i965: Add an INTEL_DEBUG=cs option.
At the moment it's not wired up to anything. Later patches will hook
it up to the compute shader back-end.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Paul Berry [Sat, 11 Jan 2014 05:39:25 +0000 (21:39 -0800)]
mesa/cs: Add compute support to update_program().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>