Tobias Platen [Wed, 3 Nov 2021 17:37:35 +0000 (18:37 +0100)]
cleanup fsm
Tobias Platen [Wed, 3 Nov 2021 17:34:57 +0000 (18:34 +0100)]
loadstore.py: add Display statement on SPR change
Tobias Platen [Wed, 3 Nov 2021 16:54:12 +0000 (17:54 +0100)]
add first tlbie test case
Tobias Platen [Tue, 2 Nov 2021 19:44:16 +0000 (20:44 +0100)]
WIP testcase for TLBIE
Tobias Platen [Tue, 2 Nov 2021 19:27:59 +0000 (20:27 +0100)]
mmu fsm: symbols have been renamed
Tobias Platen [Tue, 2 Nov 2021 19:18:52 +0000 (20:18 +0100)]
hack to fix UnusedElaboratables in src/soc/fu/mmu/test/test_pipe_caller.py
Tobias Platen [Tue, 2 Nov 2021 17:27:45 +0000 (18:27 +0100)]
add test_compldst_multi_mmu_fsm.py
Luke Kenneth Casson Leighton [Mon, 1 Nov 2021 23:09:35 +0000 (23:09 +0000)]
add beginnings of FunctionUnitBaseMulti
uses ReservationStations, which is where we find that Fan-In and Fan-Out
in ReservationStations is completely broken. deep joy.
Tobias Platen [Mon, 1 Nov 2021 19:14:20 +0000 (20:14 +0100)]
hack: resolve DriverConflict in src/soc/fu/mmu/fsm.py
Tobias Platen [Mon, 1 Nov 2021 17:50:57 +0000 (18:50 +0100)]
test_issuer_dcache.py: cleanup
Luke Kenneth Casson Leighton [Mon, 1 Nov 2021 09:53:13 +0000 (09:53 +0000)]
code comments for core
Tobias Platen [Sat, 30 Oct 2021 11:16:18 +0000 (13:16 +0200)]
update unittest for dcbz
Tobias Platen [Sat, 30 Oct 2021 11:12:54 +0000 (13:12 +0200)]
compldst_multi.py: fix reset on dcbz
Tobias Platen [Sat, 30 Oct 2021 09:43:31 +0000 (11:43 +0200)]
write_vcd - add missing file extension
Tobias Platen [Sat, 30 Oct 2021 09:15:17 +0000 (11:15 +0200)]
loadstore.py: add debug output for dcbz
Tobias Platen [Sat, 30 Oct 2021 09:14:30 +0000 (11:14 +0200)]
update unit test
Tobias Platen [Sat, 30 Oct 2021 09:11:33 +0000 (11:11 +0200)]
compldst_multi.py: handle dcbz
Tobias Platen [Fri, 29 Oct 2021 17:25:43 +0000 (19:25 +0200)]
test_compldst_multi_mmu.py: verify dcbz result, add debug outputs
Tobias Platen [Fri, 29 Oct 2021 16:45:47 +0000 (18:45 +0200)]
fix unittest test_compldst_multi_mmu.py (load now returned byte previously stored)
Tobias Platen [Thu, 28 Oct 2021 18:25:51 +0000 (20:25 +0200)]
test_compldst_multi_mmu.py: use nmigen.back.pysim
Tobias Platen [Thu, 28 Oct 2021 17:20:53 +0000 (19:20 +0200)]
test_compldst_multi_mmu.py: use nmigen.compat.sim
Luke Kenneth Casson Leighton [Sun, 10 Oct 2021 12:26:49 +0000 (13:26 +0100)]
replace PartitionedSignal with SimdSignal
Las Safin [Fri, 8 Oct 2021 17:15:55 +0000 (17:15 +0000)]
nix: Remove outdated comment about license
Luke Kenneth Casson Leighton [Fri, 8 Oct 2021 13:37:01 +0000 (14:37 +0100)]
Merge branch 'pr' from nix-soc
klehman [Thu, 7 Oct 2021 23:21:35 +0000 (19:21 -0400)]
comments for test_runner
klehman [Thu, 7 Oct 2021 15:57:39 +0000 (11:57 -0400)]
added comment to teststate
Tobias Platen [Tue, 5 Oct 2021 16:33:20 +0000 (18:33 +0200)]
cleanup test_compldst_multi_mmu.py
Tobias Platen [Mon, 4 Oct 2021 18:20:29 +0000 (20:20 +0200)]
refactoring test_compldst_multi_mmu.py
Tobias Platen [Mon, 4 Oct 2021 18:04:42 +0000 (20:04 +0200)]
update test_compldst_multi_mmu.py to use pagetables
Tobias Platen [Mon, 4 Oct 2021 17:50:41 +0000 (19:50 +0200)]
move pagetable to external file
Tobias Platen [Mon, 4 Oct 2021 17:22:36 +0000 (19:22 +0200)]
add wishbone driver for test_compldst_multi_mmu.py
Tobias Platen [Sun, 3 Oct 2021 12:35:48 +0000 (14:35 +0200)]
update test_compldst_multi_mmu.py
Tobias Platen [Sun, 3 Oct 2021 12:10:51 +0000 (14:10 +0200)]
src/soc/experiment/compldst_multi.py: update signal names in load()
Tobias Platen [Sun, 3 Oct 2021 11:37:58 +0000 (13:37 +0200)]
use LoadStore1 and DCache in test_compldst_multi_mmu.py
Tobias Platen [Sun, 3 Oct 2021 08:58:00 +0000 (10:58 +0200)]
more cleanup on pimem.py
Tobias Platen [Sun, 3 Oct 2021 08:38:38 +0000 (10:38 +0200)]
whitespace
Tobias Platen [Sun, 3 Oct 2021 08:33:35 +0000 (10:33 +0200)]
remove redunant pi_dcbz
Tobias Platen [Sun, 3 Oct 2021 07:37:15 +0000 (09:37 +0200)]
an extra dcbz parameter in all six places
Luke Kenneth Casson Leighton [Sat, 2 Oct 2021 23:46:59 +0000 (00:46 +0100)]
have to remove dcbz from pimem.py entirely
Luke Kenneth Casson Leighton [Sat, 2 Oct 2021 23:39:44 +0000 (00:39 +0100)]
commented-out and disabled the set_dcbz_addr function, it is the wrong
approach.
it is much better to add an extra parameter to set_wr_addr
"dcbz".
this to be added right across all set_wr_addr functions
(6 places)
Tobias Platen [Sat, 2 Oct 2021 14:00:50 +0000 (16:00 +0200)]
dcbz: cleanup
Tobias Platen [Sat, 2 Oct 2021 13:17:31 +0000 (15:17 +0200)]
dcbz symbol rename
Tobias Platen [Sat, 2 Oct 2021 12:50:00 +0000 (14:50 +0200)]
loadstore.py: add function set_dcbz_addr
Tobias Platen [Sat, 2 Oct 2021 12:42:56 +0000 (14:42 +0200)]
update test_dcbz_pi.py test case
Tobias Platen [Sat, 2 Oct 2021 12:17:17 +0000 (14:17 +0200)]
PortInterfaceBase: add dcbz handling
Luke Kenneth Casson Leighton [Fri, 1 Oct 2021 16:54:39 +0000 (17:54 +0100)]
move TestRunner to openpower-isa now that it is part of the Test API
https://bugs.libre-soc.org/show_bug.cgi?id=686
commit
5d5a1807d553985c25bdc8bf4d04aedfecddf34f openpower-isa repo
Tobias Platen [Wed, 29 Sep 2021 17:52:25 +0000 (19:52 +0200)]
compldst_multi.py: pass dcbz to portinterface
Tobias Platen [Wed, 29 Sep 2021 17:03:47 +0000 (19:03 +0200)]
testcase for compldst: wait for address
Tobias Platen [Tue, 28 Sep 2021 18:34:08 +0000 (20:34 +0200)]
rename ra_needed to zero_a
Tobias Platen [Tue, 28 Sep 2021 18:18:33 +0000 (20:18 +0200)]
update testcase for dcbz
Tobias Platen [Tue, 28 Sep 2021 17:49:36 +0000 (19:49 +0200)]
add testcase for dcbz
klehman [Sun, 26 Sep 2021 11:47:12 +0000 (07:47 -0400)]
add a state list for method calling
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 19:41:23 +0000 (20:41 +0100)]
found accidental commenting-out of memory setup in HDLRunner
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 19:28:07 +0000 (20:28 +0100)]
move debug printout to see whats going on for ldst
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 19:20:24 +0000 (20:20 +0100)]
comments
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 19:16:23 +0000 (20:16 +0100)]
Revert "move coresync clock synchronisation into HDLRunner"
This reverts commit
8a51f6944fa6c5185285b0139f5b419fb68aa145.
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 18:03:45 +0000 (19:03 +0100)]
call StateRunner constructor, to add to StateRunner class Factory
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 17:59:23 +0000 (18:59 +0100)]
more TODO comments
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 17:59:15 +0000 (18:59 +0100)]
move coresync clock synchronisation into HDLRunner
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 17:53:23 +0000 (18:53 +0100)]
whoops missed one function which should be a yield (of nothing)
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 17:51:53 +0000 (18:51 +0100)]
use yield from on StateRunners
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 15:34:03 +0000 (16:34 +0100)]
add comments, remove unneeded code
https://bugs.libre-soc.org/show_bug.cgi?id=686#c73
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 15:23:59 +0000 (16:23 +0100)]
move pc_i and svstate_i to HDLRunner
klehman [Sat, 25 Sep 2021 14:46:53 +0000 (10:46 -0400)]
add end_test, minor cleanup, added hdlrun.cleanup() call
klehman [Sat, 25 Sep 2021 14:32:33 +0000 (10:32 -0400)]
moved pc_i and sv_state to constructor, remove hdl_state_run
klehman [Sat, 25 Sep 2021 14:07:52 +0000 (10:07 -0400)]
change over run_hdl_state to TestRunner class
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 13:02:15 +0000 (14:02 +0100)]
add dummy call to simrun and end_test()
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 12:49:52 +0000 (13:49 +0100)]
code-comments and dummy functions
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 12:43:10 +0000 (13:43 +0100)]
move contents of run_sim_state into SimRunner run_test function
Luke Kenneth Casson Leighton [Sat, 25 Sep 2021 12:35:36 +0000 (13:35 +0100)]
add a SimRunner prepare_for_test and run_test function
klehman [Thu, 7 Oct 2021 23:21:35 +0000 (19:21 -0400)]
comments for test_runner
klehman [Thu, 7 Oct 2021 15:57:39 +0000 (11:57 -0400)]
added comment to teststate
Las Safin [Wed, 6 Oct 2021 09:17:51 +0000 (09:17 +0000)]
flake.nix: Clean up
Tobias Platen [Tue, 5 Oct 2021 16:33:20 +0000 (18:33 +0200)]
cleanup test_compldst_multi_mmu.py
Las Safin [Tue, 5 Oct 2021 12:43:46 +0000 (12:43 +0000)]
ecp5-program: Delete garbage
Las Safin [Tue, 5 Oct 2021 12:43:19 +0000 (12:43 +0000)]
Update lock file
Tobias Platen [Mon, 4 Oct 2021 18:20:29 +0000 (20:20 +0200)]
refactoring test_compldst_multi_mmu.py
Tobias Platen [Mon, 4 Oct 2021 18:04:42 +0000 (20:04 +0200)]
update test_compldst_multi_mmu.py to use pagetables
Tobias Platen [Mon, 4 Oct 2021 17:50:41 +0000 (19:50 +0200)]
move pagetable to external file
Tobias Platen [Mon, 4 Oct 2021 17:22:36 +0000 (19:22 +0200)]
add wishbone driver for test_compldst_multi_mmu.py
Tobias Platen [Sun, 3 Oct 2021 12:35:48 +0000 (14:35 +0200)]
update test_compldst_multi_mmu.py
Tobias Platen [Sun, 3 Oct 2021 12:10:51 +0000 (14:10 +0200)]
src/soc/experiment/compldst_multi.py: update signal names in load()
Tobias Platen [Sun, 3 Oct 2021 11:37:58 +0000 (13:37 +0200)]
use LoadStore1 and DCache in test_compldst_multi_mmu.py
Tobias Platen [Sun, 3 Oct 2021 08:58:00 +0000 (10:58 +0200)]
more cleanup on pimem.py
Tobias Platen [Sun, 3 Oct 2021 08:38:38 +0000 (10:38 +0200)]
whitespace
Tobias Platen [Sun, 3 Oct 2021 08:33:35 +0000 (10:33 +0200)]
remove redunant pi_dcbz
Tobias Platen [Sun, 3 Oct 2021 07:37:15 +0000 (09:37 +0200)]
an extra dcbz parameter in all six places
Luke Kenneth Casson Leighton [Sat, 2 Oct 2021 23:46:59 +0000 (00:46 +0100)]
have to remove dcbz from pimem.py entirely
Luke Kenneth Casson Leighton [Sat, 2 Oct 2021 23:39:44 +0000 (00:39 +0100)]
commented-out and disabled the set_dcbz_addr function, it is the wrong
approach.
it is much better to add an extra parameter to set_wr_addr
"dcbz".
this to be added right across all set_wr_addr functions
(6 places)
Tobias Platen [Sat, 2 Oct 2021 14:00:50 +0000 (16:00 +0200)]
dcbz: cleanup
Tobias Platen [Sat, 2 Oct 2021 13:17:31 +0000 (15:17 +0200)]
dcbz symbol rename
Tobias Platen [Sat, 2 Oct 2021 12:50:00 +0000 (14:50 +0200)]
loadstore.py: add function set_dcbz_addr
Tobias Platen [Sat, 2 Oct 2021 12:42:56 +0000 (14:42 +0200)]
update test_dcbz_pi.py test case
Tobias Platen [Sat, 2 Oct 2021 12:17:17 +0000 (14:17 +0200)]
PortInterfaceBase: add dcbz handling
Luke Kenneth Casson Leighton [Fri, 1 Oct 2021 16:54:39 +0000 (17:54 +0100)]
move TestRunner to openpower-isa now that it is part of the Test API
https://bugs.libre-soc.org/show_bug.cgi?id=686
commit
5d5a1807d553985c25bdc8bf4d04aedfecddf34f openpower-isa repo
Tobias Platen [Wed, 29 Sep 2021 17:52:25 +0000 (19:52 +0200)]
compldst_multi.py: pass dcbz to portinterface
Tobias Platen [Wed, 29 Sep 2021 17:03:47 +0000 (19:03 +0200)]
testcase for compldst: wait for address
Tobias Platen [Tue, 28 Sep 2021 18:34:08 +0000 (20:34 +0200)]
rename ra_needed to zero_a
Tobias Platen [Tue, 28 Sep 2021 18:18:33 +0000 (20:18 +0200)]
update testcase for dcbz
Tobias Platen [Tue, 28 Sep 2021 17:49:36 +0000 (19:49 +0200)]
add testcase for dcbz