Jonathan Marek [Wed, 12 Feb 2020 02:13:38 +0000 (21:13 -0500)]
turnip: remove unecessary MRT_CONTROL fill
Hardware won't use MRT_CONTROL after mrt_count
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
Jonathan Marek [Wed, 12 Feb 2020 02:12:25 +0000 (21:12 -0500)]
turnip: move some constant state to tu6_init_hw
Also remove duplicates.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
Jonathan Marek [Wed, 12 Feb 2020 02:11:07 +0000 (21:11 -0500)]
turnip: check the right alignment requirement on shader iova
I had some trouble because I assumed this was right, tested that the
alignment requirement is actually 16.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
Jonathan Marek [Thu, 27 Feb 2020 20:35:54 +0000 (15:35 -0500)]
turnip: add r5g5b5a1_unorm/b5g5r5a1_unorm formats
r5g5b5a1/b5g5r5a1 tiled/ubwc is the same as a1r5g5b5 (in memory), but
linear is read as 1_5_5_5 and written with 5_5_5_1 with swap.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
Jonathan Marek [Thu, 13 Feb 2020 00:57:49 +0000 (19:57 -0500)]
turnip: rework format table to support r5g5b5a1_unorm/b5g5r5a1_unorm
These formats are an exception that can't be modeled in the current format
table. Switch to a table with only a single a6xx_format per vk format,
and deal with the exceptions separately (currently the only exception is
10_10_10_2_UNORM which has a different color format).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
Jonathan Marek [Wed, 12 Feb 2020 23:45:28 +0000 (18:45 -0500)]
util/format: add missing BC4/BC5 vulkan formats
Enables these formats for turnip.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3806>
Icecream95 [Wed, 26 Feb 2020 09:03:13 +0000 (22:03 +1300)]
panfrost: LogicOp fixes and non 8-bit format support
With the previous LogicOp commit almost half of the blend modes were
broken because the surplus bits were not cleared after an inot.
v2:
- Remove u8 "fast path" as 8-bit is not well optimised yet
- Don't mask for 32-bit formats as that triggers an assert
Fixes: 068806c9f6b ("panfrost: LogicOp support")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
Icecream95 [Wed, 26 Feb 2020 06:29:03 +0000 (19:29 +1300)]
nir: Allow nir_format conversions to work on 32-bit values
The constant has to changed to unsigned long long, as shifting a
32-bit value by 32 is undefined behaviour.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3943>
Greg V [Wed, 26 Feb 2020 20:12:12 +0000 (23:12 +0300)]
r600: add missing <array> include
Fixes error with clang/libc++:
../src/gallium/drivers/r600/sfn/sfn_emitaluinstruction.h:69:88: error: implicit instantiation of undefined template 'std::__1::array<unsigned char, 3>'
bool emit_alu_op3(const nir_alu_instr& instr, EAluOp opcode, std::array<uint8_t, 3> reorder={0,1,2});
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3967>
Dave Airlie [Mon, 17 Feb 2020 07:15:38 +0000 (17:15 +1000)]
llvmpipe: add support for tessellation shaders
This adds the hooks between llvmpipe and draw to enable tessellation shaders.
It also updates the CI results and docs.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 07:13:58 +0000 (17:13 +1000)]
gallium/nir/tgsi: only scan fragment shader inputs for usage_mask
The scanner doesn't work with tess shaders, but we don't need it for those,
in fact only frag shaders need it.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 07:13:11 +0000 (17:13 +1000)]
draw: hook up final bits of tessellation
This hooks tessellation into various parts of draw, so the
tessellation shaders are used in the correct places as the
last shader of the pipeline.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 07:09:10 +0000 (17:09 +1000)]
draw: add main tessellation code
This is the bulk of the llvm shader builders and tessellation
execution code.
TCS uses a coroutine launcher like compute shaders to handle
barriers. It executes 4-wide with one input vertex per lane.
Tessellation happens before the TES is run.
TES is just a 4-wide launcher, one per primitive is executed,
with one lane per tessellation coordinate input.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 06:58:18 +0000 (16:58 +1000)]
draw: add JIT context/functions for tess stages.
This adds the initial draw_tess.h with a define needed
for the interfaces. TCS input array doesn't need to handle
patch inputs so can be smaller.
The TCS context has some dummy values to align the textures/images
properly.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 06:49:09 +0000 (16:49 +1000)]
gallivm/nir: add tessellation i/o support.
This add support for the tessellation i/o callbacks.
Tessellation requires another level of indirect indexing,
and allows fetches from shader outputs.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 06:47:51 +0000 (16:47 +1000)]
gallivm/tgsi/swr: add mask vec to the tcs store
For the nir paths we want to access the mask vector to only
store when the mask allows it.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 06:42:25 +0000 (16:42 +1000)]
gallivm/nir: align store_var param order with load_var
This was ugly so align load/store to have mostly the same
parameter ordering
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 06:21:21 +0000 (16:21 +1000)]
gallivm/nir: add support for tess system values
hooks up the tessellation specific system values in the NIR paths
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 06:19:57 +0000 (16:19 +1000)]
gallivm/nir: split out 64-bit splitting code
This just lets it be reused for tess later.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Dave Airlie [Mon, 17 Feb 2020 06:17:21 +0000 (16:17 +1000)]
gallium/auxiliary: add the microsoft tessellator and a pipe wrapper.
This adds the same tessellator code that swr uses, swr should
move to using this copy, unfortunately that wasn't trivial on my first
look.
The p_tessellator wrapper wraps it in a form that is a useful interface
for draw.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
Samuel Pitoiset [Thu, 20 Feb 2020 12:22:31 +0000 (13:22 +0100)]
radv: allow to capture SQTT traces with RADV_THREAD_TRACE=<start_frame>
This is pretty basic (and a bit crappy at the moment). I think we
might want some sort of overlay in the future and also be able to
trigger captures with F12 or whatever.
To record a capture, set RADV_THREAD_TRACE to something greater than
zero (eg. RADV_THREAD_TRACE=100 will capture frame #100). If the
driver didn't crash (or the GPU didn't hang), the capture file
should be stored in /tmp.
To open that capture, use Radeon GPU Profiler and enjoy your
profiling times with RADV! \o/
Note that thread trace support is quite experimental, only GFX9 is
supported at the moment, and a bunch of useful stuff are still missing
(shader ISA, pipelines info, etc). More is comming soon.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Samuel Pitoiset [Thu, 20 Feb 2020 15:24:14 +0000 (16:24 +0100)]
radv: add initial SQTT files generation support
SQTT is also a file format (.rgp extension) that can be consumed
by Radeon GPU Profiler for profiling purposes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Samuel Pitoiset [Tue, 18 Feb 2020 07:30:46 +0000 (08:30 +0100)]
radv: emit thread trace markers after every draw/dispatch call
Thread trace markers (also called events in Radeon GPU Profiler)
should be emitted after every draw/dispatch calls to collect data.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Samuel Pitoiset [Tue, 18 Feb 2020 07:32:33 +0000 (08:32 +0100)]
radv: add initial SQ Thread Trace support for GFX9
SQTT is a hardware block that collects thread trace data (like
wave occupancy, timings, etc) for every draw/dispatch calls.
It's only supported on GFX9 at the moment but I will add other
generations support soon.
This is the first step towards profiling with RADV!
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Samuel Pitoiset [Fri, 21 Feb 2020 08:35:46 +0000 (09:35 +0100)]
radv: add a small helper that allows to submit internal CS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Samuel Pitoiset [Tue, 18 Feb 2020 07:30:12 +0000 (08:30 +0100)]
ac/registers: add definitions for thread trace
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Samuel Pitoiset [Thu, 20 Feb 2020 10:35:23 +0000 (11:35 +0100)]
ac: add more fields to ac_gpu_info
For RGP traces.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3900>
Eric Anholt [Tue, 17 Dec 2019 05:23:02 +0000 (21:23 -0800)]
ci: Enable -Werror on meson-vulkan and meson-testing.
I want to make sure that I don't introduce warnings in turnip where we
have active work going on, and I also want to make sure that the drivers
we care about testing are warnings-clean.
As with the previous -Werror change, this is for CI only and doesn't
affect end-user builds.
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
Eric Anholt [Tue, 4 Feb 2020 23:12:18 +0000 (15:12 -0800)]
aco: Fix signed-vs-unsigned warning.
The previous instance of this comparision was 1u to avoid the warning, fix
this one too.
Fixes: dba71de5c636 ("aco: only create parallelcopy to restore exec at loop exit if needed")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3607>
Marek Olšák [Thu, 27 Feb 2020 00:16:01 +0000 (19:16 -0500)]
gallium/u_vbuf: silence a warning by using unreachable
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Marek Olšák [Wed, 26 Feb 2020 22:21:43 +0000 (17:21 -0500)]
mesa: fix 11 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Marek Olšák [Wed, 26 Feb 2020 22:20:51 +0000 (17:20 -0500)]
nir: fix 5 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Marek Olšák [Wed, 26 Feb 2020 22:00:19 +0000 (17:00 -0500)]
gallivm: fix 5 warnings
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Marek Olšák [Wed, 26 Feb 2020 21:57:37 +0000 (16:57 -0500)]
nir: replace GCC unroll with an option that works on GCC < 8.0
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3970>
Marek Olšák [Fri, 14 Feb 2020 03:56:54 +0000 (22:56 -0500)]
mesa: fix incorrect prim.begin/end for glMultiDrawElements
This has no effect on Gallium, but it affects tnl.
Cc: 19.3 20.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Wed, 12 Feb 2020 22:16:45 +0000 (17:16 -0500)]
mesa: optimize glMultiDrawArrays, call Draw only once (v2)
v2: use the macros
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Wed, 12 Feb 2020 22:21:35 +0000 (17:21 -0500)]
mesa: don't unroll glMultiDrawElements if one count is 0
let the driver skip or submit an empty draw call.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Wed, 12 Feb 2020 20:30:30 +0000 (15:30 -0500)]
mesa: clean up glMultiDrawElements code, use alloca for small draw count (v2)
v2: use calloc, add reusable macros
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de> (v1)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> (v1)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Tue, 11 Feb 2020 02:42:56 +0000 (21:42 -0500)]
mesa: move num_instances and base_instance out of _mesa_prim
They are never used by multi draws and internal draws.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Tue, 11 Feb 2020 01:25:52 +0000 (20:25 -0500)]
mesa: remove redundant _mesa_prim::is_indexed
Instead, check (ib != NULL) like all other drivers.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Tue, 11 Feb 2020 01:19:37 +0000 (20:19 -0500)]
mesa/i965: remove _mesa_prim::indirect_offset
Only i965 was using it.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Wed, 26 Feb 2020 20:10:47 +0000 (15:10 -0500)]
gallium/u_threaded: convert dividing by index_size to a bit shift
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Fri, 14 Feb 2020 20:28:28 +0000 (15:28 -0500)]
gallium/u_threaded: fix uploading user indices with start != 0
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Tue, 21 Jan 2020 03:59:49 +0000 (22:59 -0500)]
gallium: pass cso_velems_state into cso_context instead of pipe_vertex_element
This removes one memcpy from the CSO hashing code.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Tue, 11 Feb 2020 23:15:02 +0000 (18:15 -0500)]
gallium/cso_hash: inline struct cso_hash_data
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Wed, 22 Jan 2020 01:17:32 +0000 (20:17 -0500)]
gallium/cso_hash: pack cso_node better
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Tue, 11 Feb 2020 01:02:30 +0000 (20:02 -0500)]
mesa: remove unused "indirect" parameter from Driver.Draw
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Marek Olšák [Tue, 11 Feb 2020 00:54:44 +0000 (19:54 -0500)]
i965: stop using "indirect" parameter from Driver.Draw (non-indirect)
The parameter will be removed.
v2: added UNUSED, removed "!!"
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3990>
Caio Marcelo de Oliveira Filho [Thu, 27 Feb 2020 19:02:17 +0000 (11:02 -0800)]
anv: Remove unused field `urb.total_size`
This was used before the URB calculation functions were shared by GL
and Vulkan. Also drop the substruct for the remaining, `l3_config` is
a good name on its own.
Also-written-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3981>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:41:17 +0000 (09:41 -0500)]
pan/midgard: Use address analysis for globals, etc
..instead of opencoding for constants and doing the rest as ALU.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:38:21 +0000 (09:38 -0500)]
pan/midgard: Add address analysis framework
Midgard has the ability to calculate addresses as part of the load/store
pipeline. We'd like to make use of this to avoid doing this work on the
ALU pipes. To do so, when emitting globals/SSBOs/shareds, we walk the
tree looking for address arithmetic to try to parse out something the
hardware can work with, letting the original instructions be DCE'd
ideally. This analysis is done at the NIR level to properly account for
some messy details of vectorization which we'd rather not poke at the
backend level. (Originally I wrote this as a MIR pass but I'm fairly
sure it was wrong.)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 15:07:32 +0000 (10:07 -0500)]
pan/midgard: Force address alignment
I thought we already had this but... maybe not..
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:37:28 +0000 (09:37 -0500)]
pan/midgard: Round up bytemasks when promoting uniforms
Fixes crashes with uniform promotion in certain mixed type
circumstances.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:36:46 +0000 (09:36 -0500)]
pan/midgard: Fix load/store argument sizing
The swizzles are as-if they were 32-bit regardless of the bitness of the
operation, but the source sizes can and do change depending on the
flags. Account for this in the analysis.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:35:50 +0000 (09:35 -0500)]
pan/midgard: Add LDST_ADDRESS property
Many load/store ops (used for globals, SSBOs, shared memory, etc) have
the ability to compute addresses directly. Mark off which ones behave
like this.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:35:12 +0000 (09:35 -0500)]
pan/midgard: Extract nir_ssa_index helper
In case we don't have a nir_src.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Thu, 27 Feb 2020 14:15:00 +0000 (09:15 -0500)]
pan/midgard: Partially fix 64-bit swizzle alignment
When mixing 32/64-bit, we need to align the 32-bit registers to get the
required alignment. This isn't quite enough yet, though, since user
swizzles could bypass and will need to be lowered to 32-bit moves
(outstanding todo).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Wed, 26 Feb 2020 18:51:07 +0000 (13:51 -0500)]
pan/midgard: Allow fusing inverted sources for inverted ops
It doesn't make a difference to the actual algorithm, so let's get rid
of them.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Wed, 26 Feb 2020 18:50:46 +0000 (13:50 -0500)]
pan/midgard: Allow inverted inverted ops
We'd like to transform `inand.not` back to `iand` and so forth.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Alyssa Rosenzweig [Wed, 26 Feb 2020 18:37:10 +0000 (13:37 -0500)]
panfrost: Increase SSBO/image limit from 4->8
Fixes an error compiling some shaders.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3978>
Jonathan Marek [Thu, 20 Feb 2020 02:14:35 +0000 (21:14 -0500)]
etnaviv: disable INT_FILTER for ASTC
Tested on GC3000: INT_FILTER bit is incompatible with ASTC formats.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3927>
Caio Marcelo de Oliveira Filho [Wed, 26 Feb 2020 23:54:33 +0000 (15:54 -0800)]
anv: Remove unused field xfb_used from anv_pipeline
Since we only use xfb_info for GEN >= 8, make the ifdef cover that
local variable.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3973>
Eric Anholt [Tue, 28 Jan 2020 20:02:39 +0000 (12:02 -0800)]
ci: Include db410c support in the ARM container.
I'm working on moving the db410c CI from docker to LAVA, which means we
get to boot a custom kernel. To do that, we need to enable ARCH_QCOM in
the kernel, save the dtb around, and include abootimg in our container so
that we can generate combined kernel/dtb/ramdisk images for fastboot.
LAVA's fastboot support is unable to pack the overlay into an abootimg
image, just a cpio rootfs. We could flash the cpio rootfs after overlay
addition, but that takes 2 minutes to do, and causes wear on the devices.
Instead, we'll bring up the network at boot and use wget to fetch the
overlay. We'll want network support anyway, so that we can transfer the
failure xmls back to the gitlab job's artifacts at some point.
Since the msm GPU and realtek network firmware increase our payload by
3MB, add in firmware compression so that it doesn't waste as much RAM on
devices not using it.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Eric Anholt [Tue, 28 Jan 2020 20:24:21 +0000 (12:24 -0800)]
ci: Shrink the arm64 kernel build a bit.
No sense building some of these subsystems for just testing the GPU.
Saves some container rebuild time and kernel contents to move around.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Eric Anholt [Tue, 11 Feb 2020 22:34:24 +0000 (14:34 -0800)]
ci: Stop disabling ACPI in the LAVA arm64 kernel build.
I can't figure out why, but it's necessary to get QCOM_CLK_APCS_MSM8916
for db410c.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Eric Anholt [Mon, 24 Feb 2020 18:31:33 +0000 (10:31 -0800)]
ci: Remove LLVM from ARM test drivers.
The LLVM libraries were a significant fraction of the entire payload
(55M/250M uncompressed) into the initramfs of the test boards, but
LLVM is only used for the draw module used in select/feedback (which
isn't even tested in CI on ARM yet).
Assume that llvmpipe draw is safe enough for ARM given the coverage on
x86, and disable LLVM for these jobs.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Rohan Garg [Thu, 20 Feb 2020 15:37:48 +0000 (16:37 +0100)]
ci: Split out radv build-testing on arm64
radv needs libllvm which increases our ramdisk size
significantly. Since this driver is only build tested,
we can split it out into a separate job.
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3928>
Tomeu Vizoso [Thu, 27 Feb 2020 14:09:30 +0000 (15:09 +0100)]
gitlab-ci: Skip dEQP-GLES3.functional.shaders.derivate.*
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Tomeu Vizoso [Thu, 27 Feb 2020 13:18:02 +0000 (14:18 +0100)]
gitlab-ci: Remove GLES3 test from Panfrost fails list
Seems to have been fixed recently.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Tomeu Vizoso [Thu, 27 Feb 2020 12:30:29 +0000 (13:30 +0100)]
gitlab-ci: Use PAN_MESA_DEBUG=gles3 for Panfrost
We can drop now the GLES version overrides now that we have a DEBUG flag
that enables all what is expected from a GLES 3.0 implementation.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Thu, 20 Feb 2020 14:30:42 +0000 (09:30 -0500)]
panfrost: Add PAN_MESA_DEBUG=gles3 option
This enables experimental GLES3.0 support without ES3.1/2 hacks.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Thu, 20 Feb 2020 14:43:34 +0000 (09:43 -0500)]
panfrost: Expose PIPE_CAP_PRIMITIVE_RESTART
It works just fine, we just forgot to expose the CAP.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:40:20 +0000 (15:40 -0500)]
panfrost: Simplify stack shift calculation
I'm not sure why I never saw smaller values, but here you go.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:36:11 +0000 (15:36 -0500)]
panfrost: Reserve an extra page for spilling
I'm not sure what this is for, but the blob does it and I'd rather not
poke farther than needed into hardware-internal details.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:34:51 +0000 (15:34 -0500)]
panfrost: Default to 256 threads for TLS
I'm not sure where I got the impression 1024 was the right number. From
kbase:
#define THREAD_MT_DEFAULT 256
(where MT = "max threads" and the threads to allocate for TLS is <= max
threads). Let's cut out memory footprint for spilling by 75% :)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 16:52:52 +0000 (11:52 -0500)]
panfrost: Fix param getting
....Oops....
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:32:23 +0000 (15:32 -0500)]
panfrost: Don't set shared->unk0
This field controls the size of per-thread temporaries (somehow this is
separate from the regular stack for register spilling..), though I'm not
certain on the details. Regardless this value of 0x1e despite being used
in places by the blob seems wrong and is interfering with correct sizing
of the stack.
We don't use non-spilling scratchpad yet, so this is just here to fix
some details of spilling.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:34:16 +0000 (15:34 -0500)]
panfrost: Update spilling comment framebuffer->shared
All of this should apply equally with compute shaders, as far as I know.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 13:16:52 +0000 (08:16 -0500)]
panfrost: Fix padded_vertex_count generation
These two cases were flipped from the notes, leading to underestimates
of the padded vertex count, manifesting as visual corruption (random
geometry messed up). This issue was raised when noticing the corruption
went away when dramaticlaly oversizing max_index on an instanced indexed
draw, and then checking that padded_count >= vertex_count -- which
turned out *not* to be the case on certain inputs, a clear issue. Hence
looking into this routine...
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Thu, 20 Feb 2020 15:03:29 +0000 (10:03 -0500)]
panfrost: Fix gl_VertexID/InstanceID
Fixes a bunch of tests in dEQP-GLES3.functional.instanced.*.
Fixes: 027944c7c8c ("panfrost: Avoid reading GPU memory when packing
vertices")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Mon, 24 Feb 2020 14:36:18 +0000 (09:36 -0500)]
pan/midgard: Don't spill near a branch
Fixes
dEQP-GLES2.functional.shaders.indexing.varying_array.vec2_dynamic_loop_write_
static_read with register pressure forced down.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Tue, 25 Feb 2020 20:40:46 +0000 (15:40 -0500)]
pan/decode: Dump scratchpad size if present
This will help us narrow the size required for thread local storage.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3950>
Alyssa Rosenzweig [Wed, 19 Feb 2020 15:32:20 +0000 (10:32 -0500)]
panfrost: Implement index buffer cache
For index bufer resources (not user index buffers), we're able to cache
results. In practice, the cache works pretty dang well. It's still
important that the min/max computation is efficient (since when the
cache misses it'll run at draw-time and we don't want jank), but this
can eliminate a lot of computations entirely.
We use a custom data structure for caching. Search is O(N) to the size
but sizes are capped so it's effectively O(1). Insertion is O(1) with
automatic oldest eviction, on the assumption that the oldest results are
the least likely to still be useful. We might also experiment with other
heuristics based on actual usage later.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Alyssa Rosenzweig [Wed, 19 Feb 2020 15:15:13 +0000 (10:15 -0500)]
panfrost: Combine get_index_buffer with bound computation
These operations are intertwined since there are optimizations that will
want to "double dip". In particular for user index buffers we'd want to
upload simultaneous with index computation. For resources we'd like to
keep resource related code together.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3880>
Leo Liu [Fri, 7 Feb 2020 00:20:09 +0000 (19:20 -0500)]
radeon/jpeg: fix the jpeg dt_pitch with YUYV format
The dt_pitch should be same as NV12 format from decoder views,
and it finally got corrected with gfx9 surface's fixes from MR
https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3738
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Thu, 13 Feb 2020 18:24:43 +0000 (19:24 +0100)]
st/va: add support YUY2
YUY2 is a duplicate of YUYV and is used by gstreamer for 4:2:2.
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Wed, 12 Feb 2020 10:22:06 +0000 (11:22 +0100)]
st/va: enable 4:2:2 chroma format
Everything is in place to support them.
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Tue, 4 Feb 2020 17:56:59 +0000 (18:56 +0100)]
radeonsi: fix surf_pitch for subsampled surface
gfx9.surf_pitch is supposed to be in blocks (or elements) but addrlib
returns a pitch in pixels.
This cause a mismatch between surface->bpe and surface.u.gfx9.surf_pitch.
For subsampled formats like uyvy (bpe is 2) this breaks in various places:
- sdma copy
- video rendering (see issue https://gitlab.freedesktop.org/mesa/mesa/issues/2363)
when the vl_compositor_gfx_render method is used
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Tue, 4 Feb 2020 17:57:08 +0000 (18:57 +0100)]
gallium/vl: add 4:2:2 support
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2363
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Wed, 5 Feb 2020 09:21:20 +0000 (10:21 +0100)]
gallium/video: remove pipe_video_buffer.chroma_format
chroma_format depends on buffer_format so use the format_to_chroma_format
helper instead of storing it next to buffer_format.
This avoids bugs where one value is changed without updating the other.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Wed, 5 Feb 2020 09:20:06 +0000 (10:20 +0100)]
format: add format_to_chroma_format
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Pierre-Eric Pelloux-Prayer [Thu, 6 Feb 2020 17:18:38 +0000 (18:18 +0100)]
radeonsi: test subsampled format in testdma
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3738>
Samuel Pitoiset [Wed, 26 Feb 2020 14:12:55 +0000 (15:12 +0100)]
ac/llvm: flush denorms for nir_op_fmed3 on GFX8 and older gens
The hardware doesn't flush denorms, exactly like fmin/fmax, so
we have to do it manually. This doesn't fix anything known.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Samuel Pitoiset [Wed, 26 Feb 2020 14:09:40 +0000 (15:09 +0100)]
ac/llvm: fix 16-bit fmed3 on GFX8 and older gens
16-bit med3 is only supported on GFX9+.
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f16.*.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Samuel Pitoiset [Wed, 26 Feb 2020 14:04:38 +0000 (15:04 +0100)]
ac/llvm: fix 64-bit fmed3
Lower 64-bit fmed3 because LLVM doesn't expose an intrinsic.
Fixes dEQP-VK.spirv_assembly.instruction.amd_trinary_minmax.mid3.f64.*.
Fixes: d6a07732c9c ("ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3962>
Mathias Fröhlich [Wed, 26 Feb 2020 06:49:27 +0000 (07:49 +0100)]
mesa: Flush vertices before changing the OpenGL state.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Mathias Fröhlich [Wed, 26 Feb 2020 06:35:27 +0000 (07:35 +0100)]
mesa: Check for OpenGL state change before flushing vertices.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3958>
Dave Airlie [Wed, 26 Feb 2020 02:13:13 +0000 (12:13 +1000)]
gallivm/nir: handle mod 0 better.
I haven't seen this crash but TGSI does it so best align with
it to avoid future issues.
Fixes: 44a6b0107b3J (gallivm: add nir->llvm translation (v2))
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Dave Airlie [Wed, 26 Feb 2020 02:10:54 +0000 (12:10 +1000)]
gallivm/nir: fix integer divide SIGFPE
Blender was crashing with a SIGFPE even though the divide by 0
logic was kicking in. I'm not sure why TGSI doesn't get into this state.
The problem was is the numerator was INT_MIN we'd replace the div by
0 with a divide by -1, which is an exception for INT_MIN as INT_MIN/-1
== INT_MAX + 1 (too large for 32-bits). Instead for integer divides
just replace the mask values with 0x7fffffff. Also fix up the
result handling so it aligns with TGSI usage. (gives 0)
Fixes: c717ac1247c3 ("gallivm/nir: wrap idiv to avoid divide by 0 (v2)")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3956>
Dave Airlie [Tue, 25 Feb 2020 21:03:33 +0000 (07:03 +1000)]
gallivm/tgsi: fix stream id regression
This broke TGSI GS shaders with llvmpipe, it wasn't looking at the
right immediates and it should be cast to an integer type.
Fixes: 163d5fde0669 (gallium/swr: Enable GL_ARB_gpu_shader5: multiple streams)
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Acked-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3949>
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