Alyssa Rosenzweig [Thu, 13 Jun 2019 22:15:53 +0000 (15:15 -0700)]
panfrost: Use polygon list header size computation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 22:11:21 +0000 (15:11 -0700)]
panfrost: Calculate polygon list header size
As per the notes at the beginning of pan_tiler.c, we implement a routine
to calculate the size of the polygon list header given the framebuffer
dimensions and the provided hierarchy mask.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 15:14:53 +0000 (08:14 -0700)]
panfrost: Add pan_tiler.h header
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 18:25:18 +0000 (11:25 -0700)]
panfrost: Document tile size heuristic
I'm not sure how the blob does it, but this seems to be a dead simple
test and roughly corresponds to what I've noticed from the blob, so
maybe it's good enough.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 17:25:32 +0000 (10:25 -0700)]
panfrost: Rename tiler fields per tiler research
Following the research into Midgard's hierarchical tiling
infrastructure, we now understand (in broad stokes) the purpose of each
tiler field in the MFBD. Additionally, we understand more of the tiling
fields in the SFBD and in Bifrost's structures, although this knowledge
is still incomplete.
Update the names, decoder, and comments to reflect this new
understanding.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 16:40:41 +0000 (09:40 -0700)]
panfrost: Add notes about the tiler allocations
This explains how the polygon list is allocated, updating the headers
appropiately to sync the terminology.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 12 Jun 2019 16:33:06 +0000 (09:33 -0700)]
panfrost: Integrate kernel names for tiler FBD
These names are from the replay workaround in kbase; they begin to shine
some light on the meaning of these fields. In particular, we now
understand why the "tiler_meta" field has the effect it does on
performance in certain scenes (controlling tile granularity).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Bas Nieuwenhuizen [Sat, 15 Jun 2019 14:10:22 +0000 (16:10 +0200)]
radv: Add asserts that buffer descriptors are created with valid buffer formats.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Sat, 15 Jun 2019 16:05:05 +0000 (18:05 +0200)]
radv: Decompress DCC when the image format is not allowed for buffers.
Otherwise the buffer loads/stores in the bufimage meta operations fail.
If we decompress DCC then we can use the "canonical" format compatible
with the not-supported format.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Thu, 13 Jun 2019 10:44:03 +0000 (12:44 +0200)]
radv: make sure to init the DCC decompress compute path state
This fixes a segfault when forcing DCC decompressions on compute
because internal meta objects are not created since the on-demand
stuff.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 13 Jun 2019 15:17:23 +0000 (17:17 +0200)]
ac: make ac_compute_cmask() a static function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 13 Jun 2019 15:17:22 +0000 (17:17 +0200)]
radv: rely on ac_compute_cmask() for CMASK info
Instead of re-computing in the driver. The 3d and cube flags
are correctly set, so the same values should returned by
ac_compute_surface().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 17 Jun 2019 07:53:26 +0000 (09:53 +0200)]
radv: silent a compiler warning in radv_CmdPushDescriptorSetKHR()
Trivial.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tomeu Vizoso [Mon, 17 Jun 2019 05:56:00 +0000 (07:56 +0200)]
panfrost: ci: Speed things up a bit by skipping a git clone
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tomeu Vizoso [Thu, 13 Jun 2019 18:34:42 +0000 (20:34 +0200)]
panfrost: ci: Exclude all blend tests from results
As they randomly fail on T760.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Samuel Pitoiset [Fri, 14 Jun 2019 10:00:26 +0000 (12:00 +0200)]
ac: update llvm.amdgcn.icmp intrinsic name for LLVM 9+
LLVM r363339 changed llvm.amdgcn.icmp.i* to llvm.amdgcn.icmp.i64.i*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Erico Nunes [Sat, 15 Jun 2019 13:41:05 +0000 (15:41 +0200)]
lima: lower fmod in ppir and gpir
Since commit
4f3c82c72c5 fmod is no longer being lowered in nir, and
ends up crashing lima programs with "unsupported nir_op: fmod" in both
ppir and gpir.
There seems to be no mod operation in hardware in utgard and there is an
optimization in nir to lower fmod to instructions that lima already
implements, so let's use that.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Rob Clark [Wed, 12 Jun 2019 20:24:33 +0000 (13:24 -0700)]
freedreno/a6xx: re-enable UBWC for depth/stencil
Now that we can blit depth/stencil in a way that plays nicely with UBWC,
re-enable it.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Tue, 11 Jun 2019 17:38:19 +0000 (10:38 -0700)]
freedreno/a6xx: handle z24s8/z24x8 blits with u_blitter
Now that it can turn these blits into rendering to RB6_Z24_UNORM_S8_UINT
it can properly handle cases where only one of depth+stencil is being
blit. And this avoids lying about he format, which completely doesn't
work when UBWC is used.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Thu, 13 Jun 2019 17:11:57 +0000 (10:11 -0700)]
freedreno/a6xx: handle fallback for rewritten blits ourself
For re-written z/s blits, we want to use the re-written `pipe_blit_info`
even if we have to fallback to 3d pipe (`u_blitter`). So handle that
fallback ourself.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Thu, 13 Jun 2019 17:09:18 +0000 (10:09 -0700)]
freedreno/a6xx: rename variable
The name 'separate' doesn't make a while lot of sense, as only one of
the cases is the blit actually split. But split out from previous patch
in an attempt to reduce the noise.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Tue, 11 Jun 2019 17:33:30 +0000 (10:33 -0700)]
freedreno/a6xx: consolidate z/s blit handling
This will get even simpler with the next patch
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Wed, 12 Jun 2019 19:03:58 +0000 (12:03 -0700)]
gallium: add z24s8_as_r8g8b8a8 format
This maps to a special format that recent generations of adreno have,
for blitting z24s8. Conceptually it is similar to doing Z and/or S
blits by pretending it is r8g8b8a8 (with appropriate writemask). But
it differs when bandwidth compression is used, as z24 is a different
type from r8g8b8.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Kenneth Graunke [Wed, 12 Jun 2019 02:20:58 +0000 (19:20 -0700)]
st/mesa: Respect GL_TEXTURE_SRGB_DECODE_EXT in GenerateMipmaps()
Apparently, we're supposed to look at the texture object's built-in
sampler object's sRGB decode setting in order to decide whether to
decode/downsample/re-encode, or simply downsample as-is. Previously,
we had just respected the pipe_resource's format.
Fixes SKQP's Skia_Unit_Tests.SRGBMipMaps test.
(This ports commit
337a808062c756b474ee80a9ac04b5a3dbbeb67e from i965
to st/mesa for Gallium drivers.)
Reviewed-by: Eric Anholt <eric@anholt.net>
Erico Nunes [Fri, 14 Jun 2019 10:28:55 +0000 (12:28 +0200)]
lima: fix dynarray usage in lima_submit_add_bo
Commit
de8a919702a refactored dynarray usage and changed the size of the
allocation in lima_submit_add_bo.
That causes a segfault in programs running with lima.
This commit restores the allocation size back to the previous size.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 17:12:38 +0000 (10:12 -0700)]
panfrost: Fix variant selection
Fixes 1acffb ("panfrost: Unify...")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Marek Olšák [Wed, 12 Jun 2019 02:49:18 +0000 (22:49 -0400)]
ac: add radeon_info::is_amdgpu instead of checking drm_major == 3
and clean up
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Mauro Rossi [Sun, 5 May 2019 16:43:33 +0000 (18:43 +0200)]
android: amd/common: fix missing include path
Fixes the following building error in Android:
In file included from external/mesa/src/amd/common/ac_llvm_helper.cpp:34:
In file included from external/mesa/src/amd/common/ac_llvm_build.h:30:
In file included from external/mesa/src/compiler/nir/nir.h:40:
In file included from external/mesa/src/compiler/nir_types.h:36:
external/mesa/src/compiler/glsl_types.h:37:10: fatal error: 'main/config.h' file not found
^~~~~~~~~~~~~~~
1 error generated.
Fixes: bd4c661 ("ac,ac/nir: use a better sync scope for shared atomics")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Mauro Rossi [Wed, 24 Apr 2019 13:11:02 +0000 (15:11 +0200)]
android: radv: fix necessary dependecies
Fixes building errors due to libmesa_util and libexpat dependencies:
In file included from external/mesa/src/amd/vulkan/radv_device.c:52:
external/mesa/src/util/xmlpool.h:115:10: fatal error: 'xmlpool/options.h' file not found
^~~~~~~~~~~~~~~~~~~
1 error generated.
FAILED: out/target/product/x86_64/obj_x86/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so
...
external/mesa/src/util/xmlconfig.c:670: error: undefined reference to 'XML_ParserCreate'
...
clang.real: error: linker command failed with exit code 1 (use -v to see invocation)
Fixes: 3c2e826 ("radv: Add support for driconf.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Alejandro Piñeiro [Thu, 13 Jun 2019 11:22:40 +0000 (13:22 +0200)]
docs: document three NIR_ envvars
Initially I was only interested on documenting NIR_PRINT, as today I
needed to check the code to find this envvar, that at the moment I
vaguely remembered that existed.
As we are here, though, let's just document all of them (assuming that
makes sense).
Reviewed-by: Eric Anholt <eric@anholt.net>
Alexandros Frantzis [Thu, 13 Jun 2019 14:31:50 +0000 (17:31 +0300)]
virgl: Return immediately when finding a compatible resource in the cache
When searching for resources in the cache, we previously released all
expired resources even after having found a compatible resource.
This commit changes this behavior to return immediately when finding a
compatible resource, so that the operation finishes more quickly. This
moves more of the burden of releasing expired resources to cache
addition, which, since it happens at resource destruction time, it's
less time critical.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Alexandros Frantzis [Tue, 11 Jun 2019 14:58:08 +0000 (17:58 +0300)]
virgl: Use virgl_resource_cache in the vtest winsys
Replace the cache implementation in the vtest winsys with
virgl_resource_cache.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Alexandros Frantzis [Wed, 12 Jun 2019 07:30:26 +0000 (10:30 +0300)]
virgl: Use virgl_resource_cache in the drm winsys
Replace the cache implementation in the drm winsys with
virgl_resource_cache.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Alexandros Frantzis [Wed, 12 Jun 2019 07:29:32 +0000 (10:29 +0300)]
virgl: Introduce virgl_resource_cache
Introduce a resource cache implementation that can be used by any virgl
winsys backend.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Haihao Xiang [Wed, 12 Jun 2019 08:28:58 +0000 (16:28 +0800)]
i965: support UYVY for external import only
It is similar with YUYV
Fixes: 165e704719b85c ("i965/i915: Add UYVY as the supported format")
Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Neil Roberts [Mon, 22 Apr 2019 14:33:38 +0000 (16:33 +0200)]
glsl: Set default precision on record members
Record types have their own slot to store the precision for each
member in glsl_struct_field. Previously if the member didn’t have an
explicit precision qualifier this was being left as
GLSL_PRECISION_NONE. This patch makes it take into account the type’s
default precision qualifier like it does for regular variables in
apply_type_qualifier_to_variable.
This has the additional benefit of correctly reporting an error when a
float type is used in a struct without declaring the default type.
Reviewed-by: Eric Anholt <eric@anholt.net>
Neil Roberts [Tue, 23 Apr 2019 14:52:36 +0000 (16:52 +0200)]
glsl/linker: Make precision matching optional in intrastage_match
This function is confusingly also used to match interstage interfaces
as well as intrastage. In the interstage case it needs to avoid
comparing the precisions. This patch adds a parameter to specify
whether to take the precision into account or not so that it can be
used for both cases.
Reviewed-by: Eric Anholt <eric@anholt.net>
Neil Roberts [Tue, 23 Apr 2019 13:19:35 +0000 (15:19 +0200)]
glsl/linker: Don’t check precision for shader interface
On GLES, the interface between vertex and fragment shaders doesn’t
need to have matching precision.
Section 4.3.10 of the GLSL ES 3.00 spec:
“The type of vertex outputs and fragment inputs with the same name
must match, otherwise the link command will fail. The precision does
not need to match.”
Reviewed-by: Eric Anholt <eric@anholt.net>
Neil Roberts [Wed, 24 Apr 2019 10:28:51 +0000 (12:28 +0200)]
compiler/types: Making comparing record precision optional
On GLES, the interface between vertex and fragment shaders doesn’t
need to have matching precision. This adds an extra argument to
glsl_types::record_compare to disable the precision comparison. This
will later be used for the shader interface check.
In order to make this work this patch also adds a helper function to
recursively compare types while ignoring the precision.
v2: Call record_compare from within compare_no_precision to avoid
duplicating code (Eric Anholt).
Reviewed-by: Eric Anholt <eric@anholt.net>
Lucas Stach [Fri, 31 May 2019 16:05:12 +0000 (18:05 +0200)]
etnaviv: fix some pm query issues
The offsets to read the query results were off-by-one, which causes the
counters to report bogus increasing values.
Also the counter result is u32, so we need to initialize the query type
to reflect that.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Iago Toral Quiroga [Thu, 13 Jun 2019 09:38:45 +0000 (11:38 +0200)]
v3d: do not setup execute flags for else block in uniform control flow
Either all channels executed the 'then' block, in which case all
channels will directly jump to the 'endif' block at the end of the
'then' block, or all channels execute the 'else' block (so no
execution masking is necessary).
Shader-db results:
total instructions in shared programs:
9119238 ->
9117550 (-0.02%)
instructions in affected programs: 401252 -> 399564 (-0.42%)
helped: 855
HURT: 77
total uniforms in shared programs:
3022622 ->
3022605 (<.01%)
uniforms in affected programs: 3566 -> 3549 (-0.48%)
helped: 17
HURT: 0
total max-temps in shared programs:
1327762 ->
1327774 (<.01%)
max-temps in affected programs: 619 -> 631 (1.94%)
helped: 2
HURT: 15
Reviewed-by: Eric Anholt <eric@anholt.net>
Iago Toral Quiroga [Wed, 12 Jun 2019 11:57:03 +0000 (13:57 +0200)]
nir: detect more dynamically uniform expressions
Shader-db results for v3d:
total instructions in shared programs:
9132728 ->
9119238 (-0.15%)
instructions in affected programs: 596886 -> 583396 (-2.26%)
helped: 1118
HURT: 224
total threads in shared programs: 234298 -> 234308 (<.01%)
threads in affected programs: 10 -> 20 (100.00%)
helped: 5
HURT: 0
total uniforms in shared programs:
3022949 ->
3022622 (-0.01%)
uniforms in affected programs: 29163 -> 28836 (-1.12%)
helped: 108
HURT: 37
total max-temps in shared programs:
1328030 ->
1327762 (-0.02%)
max-temps in affected programs: 10097 -> 9829 (-2.65%)
helped: 263
HURT: 15
total spills in shared programs: 3793 -> 3777 (-0.42%)
spills in affected programs: 432 -> 416 (-3.70%)
helped: 16
HURT: 0
total fills in shared programs: 4380 -> 4266 (-2.60%)
fills in affected programs: 828 -> 714 (-13.77%)
helped: 16
HURT: 0
Reviewed-by: Eric Anholt <eric@anholt.net>
Tapani Pälli [Thu, 13 Jun 2019 09:58:04 +0000 (12:58 +0300)]
ir3: initialize progress false before ir3_nir_lower_imul
Removes a compiler warning about uninitialized variable.
Fixes: c02ffd2700c "ir3: Use the new NIR lowering pass for integer multiplication"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rob Clark <robclark@gmail.com>
Reviewed-by: Eduardo Lima <elima@igalia.com>
Boris Brezillon [Thu, 13 Jun 2019 12:56:02 +0000 (14:56 +0200)]
panfrost: Fix general purpose varying handling
When both the fragment and vertex shaders point to the same varying
location they expect to share the same varying slot.
Make sure vertex and fragment varyings pointing to the same loc have
->src_offset set to the same value.
[Alyssa: In addition a patch implement txs, this fixes GALLIUM_HUD on
Panfrost]
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Marek Olšák [Fri, 7 Jun 2019 20:22:29 +0000 (16:22 -0400)]
ac/registers: use better names for disambiguated definitions
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Fri, 7 Jun 2019 19:56:42 +0000 (15:56 -0400)]
ac/registers: remove deprecated/inapplicable definitions
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Caio Marcelo de Oliveira Filho [Wed, 12 Jun 2019 03:07:32 +0000 (20:07 -0700)]
iris: Enable INTEL_shader_atomic_float_minmax
Supported only for gen >= 9.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Caio Marcelo de Oliveira Filho [Wed, 12 Jun 2019 03:06:41 +0000 (20:06 -0700)]
gallium: Add PIPE_CAP_ATOMIC_FLOAT_MINMAX
Used to enable INTEL_shader_atomic_float_minmax.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Rob Clark [Tue, 11 Jun 2019 12:16:21 +0000 (05:16 -0700)]
freedreno/a6xx: fix MAX_INDICES
Signed-off-by: Rob Clark <robdclark@chromium.org>
Rob Clark [Wed, 12 Jun 2019 18:24:55 +0000 (11:24 -0700)]
freedreno/blitter: remove dead code
The src/dst format is overriden from the pipe_blit_info, so this just
logic just serves to confuse the reader.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Rob Clark [Wed, 12 Jun 2019 20:36:18 +0000 (13:36 -0700)]
freedreno: turn staging cube into 2d-array
Since we could only need a subset of the layers, and otherwise we
trigger an assert in util_max_layer()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tomeu Vizoso [Thu, 13 Jun 2019 13:00:35 +0000 (15:00 +0200)]
panfrost: ci: Exclude some tests from results
These are tests that regressed in RK3288 but still pass on RK3399.
So we still have a CI we can rely on, add them to the flip-flop list for
now.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tomeu Vizoso [Thu, 13 Jun 2019 10:08:38 +0000 (12:08 +0200)]
panfrost: ci: Update test expectations
Some tests got fixed since the last update, but also some regressions
crept in.
To keep the CI green, add the regressions to the expected failures.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Connor Abbott [Thu, 13 Jun 2019 14:48:41 +0000 (16:48 +0200)]
nir: Don't manually index intrinsic index enum
This fixes a rebase fail in
ea51275e07b, and prevents it from happening
again. There's no reason to do this manually.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Erik Faye-Lund [Tue, 11 Jun 2019 09:28:11 +0000 (11:28 +0200)]
docs: work around broken altsoftware.com link
altsoftware.com seems to no longer be around, and is currently being
held by a domain squatter. Let's link to waybackmachine instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:11:31 +0000 (10:11 +0200)]
docs: work around broken dsbox.com link
dsbox.com now forwards to haystax.com, which is tehcnially unrealted to
this link. Let's link to waybackmachine instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:05:51 +0000 (10:05 +0200)]
docs: work around broken sgi.com links
sgi.com now forwards to hpe.com, which is technically unrelated to these
links. Let's link to waybackmachine instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:20:12 +0000 (10:20 +0200)]
docs: update link to OpenGL FAQ
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:18:39 +0000 (10:18 +0200)]
docs: update link to the Linux OpenGL ABI
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:16:32 +0000 (10:16 +0200)]
docs: update link to glw
GLW is currently living in gitlab, the cgit-page is just a mirror.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 07:32:08 +0000 (09:32 +0200)]
docs: fixup link-target
Just a couple of lines above, we have this exact same link, but this
time with a leading "www.". Let's match that.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Mon, 10 Jun 2019 18:57:37 +0000 (20:57 +0200)]
docs: eliminate another stale autoconf-reference
Meson is what should tell you about these issues, not the configure
script. We no longer have that.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Mon, 10 Jun 2019 18:55:16 +0000 (20:55 +0200)]
docs: replace autoconf with meson
We no longer have an autoconf build-system to maintain, but we do have a
meson build-system. So let's mention that instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Mon, 10 Jun 2019 18:52:16 +0000 (20:52 +0200)]
docs: update required packages
Automake and libtool are no longer required to build, instead we need
meson and ninja-build.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Thu, 6 Jun 2019 09:43:34 +0000 (11:43 +0200)]
docs: remove pointless haiku-comment
The only build system that doesn't support Haiku is `Android.mk`,
which also doesn't support most other platforms either, so there is
no need to single it out.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Thu, 6 Jun 2019 08:33:09 +0000 (10:33 +0200)]
docs: fixup typo
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Daniel Schürmann [Wed, 9 May 2018 18:43:16 +0000 (20:43 +0200)]
radv: enable AMD_shader_ballot with RADV_PERFTEST_SHADER_BALLOT ('shader_ballot')
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Wed, 9 May 2018 18:42:09 +0000 (20:42 +0200)]
amd/common: add support for AMD_shader_ballot functions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Wed, 9 May 2018 18:41:23 +0000 (20:41 +0200)]
spirv/nir: add support for AMD_shader_ballot and Groups capability
This commit also renames existing AMD capabilities:
- gcn_shader -> amd_gcn_shader
- trinary_minmax -> amd_trinary_minmax
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Wed, 9 May 2018 18:37:24 +0000 (20:37 +0200)]
nir: add intrinsics for AMD_shader_ballot
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Thu, 8 Mar 2018 15:25:20 +0000 (16:25 +0100)]
radv: enable shader_subgroup_vote & shader_subgroup_ballot extensions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Fri, 9 Mar 2018 09:55:15 +0000 (10:55 +0100)]
nir/spirv: add support for the SubgroupBallotKHR SPIR-V capability
This capability is required for the VK_EXT_shader_subgroup_ballot extension.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Fri, 9 Mar 2018 09:27:20 +0000 (10:27 +0100)]
nir/spirv: add support for the SubgroupVoteKHR SPIR-V capability
This capability is required for the VK_EXT_shader_subgroup_vote extension.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Alejandro Piñeiro [Wed, 12 Jun 2019 12:49:05 +0000 (14:49 +0200)]
v3d: fix checking twice auf flag
Seems a C&P error, and should check for auf/muf.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110902
Fixes: 8f065596d22ab000c53f "v3d: Add an optimization pass for redundant flags updates."
Reviewed-by: Eric Anholt <eric@anholt.net>
Samuel Pitoiset [Thu, 13 Jun 2019 08:52:02 +0000 (10:52 +0200)]
radv: flush and invalidate CB before resetting query pools on GFX9
We have to emit a CACHE_FLUSH_AND_INV_TS_EVENT to be sure all
prior GPU work is done. While we are at it, also flush and
invalidate DB.
This fixes the following CTS (when the small hint is disabled):
dEQP-VK.query_pool.statistics_query.reset_before_copy.*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Wed, 5 Jun 2019 12:34:23 +0000 (14:34 +0200)]
vl: Always enable drm winsys.
The dri2 winsys also uses libdrm (and you can only enable dri3 if
you enable dri2), and the drm winsys only requires libdrm.
So if any winsys is enabled you can also enable the drm winsys, and
since we always want at least one winsys we can always enable it.
I removed the check for the drm platform for VA and OMX since they
do not care anymore. Since we still check for one of r600g, nouveau
or radeonsi, we are guarantueed to still only enable it by default
in a configuration that requires libdrm anyway. So for people using
va=auto, we don't suddenly start requiring libdrm were we did not
before.
This supersedes "vl: Enable DRM by default.", which I pushed, but
rolled back because it used dep_libdrm before its definition.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Bas Nieuwenhuizen [Wed, 12 Jun 2019 22:57:16 +0000 (00:57 +0200)]
radv: Always disable DCC on shareable images.
Do not want it for perf reasons. Always have to disable DCC when
transferring to external queue.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Wed, 12 Jun 2019 22:52:18 +0000 (00:52 +0200)]
radv: Skip transitions coming from external queue.
Transitions to external queue should do the transition & make sure
it works on all queues.
Fixes: 8ebc7dcb59a "radv: Allow fast clears with concurrent queue mask for some layouts."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Mateusz Krzak [Fri, 7 Jun 2019 22:33:30 +0000 (00:33 +0200)]
lima/ppir: change offset type to int
Offset doesn't need to be 64-bit. This fixes compilation error
with 64-bit off_t.
Fixes: af0de6b9 lima/ppir: implement discard and discard_if
Suggested-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Mateusz Krzak <kszaquitto@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Tested-by: Andreas Baierl <ichgeh@imkreisrum.de>
Chia-I Wu [Wed, 15 May 2019 22:38:49 +0000 (15:38 -0700)]
virgl: virgl_transfer should own its virgl_resource
We should avoid having potentially dangling pointers to
pipe_resources in general.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Wed, 15 May 2019 22:46:40 +0000 (15:46 -0700)]
virgl: pass virgl_context to transfer create/destroy
A pipe_transfer is a context object. It is fine for the
constructor/destructor to have access to the context.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Wed, 15 May 2019 22:52:34 +0000 (15:52 -0700)]
virgl: init transfer queue from virgl_context
A pipe_transfer is a context object. It is fine for
virgl_transfer_queue to have access to the context.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Wed, 15 May 2019 23:01:02 +0000 (16:01 -0700)]
virgl: clean up virgl_transfer_queue.h
Add header guard and forward declare structs. Move virgl_resource.h
inclusion to the C file.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Nicolai Hähnle [Mon, 29 Apr 2019 14:02:29 +0000 (16:02 +0200)]
radeonsi: add radeonsi_debug_disassembly option
This dumps disassembly to the pipe_debug_callback together with shader
stats.
Can be used together with shader-db to get full disassembly of all shaders
in the database.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Mon, 29 Apr 2019 13:59:22 +0000 (15:59 +0200)]
radeonsi: fix line splitting in si_shader_dump_assembly
Compute the count since the start of the current line instead of the
count since the start of the the disassembly.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 4 May 2019 10:37:36 +0000 (12:37 +0200)]
radeonsi: raise the alignment of LDS memory for compute shaders
This implies that the memory will always be at address 0, which allows
LLVM to generate slightly better code.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 4 May 2019 10:34:52 +0000 (12:34 +0200)]
radeonsi: use an explicit symbol for the LSHS LDS memory
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 4 May 2019 10:18:07 +0000 (12:18 +0200)]
radeonsi: rename lds_{load,store} to lshs_lds_{load,store}
These functions are now only used in LS/HS shaders (both separate and
merged).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Sat, 4 May 2019 10:11:08 +0000 (12:11 +0200)]
radeonsi/gfx9: declare LDS ESGS ring as an explicit symbol on LLVM >= 9
This will make it easier to use LDS for other purposes in geometry
shaders in the future.
The lifetime of the esgs_ring variable is as follows:
- declared as [0 x i32] while compiling shader parts or monolithic shaders
- just before uploading, gfx9_get_gs_info computes (among other things)
the final ESGS ring size (this depends on both the ES and the GS shader)
- during upload, the "esgs_ring" symbol is given to ac_rtld as a shared
LDS symbol, which will lead to correctly laying out the LDS including
other LDS objects that may be defined in the future
- si_shader_gs uses shader->config.lds_size as the LDS size
This change depends on the LLVM changes for emitting LDS symbols into
the ELF file.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 3 May 2019 19:18:51 +0000 (21:18 +0200)]
amd/rtld: layout and relocate LDS symbols
Upcoming changes to LLVM will emit LDS objects as symbols in the ELF
symbol table, with relocations that will be resolved with this change.
Callers will also be able to define LDS symbols that are shared between
shader parts. This will be used by radeonsi for the ESGS ring in gfx9+
merged shaders.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 30 Nov 2018 10:50:07 +0000 (11:50 +0100)]
radeonsi: cleanup some #includes
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 4 Apr 2019 09:49:52 +0000 (11:49 +0200)]
amd/common: use ARRAY_SIZE for the LLVM command line options
This is more convenient for changing it around during debug.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 3 May 2019 17:15:52 +0000 (19:15 +0200)]
radeonsi: inline si_shader_binary_read_config into its only caller
Since it can only be used for reading the config of an individual,
non-combined shader, it is not very reusable anyway.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Tue, 22 May 2018 14:14:16 +0000 (16:14 +0200)]
radeonsi: use the new run-time linker for shaders
v2:
- fix a memory leak
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 6 Dec 2018 11:43:44 +0000 (12:43 +0100)]
radeonsi: don't declare pointers to static strings
The compiler should be able to optimize them away, but still. There's
no point in declaring those as pointers, and if the compiler *doesn't*
optimize them away, they add unnecessary load-time relocations.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 28 Nov 2018 11:46:45 +0000 (12:46 +0100)]
amd/common: add ac_compile_module_to_elf
A new variant of ac_compile_module_to_binary that allows us to
keep the entire ELF around.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 6 Dec 2018 11:35:36 +0000 (12:35 +0100)]
radeonsi: dump shader binary buffer contents
Help identify bugs related to corruption of shaders in memory,
or errors in shader upload / rtld.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 17 May 2018 16:17:07 +0000 (18:17 +0200)]
radeonsi: return bool from si_shader_binary_upload
We didn't really use error codes anyway.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 28 Nov 2018 10:32:01 +0000 (11:32 +0100)]
radeonsi: let si_shader_create return a boolean
We didn't really use error codes anyway.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 9 May 2018 14:38:33 +0000 (16:38 +0200)]
radeonsi: use ac_shader_config
Reviewed-by: Marek Olšák <marek.olsak@amd.com>