tgsi_to_nir: Reuse glsl_get_sampler_dim_coordinate_components().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

freedreno/ir3: Reuse glsl_get_sampler_dim_coordinate_components() in tex_info.

Now that we have access to the interior switch statement not going through
the txs special case for coord_components, we can just use it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

spirv_to_nir: Reuse glsl_sampler_dim_coordinate_components().

We just needed to move the SUBPASS_MS case in, and the rest of the cases
match up.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

glsl: Factor out the sampler dim coordinate components switch statement.

I want to reuse this in NIR image intrinsics in backends, which just have
dim/is_array.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

v3d: Ask the state tracker to lower image accesses off of derefs.

This saves a bunch of hassle in handling derefs in the backend, and would
be needed for reasonable handling of dynamic indexing of image arrays.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

gallium: Add a cap for enabling lowering of image load/store intrinsics.

The deref stuff is hard to handle in a backend supporting dynamic
indexing, while the lowering can easily turn that into the same kind of
dynamic indexing we do for textures, UBOs, and SSBOs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

nir: Make image lowering optionally handle the !bindless case as well.

iris was doing this internally, but let's rename the function and move the
iris code there.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

nir: Rename gl_nir_lower_bindless_images.c in preparation for extending it.

The bulk of it can be reused to implement iris's internal non-bindless
image lowering, which I would like to reuse in freedreno, v3d, and
nir-to-tgsi.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>

i965: Use isl_aux_state_transition_write()

v2. Dirty shadow miptrees independent of aux. (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

i965: Use ISL's access preparation functions

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

iris: Use isl_aux_state_transition_write()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

iris: Use ISL's access preparation functions

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

iris: Use isl_aux_usage_has_fast_clear()

Make sure fast-clears aren't attempted or allowed for ISL_AUX_USAGE_MC.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

isl: Add a module which manages aux resolves

Provide a generic interface which manages aux resolves in ISL. The
feature differences between this and what's in iris is:
* Support for media compression. ISL_AUX_USAGE_MC behaves differently
  from many other usages of CCS, so it was useful to implement this
  support upfront, while designing the interfaces.
* Optimizations for full-surface writes. For example, after a
  full-surface write occurs with ISL_AUX_USAGE_CCS_E in the PARTIAL_CLEAR
  state, isl_aux_state_transition_write() returns COMPRESSED_NO_CLEAR
  instead of COMPRESSED_CLEAR.

A performance suggestion for main-surface-invalidating/replacing writes
is given as a comment instead of adding a boolean to
isl_aux_prepare_access(). This avoids extra validation and should be
simple enough for the caller to handle.

v2. Add assertions. (Jason)
v3. Use switches in 2 more functions. (Jason)
    Store aux metadata in a static table. (Jason)
    Change prepare and finish function signatures. (Jason)
    Keep isl_aux_state_transition_* functions separate.
v4. (Jason)
    Assert against resolving in AUX_INVALID.
    Rename aux_info struct to aux_usage_info.
    Drop the justification for each aux_usage_info field.
    Split out the NONE case in write function.
    Restructure tests to more easily confirm coverage.
    Rename access_compressed field to compressed.
    Make write behavior less ambiguous.
v5. (Jason)
    Add more detail above WRITES_RESOLVE_AMBIGUATE.
    Add ISL_AUX_USAGE_MC to WritesResolveAmbiguate.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2957>

freedreno/ir3: Lower output precision

This lowers mediump FS outputs to fp16 in the ir3 backend. For now
this is a modest improvement, which mostly helps us whittle down the
full mediump work.  Once the GLSL level support lands, then right hand
side of the store output intrinsics will be fp16 expressions and we'll
cancel out the fp16 -> fp32 -> fp 16 round trip here.

We've had different attempts at implementing this: rewriting stores in
the GLSL IR, lowering GLSL IR outputs to temporaries and inserting
conversions when writing the temporaries to the outputs.  In the end,
GLSL ends up getting in the way a lot and doing it at the nir level is
easier and still possible since we have the output var precisions.

This part of the fp16 work is more of a step on the way towards full
fp16 support and will add a few extra conversion instructions:

total instructions in shared programs: 8151 -> 8163 (0.15%)
instructions in affected programs: 1187 -> 1199 (1.01%)
helped: 4
HURT: 10

total nops in shared programs: 3146 -> 3152 (0.19%)
nops in affected programs: 563 -> 569 (1.07%)
helped: 5
HURT: 10

total non-nops in shared programs: 5005 -> 5011 (0.12%)
non-nops in affected programs: 92 -> 98 (6.52%)
helped: 0
HURT: 3

total dwords in shared programs: 12832 -> 12800 (-0.25%)
dwords in affected programs: 96 -> 64 (-33.33%)
helped: 1
HURT: 0

total last-baryf in shared programs: 118 -> 115 (-2.54%)
last-baryf in affected programs: 21 -> 18 (-14.29%)
helped: 1
HURT: 0

total full in shared programs: 424 -> 417 (-1.65%)
full in affected programs: 15 -> 8 (-46.67%)
helped: 7

HURT: 0
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

nir/types: Add glsl_float16_type() helper

This returns the float16 version of a float type.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

freedreno/ir3: handle half registers for arrays during register allocation.

So far we only handle full regs of arrays during pre-allocation.
This patch is to handle half regs of arrays and also consider the size
of half regs when finding out conflicts.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

nir: Add optimization for doing removing f16/f32 conversions

This eliminates conversions between f16 and f32 where possible. We can
always remove an upcast followed by a down cast, that is:

  f2f16 ( f2f32 (a) )  ->  a
  f2fmp ( f2f32 (a) )  ->  a

In the other direction, f2f16 loses precision and can't be undone by a
f2f32.  However, by definition it's always safe to elminate f2fmp:

  f2f32 ( f2fmp (a) )  ->  a

v2. [Neil Roberts (nroberts@igalia.com)]

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

freedreno/ir3: Add new ir3 pass to fold out fp16 conversions

This pass tries to fold f2f16 conversion into alu instructions.
This will be useful to help reduce the number of instructions once
mesa starts supporting precision lowering.  For example:

  add.f r0.w, r0.w, c0.x
  cov.f32f16 hr2.x, r0.w

to

  add.f hr2.x, r0.w, c0.x

Additionally this pass also tries to fold f2f16 conversion into load_input
instruction:

  bary.f r0.x, 3, r0.w
  cov.f32f16 hr0.x, r0.x

to

  bary.f hr1.x, 3, r0.x

v2: Edit to not fold OPC_MAX_F and OPC_MIN_F, since that's not valid.

v3: Add OPC_ABSNEG_F to the blacklist as well.

v4: Don't remove dead cov instructions, DCE will do that later; don't
iterate through sources when a cov only has one; remove special
handling of IR3_REG_ARRAY and IR3_REG_RELATIV.

v5: Handle folding into u32.u32 movs of floats correctly, don't bail
out on IR3_REG_RELATIV or IR3_REG_ARRAY movs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

nir/opcodes: Add nir_op_f2fmp

This opcode is the same as the f2f16 opcode except that it comes with
a promise that it is safe to optimise it out if the result is
immediately converted back to a 32-bit float again. Normally this
would be a lossy conversion and so it would be visible to the
application, but if the conversion is generated as part of the mediump
lowering process then this removal doesn’t matter. The opcode is
eventually replaced with a regular f2f16 in the late optimisations so
the backends don’t need to handle it.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3822>

glapi/copyimage: Implement CopyImageSubDataNV

Implement CopyImageSubDataNV from NV_copy_image spec.
This is derived out of the existing implementation of CopyImageSubData.
It differs from CopyImageSubData in accordance with the differences
laid down in the ARB_copy_image spec.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3649>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3649>

iris: Fix import sync-file into syncobj

When importing a sync-file, the kernel expects to be told which syncobj
to replace with the new fence -- it does not automatically create a new
handle for us. Abide by this rule and create a new syncobj for the
imported sync-file.

Fixes: f459c56be6bf ("iris: Add fence support using drm_syncobj")
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3919>

pan/midgard: Implement load/store_shared

Shared memory is implemented almost identically to global memory from an
ISA perspective, so let's handle the new intrinsics. We include a code
path for constant offsets, which doesn't come up for globals.

Fixes dEQP-GLES31.functional.compute.basic.shared_var_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>

pan/midgard: Implement nir_intrinsic_get_buffer_size

We route it as a sysval. Fixes dEQP-GLES31.functional.compute.basic.ssbo_unsized_arr_single_invocation

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>

pan/midgard: Lower SSBOs in NIR

We need to lower SSBOs to globals regardless. Rather than do this in our
backend like we do now, use the common NIR pass, which will support
bounds checking.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3775>

turnip/pipeline: Don't assume tu_shader is a valid object

Fixes a crash in tu6_emit_fs_config() when 'shader' argument is
assumed to be non-null, which is possible.

Fixes dEQP test:

dEQP-VK.api.descriptor_set.descriptor_set_layout_lifetime.graphics

Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3756>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3756>

radv: add the trace BO to the BO list at submit time

Instead of adding it in every command buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3891>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3891>

gallium/swr: Fix min/max range index draw

Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3905>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3905>

iris: Set MOCS for constant packets on Gen12+

It seems to be back, and we shouldn't use 0, as that's now considered
an error.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>

iris: Fix BLORP vertex buffers to respect ISL MOCS settings

Fixes: a4da6008b6a ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>

iris: Make mocs an inline helper in iris_resource.h

Now that it uses ISL rather than genxml code, there's no need for it to
live as a vtable function inside the state module.  We can just make it
a static inline helper in iris_resource.h so it's available throughout
the codebase.

Fixes: a4da6008b6a ("iris: Use mocs from isl_dev.")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3720>

ci: Remove a useless filtering of the lava logs.

We don't print every case any more, so no need to filter them out.  This
makes it so the output form "lavacli jobs logs" gets line-buffered into
"tee" and you can actually see what happened when the job is stuck but
before it times out.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>

ci: Don't bother generating deqp junit results since we don't present it.

We disabled presentation a while back because it's so expensive for gitlab
to parse it on the other side.  We may have a use for it some day if
gitlab gets better, but for now let's not spend the time processing it.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>

ci: Document how LAVA runners work.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>

ci: Make LAVA job fails emit the full list of unexpected test results.

When bringing up a new board or starting a new GLES version, we have a lot
of unexpected fails to document, so we need the full list in the log (not
just deqp-runner.sh's head -n 50) so we can populate the xfail list.

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>

ci: Make sure that we have a proper shell prompt for LAVA.

LAVA finds a '#' early in boot and races to emit its shell commands.
Apparently for the current boards those serial commands end up getting
buffered such that things work out, but for db410c and db820c, the buffer
is lost and LAVA gets stuck waiting for the prompt.  By setting a prompt,
we can delay our commands until we're actually supposed to emit them (and
suppress a complaint from the lava dispatcher that we're using a risky
prompt!)

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>

ci: prepare-artifacts: Make the indent here match previously in the file

Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3883>

anv: Add pipe_state_for_stage() helper

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>

anv: Use intel_debug_flag_for_shader_stage()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>

spirv: Be consistent when checking for Shader/Kernel

Use == and != instead of the ordered comparisons.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3911>

spirv: Remove outdated SPIR-V decoration warnings

spirv_to_nir warns if it encounters XFB decorations and errors if
it encounters a Stream decoration with value other than 0, despite
the fact that these decorations are in fact handled correctly.

Fixes dEQP-VK.transform_feedback.simple.query_1_*
Fixes: cd4a14be06 "spirv: Handle XFB variable decorations"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3910>

nir/builder: Return an integer from nir_get_texture_size

It's convenient in a bunch of cases for nir_get_texture_size to return a
float but it's very unexpected.  This fixes a bug in the R600 NIR code.

Fixes: f718ac62688b "r600/sfn: Add a basic nir shader backend"
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>

nir: Fix the nir_builder include path for nir_builtin_builder

Because it's in double-quotes, it will search the current folder before
any search paths.  Since nir_builder.h and nir_builtin_builder.h are in
the same folder, this guarantees a correct include.  However,
nir/nir_builder.h does not unless the includer's path is set up just
right.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3897>

util: Change os_same_file_description return type from bool to int

This allows communicating that it wasn't possible to determine whether
the two file descriptors reference the same file description. When
that's the case, log a warning in the amdgpu winsys.

In turn, remove the corresponding debugging output from the fallback
os_same_file_description implementation. It depends on the caller if
false negatives are problematic or not.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>

winsys/amdgpu: Make local variable r signed

This is consistent with the return type of the functions whose return
values we assign to it.

No functional change intended.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3879>

nir/lower_ssbo: handle atomics

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>

nir: Add SSBO->global lowering pass

To facilitate lowering SSBOs to globals, we need a load_ssbo_address
intrinsic. This intrinsic takes an SSBO index and loads the address in
global memory of the SSBO (likely implemented via a uniform in the
driver). In the future, we'll support bounds checking, but at the moment
this is not supported (this pass should only be used for trusted
contexts at the moment, i.e. contexts without robustness extensions).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2753>

panfrost: Rewrite texture descriptor creation logic

Rather than creating partially within the Gallium create function and
monkeypatching on draw time with code split across N different files
with tight Gallium dependencies, let's streamline everything into a
series of maintainable routines in mesa/src/panfrost with no Gallium
dependencies, doing the entire texture creation in one-shot and thus
adding absolutely zero draw-time overhead (since we can allocate a BO
for the descriptor and upload ahead-of-time, so switching textures is as
cheap as switching pointers).

Was this worth it? You know, I'm not sure :|

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>

panfrost: Move format translation to root

Since PIPE formats are now shared across Mesa we can do this, and the
routines themselves are good enough code that I'm happy to move them
here. We'll use them momentarily.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>

panfrost: Move pan_afbc.c to root

Now that PIPE formats are shared across Mesa, this well-documented piece
of code is a good fit for root panfrost, let's move it and get a little
closer to taming the mess of resources.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>

panfrost: Move checksum routines to root panfrost

These are Gallium-independent and clean code; as is tradition, let's
hoist them up out of the Gallium driver as a bit of yak shaving as we
prepare to untangle the monster that is pan_resource.c

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3858>

util: promote u_debug_memory.c to src/util

When os_memory_debug.h was promoted to src/util, this source-file on
which it depends on when the debug-flag is set on windows was left
out. So let's move this also.

It doesn't seem there's any way of triggering this issue right now, but
it seems better to correct this to avoid this from biting us in the ass
in the future.

Fixes: 88c4680b5a5 ("util: promote u_memory to src/util")
Reviewed-by: Dylan Baker <dylan@pnwbakers>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3844>

lima: implement PLB PP stream cache

Generating PLB PP stream is expensive. PLB PP stream content depends on
damage, and if damage consists of several rects it's impossible to come
up with a simple key.

Simplify damage to a single bounding box so we have a simple key
and cache PLB PP stream. Cache size is limited to 0.1% of system RAM and
once limit is reached least recently used entries are dropped.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3834>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3834>

docs: Update index, relnotes, and release-calendar for 20.0

This includes the release schedule for 20.0.x. Currently there are four
planned releases, but I assume we'll need more before 20.1.0 is ready.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>

Docs: Add 20.0.0 release notes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3896>

radv: use RADEON_FLAG_ZERO_VRAM when creating the trace BO

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>

radv/winsys: add a new flag that requests zerovram allocations

This introduces RADON_FLAG_ZERO_VRAM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3888>

gallivm: fix crash in emit_get_buffer_size

Seems a bit odd we extract a value from a vector in the first place
(as we always extract the first element), but llvm asserts if using
a zero-vector instead of zero as the index element.
Fixes piglit crashes for example in arb_shader_storage_buffer_object-layout-std140-write-shader.

Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>

gallivm: fix crash with bptc border color sampling

bptc uses fallback for decoding, but still need to handle border color
properly.

v2: adjust piglit gitlab-ci expectations

Reviewed-by: Brian Paul <brianp@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3886>

aco: improve GFX9 1D ddx/ddy assertion

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2547
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3890>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3890>

pan/midgard: Identify clamp(x, -1.0, 1.0) flag

So *that's* what's .unk2 was about :)

We still need to add an opt pass for it, but we can do that further down
the line.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3892>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3892>

panfrost: Remove flush_frontbuffer

A relic from software rasterizers. Hardware drivers generally don't need
to implement this.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3878>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3878>

panfrost: LogicOp support

The generated shaders are definitely not optimal, but for a feature
hardly anyone uses, it's probably good enough.

The XScreensaver demos quasicrystal, blitspin, bouboule, crystal and
munch now seem to work, with no obvious problems.

Currently this only works for 8-bit textures.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3887>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3887>

i965: Do not generate D16 B5G6R5_UNORM configs on gen < 8

We don't support MESA_FORMAT_Z_UNORM16 before Gen8, see
intel_screen_init_surface_formats.

As a consequence disables B5G6R5_UNORM configs with depth
on gen < 6.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2275
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3206>

gitlab-ci: Automated testing with OpenGL traces

Introduce automated testing of Mesa by replaying traces with Renderdoc
or Apitrace.

For now only LLVMPipe is tested, but other drivers can be tested if
there's runners with the necessary hardware.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>

gitlab-ci: Disable the lima job for now

Some dEQP tests have started passing and it's taking a while to update
the expectations and skips list.

Disable for now so CI doesn't fail and stuff can be merged.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2935>

util: remove the dependency on kcmp.h

Fixes: f76cbc7901f7 "util: Add os_same_file_description helper"
Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3860>

intel/fs: Correctly handle multiply of fsign with a source modifier

The other source of the multiply will be interpreted as a uint32_t in an
XOR instruction.  Any source modifiers with either not be interpreted at
all or will be misinterpreted due to the differing types.

If the other operand of the multiplication has a source modifier, just
emit an extra move to resolve the source modifiers.

The negation source modifier problem is difficult to reproduce due to an
algebraic optimization that changes (-a*b) to -(a*b).  However, changes
in MR !1359 push the negations back down.

On Gen7+ it might be possible to do slightly better for an abs() source
modifier by using BFI2 as a glorified copysign().

On Gen8+ it might be possible to do slightly better for a neg() source
modifier by emitting (~a ^ b).

There were no shader-db changes on any Intel platform, so I think we can
deal with that problem when it arises.

See also piglit!224.

Fixes: 06d2c116415 ("intel/fs: Add a scale factor to emit_fsign")
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3780>

gallium/auxiliary/vl: fix bob compute shaders for deint yuv

Scales the Y-axis by 2 when using the Bob deinterlace filter.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2523
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3857>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3857>

radeonsi: Fix compute copies for subsampled formats.

We cannot do image stores (or render) to subsampled formats.

Reinterpret as R32_UINT instead.

si_set_shader_image_desc already uses the blockwidth from
the view formats, so the image width adjustments are
already implemented.

This is still icky with mipmapping on GFX9+ though, but
since it is mostly a video format I don't think that will
be much of an issue and broken mipmapping is still better
than broken everything.

Fixes: e5167a9276d "radeonsi: disable SDMA on gfx8 to fix corruption on RX 580"
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2535
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3853>

turnip: add option to force use of hw binning

For running deqp tests which have small render sizes and don't otherwise
get coverage of hw binning / multiple tiles.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3851>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3851>

docs: Mark 20.0.0-rc3 as done

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>

docs: Mark 19.3.4 as done

The calendar had an error, 19.3.4 and 19.3.5 had the same release date.
I've fixed the date for 19.3.5 and removed 19.3.6 which I don't believe
will be needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>

docs: Add SHA256 sum for 19.3.4

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>

docs: Add release notes for 19.3.4

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3819>

anv: Drop anv_image.c:get_surface()

It was called exactly once, and even there it returned the wrong surface
in a corner case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3882>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3882>

nir/search: Use larger type to hold linearized index

"index" is an offset into a linearized 3-dimensional array.  Starting
with fbd5359a0a6, the 3-dimensional array can have 43 elements in each
dimension.  43**3 = 79507, and that will overflow the uint16_t.

See also the discussion in MR !3765.

Fixes: fbd5359a0a6 ("nir/algebraic: Rearrange bcsel sequences generated by nir_opt_peephole_select")
Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3871>

gallium/util: remove unused u_surfaces.c/h

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>

main/get: Converted type conversion macros to inline functions

Quiet warnings when called with a GLubyte:

  src/mesa/main/get.c:3215:19: warning: result of comparison of constant 32767 with expression of type 'GLubyte' (aka 'unsigned char') is always false [-Wtautological-constant-out-of-range-compare]
      params[0] = INT_TO_FIXED(((GLubyte *) p)[0]);
                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  src/mesa/main/get.c:78:38: note: expanded from macro 'INT_TO_FIXED'
                                 ~~~ ^ ~~~~~~~~

Delete ENUM_TO_INT64, ENUM_TO_FIXED and BOOLEAN_TO_INT64 which aren't
used.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>

Mark a few static inline helpers with ASSERTED

Quiet warnings in release builds where these look unused.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3866>

mesa/draw: Make sure all the unused fields are initialized to zero

Not initializing prim.indexed caused a few thousand failures on Intel
drivers.

I also compared the generated assembly with this change and before
a6d31589097.  The code is still somewhat improved, which I am assuming
was the original goal. _mesa_DrawArrays, for example, appears to drop an
instruction or two... though the body of the function is only one byte
shorter.

MR !3591 will eventually delete the uninitialized fields.  However, I
believe that explicitly initializing the whole thing is more future
proof.  This ensures that if someone adds fields in the future, they
will also be initialized.  Once the extra fields are removed, the two
implementations should generate idential code.

Fixes: a6d31589097 ("mesa: don't use memset in glDrawArrays")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3870>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3870>

mesa: Fix FLUSH_VERTICES in SubpixelPrecisionBiasNV.

The FLUSH_VERTICES macro is supposed to be called before the current
context state is changed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>

panfrost: Remove old hack

I don't know why I thought this was needed.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>

panfrost: Remove old comment

We already handle primitive restart earlier in the function.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>

panfrost: Remove dirty tracking

We never really respected it and it doesn't quite make sense for Mali
the way it was previously setup. The correct solution is to do push as
much code into CSO creation as possible.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3855>

aco: add some helpers for filling/testing register ranges

We do this a lot

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>

aco: add RegisterFile

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3768>

st/vdpau: Only call is_video_format_supported hook if needed

Namely only if *is_supported is true, otherwise the hook result can't
affect it.

Avoids

../src/gallium/state_trackers/vdpau/vdpau_private.h:138: FormatYCBCRToPipe: Assertion `0' failed.

with assertions enabled.

Fixes: 5d5b414a7b84 "st/vdpau: fix chroma_format handling in
                     VideoSurfaceQueryGetPutBitsYCbCrCapabilities"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3848>

iris: Do not dereference nullptr with pipe_reference

../src/gallium/drivers/iris/iris_fence.h:54:8: runtime error: member access within null pointer of type 'struct iris_syncpt'

../src/gallium/drivers/iris/iris_fence.c:136:8: runtime error: member access within null pointer of type 'struct pipe_fence_handle'

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>

glsl/blob: Do not call memcpy if there is nothing to copy

../src/util/blob.c:166:7: runtime error: null pointer passed as argument 2, which is declared to never be null
    #0 0x7fe51bc315df in blob_write_bytes ../src/util/blob.c:166
    #1 0x7fe51c7a7b9a in iris_disk_cache_store ../src/gallium/drivers/iris/iris_disk_cache.c:115
    #2 0x7fe51c7f444d in iris_compile_fs ../src/gallium/drivers/iris/iris_program.c:1693
    #3 0x7fe51c7fdcd9 in iris_create_fs_state ../src/gallium/drivers/iris/iris_program.c:2331
    #4 0x7fe519e871a3 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1275
    #5 0x7fe519e89dd0 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1435
    #6 0x7fe519ed51e1 in st_update_fp ../src/mesa/state_tracker/st_atom_shader.c:163
    #7 0x7fe519eb5d73 in st_validate_state ../src/mesa/state_tracker/st_atom.c:261
    #8 0x7fe519e4e0bf in prepare_draw ../src/mesa/state_tracker/st_draw.c:132
    #9 0x7fe519e4e76e in st_draw_vbo ../src/mesa/state_tracker/st_draw.c:184
    #10 0x7fe51aca5245 in vbo_save_playback_vertex_list ../src/mesa/vbo/vbo_save_draw.c:215
    #11 0x7fe51a25b1cc in ext_opcode_execute ../src/mesa/main/dlist.c:1126
    #12 0x7fe51a2f8d58 in execute_list ../src/mesa/main/dlist.c:11830
    #13 0x7fe51a34b2d0 in _mesa_CallList ../src/mesa/main/dlist.c:14267

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>

intel/bufmgr: Cast bitshift to unsigned

../src/mesa/drivers/dri/i965/intel_buffer_objects.c:405:4: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
    #0 0x7f9404ac4ae1 in brw_map_buffer_range ../src/mesa/drivers/dri/i965/intel_buffer_objects.c:405
    #1 0x7f9405a9cb13 in vbo_save_map_vertex_store ../src/mesa/vbo/vbo_save_api.c:261
    #2 0x7f9405b6a89d in vbo_save_NewList ../src/mesa/vbo/vbo_save_api.c:1774
    #3 0x7f94051aba3d in _mesa_NewList ../src/mesa/main/dlist.c:14172

../src/gallium/drivers/iris/iris_resource.c:1725:61: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'
    #0 0x7fe51c820c8e in iris_map_direct ../src/gallium/drivers/iris/iris_resource.c:1725
    #1 0x7fe51c82322c in iris_transfer_map ../src/gallium/drivers/iris/iris_resource.c:1895
    #2 0x7fe5202628be in u_transfer_helper_transfer_map ../src/gallium/auxiliary/util/u_transfer_helper.c:243
    #3 0x7fe51997c508 in pipe_buffer_map_range ../src/gallium/auxiliary/util/u_inlines.h:344
    #4 0x7fe51997ec8d in u_upload_alloc_buffer ../src/gallium/auxiliary/util/u_upload_mgr.c:221
    #5 0x7fe51997f24f in u_upload_alloc ../src/gallium/auxiliary/util/u_upload_mgr.c:254
    #6 0x7fe51ccf43af in upload_state ../src/gallium/drivers/iris/iris_state.c:323
    #7 0x7fe51d06963a in gen9_init_state ../src/gallium/drivers/iris/iris_state.c:7516
    #8 0x7fe51c7c2ea0 in iris_create_context ../src/gallium/drivers/iris/iris_context.c:294
    #9 0x7fe519dc729b in st_api_create_context ../src/mesa/state_tracker/st_manager.c:921
    #10 0x7fe5198c47ea in dri_create_context ../src/gallium/state_trackers/dri/dri_context.c:161
    #11 0x7fe519898aac in driCreateContextAttribs ../src/mesa/drivers/dri/common/dri_util.c:475

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>

intel/compiler: Do not qsort zero sized array

../src/intel/compiler/brw_nir_analyze_ubo_ranges.c:316:4: runtime error: null pointer passed as argument 1, which is declared to never be null
    #0 0x7f78f5916611 in brw_nir_analyze_ubo_ranges ../src/intel/compiler/brw_nir_analyze_ubo_ranges.c:316
    #1 0x7f78f255c189 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:97
    #2 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #3 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #4 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #5 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #6 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #7 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #8 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #9 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #10 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #11 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #12 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>

brw_fs: Avoid zero size vla

../src/intel/compiler/brw_fs.cpp:2247:46: runtime error: variable length array bound evaluates to non-positive value 0
    #0 0x7f78f5697678 in fs_visitor::assign_constant_locations() ../src/intel/compiler/brw_fs.cpp:2247
    #1 0x7f78f571d29e in fs_visitor::optimize() ../src/intel/compiler/brw_fs.cpp:7361
    #2 0x7f78f574eb84 in fs_visitor::run_fs(bool, bool) ../src/intel/compiler/brw_fs.cpp:8022
    #3 0x7f78f575641b in brw_compile_fs ../src/intel/compiler/brw_fs.cpp:8408
    #4 0x7f78f255c8e4 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:123
    #5 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #6 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #7 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #8 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #9 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #10 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #11 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #12 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #13 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #14 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #15 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>

brw_nir: Cast bitshift to unsigned

../src/intel/compiler/brw_nir.c:979:40: runtime error: left shift of 1 by 31 places cannot be represented in type 'int'
    #0 0x7f78f590d10b in brw_nir_apply_sampler_key ../src/intel/compiler/brw_nir.c:979
    #1 0x7f78f590e07b in brw_nir_apply_key ../src/intel/compiler/brw_nir.c:1057
    #2 0x7f78f5754b45 in brw_compile_fs ../src/intel/compiler/brw_fs.cpp:8347
    #3 0x7f78f255c8e4 in brw_codegen_wm_prog ../src/mesa/drivers/dri/i965/brw_wm.c:123
    #4 0x7f78f2565571 in brw_fs_precompile ../src/mesa/drivers/dri/i965/brw_wm.c:608
    #5 0x7f78f24edd2c in brw_shader_precompile ../src/mesa/drivers/dri/i965/brw_link.cpp:56
    #6 0x7f78f24f3af8 in brw_link_shader ../src/mesa/drivers/dri/i965/brw_link.cpp:381
    #7 0x7f78f39a302a in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3119
    #8 0x7f78f3a43826 in create_new_program ../src/mesa/main/ff_fragment_shader.cpp:1133
    #9 0x7f78f3a43d00 in _mesa_get_fixed_func_fragment_program ../src/mesa/main/ff_fragment_shader.cpp:1163
    #10 0x7f78f325ddcd in update_program ../src/mesa/main/state.c:134
    #11 0x7f78f325fe64 in _mesa_update_state_locked ../src/mesa/main/state.c:360
    #12 0x7f78f32600f1 in _mesa_update_state ../src/mesa/main/state.c:394
    #13 0x7f78f2b3e587 in clear ../src/mesa/main/clear.c:169
    #14 0x7f78f2b3e587 in _mesa_Clear ../src/mesa/main/clear.c:242

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3825>

docs/envvars: document RADV_TEX_ANISO

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2524
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3873>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3873>

gallium: Only define PIPE_ALIGNSTACK on x86.

At least arm and arm64 don't respect this attribute, producing compiler
warnings in lp_test_format.c.  The gcc and LLVM docs for the attribute
only talk about them being needed on x86.

Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>

llvmpipe: Fix another uninitialized value warning, on init_val.

It's only used in the vote_ieq paths, but gcc doesn't see that.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>

llvmpipe: Silence uninitialized variable warning about "scissor"

nr_planes is only > 3 when scissor is enabled, but gcc doesn't see it.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>

llvmpipe: Silence uninitialized variable warning about "vals"

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>

llvmpipe: Fix warning about uninitialized "op" in the NIR path.

Similar to TGSI, move the switch statement and use more unreachable().

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3867>