Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 13:00:52 +0000 (14:00 +0100)]
add gpio rules
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 12:02:37 +0000 (13:02 +0100)]
add pinmap out
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 11:41:28 +0000 (12:41 +0100)]
add pin rules
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 10:58:24 +0000 (11:58 +0100)]
make mux/cell connections
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 10:34:29 +0000 (11:34 +0100)]
add make cell connection rule
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 10:22:12 +0000 (11:22 +0100)]
add pinmux cell connections
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 10:13:50 +0000 (11:13 +0100)]
add pinmux cell connections
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 10:00:01 +0000 (11:00 +0100)]
bit of a mess, adding mk_connection to deal with double-interface mux+gpio
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 08:05:25 +0000 (09:05 +0100)]
add more mk_connections
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 08:00:40 +0000 (09:00 +0100)]
add mk_connection
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 07:39:15 +0000 (08:39 +0100)]
use function abstraction, reduce code a bit
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 07:35:33 +0000 (08:35 +0100)]
use function abstraction, reduce code a bit
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 06:56:41 +0000 (07:56 +0100)]
add mkslow_peripherals
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 06:55:31 +0000 (07:55 +0100)]
add mkslow_peripherals
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 06:50:06 +0000 (07:50 +0100)]
add mkslow_peripherals
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 06:34:49 +0000 (07:34 +0100)]
pep8 cleanup
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 06:34:33 +0000 (07:34 +0100)]
split out peripheral interfaces to separate classes
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 06:04:20 +0000 (07:04 +0100)]
add axi fn_address_mapping
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 05:50:47 +0000 (06:50 +0100)]
pep8 cleanup
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 05:50:27 +0000 (06:50 +0100)]
add axi slave definitions
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 05:35:00 +0000 (06:35 +0100)]
add axi slave idx generator
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 05:28:44 +0000 (06:28 +0100)]
pep8 whitespace cleanup
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 05:27:53 +0000 (06:27 +0100)]
add axi4 reg #defines
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 05:11:44 +0000 (06:11 +0100)]
add `define generator
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 05:06:35 +0000 (06:06 +0100)]
add `define generator
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 04:58:14 +0000 (05:58 +0100)]
add axi 32-bit reg fn
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 04:52:25 +0000 (05:52 +0100)]
add slow peripheral generation, fix python3, and whitespace
yes i know, not supposed to do multi-purpose commit....
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 03:58:11 +0000 (04:58 +0100)]
cut over intr decls
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 03:49:52 +0000 (04:49 +0100)]
add start of peripheral generation
Luke Kenneth Casson Leighton [Fri, 20 Jul 2018 03:33:58 +0000 (04:33 +0100)]
rename minitest bank b to bank a
Luke Kenneth Casson Leighton [Thu, 19 Jul 2018 12:35:55 +0000 (13:35 +0100)]
add qspi peripheral
Neel [Tue, 17 Jul 2018 13:14:50 +0000 (18:44 +0530)]
plic integration
Neel [Tue, 17 Jul 2018 13:11:31 +0000 (18:41 +0530)]
plic integration
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 12:33:06 +0000 (13:33 +0100)]
fix pwm compile
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 11:51:21 +0000 (12:51 +0100)]
add i2c in connection
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 11:45:27 +0000 (12:45 +0100)]
add i2c0 and correct errors
Neel [Tue, 17 Jul 2018 11:19:18 +0000 (16:49 +0530)]
slow_peripherals.bsv
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 10:53:43 +0000 (11:53 +0100)]
add rs232 uart
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 10:49:10 +0000 (11:49 +0100)]
fix compile errors
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 09:53:09 +0000 (10:53 +0100)]
add code to get slow_peripherals to compile
rishucoding [Tue, 17 Jul 2018 09:58:12 +0000 (15:28 +0530)]
Merge branch 'master' of libre-riscv.org:/pinmux
rishucoding [Tue, 17 Jul 2018 09:57:56 +0000 (15:27 +0530)]
replacing remaining pwmnum
rishucoding [Tue, 17 Jul 2018 09:52:41 +0000 (15:22 +0530)]
revert back to PWMWIDTH from pwmnum in pwm.bsv
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 09:49:28 +0000 (10:49 +0100)]
add code to get slow_peripherals to compile
Neel [Tue, 17 Jul 2018 09:10:45 +0000 (14:40 +0530)]
template for slow-peripherals done. need automation. gpio config is decouple from func as well.
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 07:54:57 +0000 (08:54 +0100)]
add instance
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 06:04:25 +0000 (07:04 +0100)]
attempting pwm compile
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:49:03 +0000 (06:49 +0100)]
add pwm test Makefile
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:45:06 +0000 (06:45 +0100)]
add extra instance params PADDR Reg_width
rishucoding [Tue, 17 Jul 2018 05:54:43 +0000 (11:24 +0530)]
correction in awaddr in mux.bsv
rishucoding [Tue, 17 Jul 2018 05:51:45 +0000 (11:21 +0530)]
Merge branch 'master' of libre-riscv.org:/pinmux
rishucoding [Tue, 17 Jul 2018 05:50:49 +0000 (11:20 +0530)]
added comments in mux.bsv
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:35:44 +0000 (06:35 +0100)]
remove PWMWIDTH define
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:21:24 +0000 (06:21 +0100)]
whitespace cleanup
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:19:53 +0000 (06:19 +0100)]
continue adding pwmnum argument
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:19:37 +0000 (06:19 +0100)]
whitespace cleanup
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:05:36 +0000 (06:05 +0100)]
whitespace cleanup
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 05:00:13 +0000 (06:00 +0100)]
whitespace cleanup
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 04:58:24 +0000 (05:58 +0100)]
add pwmnum as parameter
Luke Kenneth Casson Leighton [Tue, 17 Jul 2018 04:53:06 +0000 (05:53 +0100)]
need pwm.bsv peripheral, to be modified to take a parameter of num of pwms
rishucoding [Tue, 17 Jul 2018 04:22:18 +0000 (09:52 +0530)]
added template for slow peripherals
Neel [Mon, 16 Jul 2018 13:18:25 +0000 (18:48 +0530)]
generate instance defines, fix lots of random typos
Neel [Mon, 16 Jul 2018 13:01:46 +0000 (18:31 +0530)]
getting bsv compile working
Neel [Mon, 16 Jul 2018 12:49:25 +0000 (18:19 +0530)]
stop myhdl being necessary
Luke Kenneth Casson Leighton [Mon, 16 Jul 2018 11:14:19 +0000 (12:14 +0100)]
pep8 whitespace cleanup
Luke Kenneth Casson Leighton [Mon, 16 Jul 2018 11:13:38 +0000 (12:13 +0100)]
auto-generate bus.bsv with new GPIO/MUX configs
Luke Kenneth Casson Leighton [Mon, 16 Jul 2018 10:47:08 +0000 (11:47 +0100)]
start integrating gpio / mux bus generation
Luke Kenneth Casson Leighton [Mon, 16 Jul 2018 10:43:09 +0000 (11:43 +0100)]
whoops must delete type field before passing to bsv Pin class
Neel [Mon, 16 Jul 2018 10:25:06 +0000 (15:55 +0530)]
both instances of mux and gpio should be in the same module and interface definition
Luke Kenneth Casson Leighton [Mon, 16 Jul 2018 09:48:37 +0000 (10:48 +0100)]
convert mux to interface style same as gpio
Neel [Mon, 16 Jul 2018 09:22:49 +0000 (14:52 +0530)]
parametrized the config interfaces to better usability
Luke Kenneth Casson Leighton [Mon, 16 Jul 2018 09:03:00 +0000 (10:03 +0100)]
split instance from gpio
Neel [Mon, 16 Jul 2018 08:45:42 +0000 (14:15 +0530)]
parameterized modules for mux and gpio
Neel [Mon, 16 Jul 2018 06:51:20 +0000 (12:21 +0530)]
makefile for gpio and removing dependent files in gpio
Neel [Mon, 16 Jul 2018 06:44:09 +0000 (12:14 +0530)]
adding initial draft of gpio
Luke Kenneth Casson Leighton [Sun, 15 Jul 2018 06:38:20 +0000 (07:38 +0100)]
myhdl experimentation
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 06:51:16 +0000 (07:51 +0100)]
pep8 cleanu
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 06:48:54 +0000 (07:48 +0100)]
hack up a python module for myhdl
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 05:54:34 +0000 (06:54 +0100)]
rename myhdlgen import
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 05:48:45 +0000 (06:48 +0100)]
move myhdl to myhdlgen directory
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 05:48:07 +0000 (06:48 +0100)]
start adding myhdl IO class
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 04:46:31 +0000 (05:46 +0100)]
whitespace pep8 cleanup
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 04:45:23 +0000 (05:45 +0100)]
whitespace pep8 cleanup
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 04:42:41 +0000 (05:42 +0100)]
adding code in cut/paste style from bsv to get class structures ready
for myhdl
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 04:30:02 +0000 (05:30 +0100)]
move cell bit width function to Parse class
Luke Kenneth Casson Leighton [Tue, 10 Jul 2018 04:10:23 +0000 (05:10 +0100)]
shuffle interface-reading code around to create InterfacesBase class
(use for myhdl as well)
Luke Kenneth Casson Leighton [Mon, 9 Jul 2018 11:51:19 +0000 (12:51 +0100)]
add testbench argument, switch off for muxer conversion
rishucoding [Mon, 9 Jul 2018 10:50:07 +0000 (16:20 +0530)]
Merge branch 'master' of libre-riscv.org:/pinmux
rishucoding [Mon, 9 Jul 2018 10:48:58 +0000 (16:18 +0530)]
correction in TestFailure log message
Luke Kenneth Casson Leighton [Mon, 9 Jul 2018 04:46:13 +0000 (05:46 +0100)]
class objects can contain signals at the top level
Luke Kenneth Casson Leighton [Mon, 9 Jul 2018 04:32:57 +0000 (05:32 +0100)]
auto-generate top-level module which accepts multiple class objects
Luke Kenneth Casson Leighton [Mon, 9 Jul 2018 02:13:39 +0000 (03:13 +0100)]
modify test2 to take one argument: array of inputs
Luke Kenneth Casson Leighton [Mon, 9 Jul 2018 02:04:30 +0000 (03:04 +0100)]
add test module which is dynamically created
Luke Kenneth Casson Leighton [Fri, 6 Jul 2018 20:37:56 +0000 (21:37 +0100)]
pep8 whitespace cleanup
rishucoding [Fri, 6 Jul 2018 16:46:16 +0000 (22:16 +0530)]
outen is 0 when iopad is supplying input
rishucoding [Fri, 6 Jul 2018 16:37:42 +0000 (22:07 +0530)]
adding cocotb test for multi pin single FN_out
rishucoding [Fri, 6 Jul 2018 16:33:21 +0000 (22:03 +0530)]
whoops.... restoring to commit
c4f99657f70
rishucoding [Fri, 6 Jul 2018 14:00:01 +0000 (19:30 +0530)]
Merge branch 'master' of libre-riscv.org:/pinmux
rishucoding [Fri, 6 Jul 2018 13:58:17 +0000 (19:28 +0530)]
adding cocotb test for multi pin single FN_out
Luke Kenneth Casson Leighton [Fri, 6 Jul 2018 02:39:12 +0000 (03:39 +0100)]
add myhdl experiments