mesa.git
6 years agomesa: Include unistd.h in program_lexer
Dylan Baker [Fri, 13 Apr 2018 16:01:29 +0000 (09:01 -0700)]
mesa: Include unistd.h in program_lexer

Which was previously provided implicitly by mtypes.h

CC: Marek Olšák <marek.olsak@amd.com>
CC: Mark Janes <mark.a.janes@intel.com>
Fixes: 43d66c8c2d4d3d4dee1309856b6ce6c5393682e5
       ("mesa: include mtypes.h less")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agoradeonsi: always prefetch later shaders after the draw packet
Marek Olšák [Tue, 3 Apr 2018 01:08:05 +0000 (21:08 -0400)]
radeonsi: always prefetch later shaders after the draw packet

so that the draw is started as soon as possible.

v2: only prefetch the API VS and VBO descriptors

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi: emit shader pointers before cache flushes & waits
Marek Olšák [Tue, 3 Apr 2018 00:43:23 +0000 (20:43 -0400)]
radeonsi: emit shader pointers before cache flushes & waits

This code was written with the constant engine in mind.
We can simplify it now.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi/gfx9: don't use the workaround for gather4 + stencil
Marek Olšák [Tue, 3 Apr 2018 19:20:04 +0000 (15:20 -0400)]
radeonsi/gfx9: don't use the workaround for gather4 + stencil

it doesn't seem to be needed.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi: disable TC-compat HTILE on Tonga and Iceland
Marek Olšák [Tue, 3 Apr 2018 23:32:12 +0000 (19:32 -0400)]
radeonsi: disable TC-compat HTILE on Tonga and Iceland

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi: force 2D tiling on VI only when TC-compat HTILE is really enabled
Marek Olšák [Tue, 3 Apr 2018 23:22:24 +0000 (19:22 -0400)]
radeonsi: force 2D tiling on VI only when TC-compat HTILE is really enabled

just pass the flag that indicates it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi: don't flush HTILE if there is no HTILE clear
Marek Olšák [Wed, 28 Mar 2018 01:19:15 +0000 (21:19 -0400)]
radeonsi: don't flush HTILE if there is no HTILE clear

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi: merge 2 identical if statements in si_clear
Marek Olšák [Wed, 28 Mar 2018 01:57:26 +0000 (21:57 -0400)]
radeonsi: merge 2 identical if statements in si_clear

and other cleanups

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi: don't do GFX-specific texture decompression for compute
Marek Olšák [Tue, 3 Apr 2018 01:30:41 +0000 (21:30 -0400)]
radeonsi: don't do GFX-specific texture decompression for compute

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoradeonsi: simplify generating the renderer string
Marek Olšák [Thu, 29 Mar 2018 14:40:30 +0000 (10:40 -0400)]
radeonsi: simplify generating the renderer string

HAVE_LLVM > 0 is a tautology.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agowinsys/amdgpu: allow local BOs on APUs
Marek Olšák [Wed, 28 Mar 2018 00:46:18 +0000 (20:46 -0400)]
winsys/amdgpu: allow local BOs on APUs

Local BOs ignore BO priorities, and we don't need those on APUs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agogetteximage: assume texture image is empty for non defined levels
Juan A. Suarez Romero [Thu, 12 Apr 2018 15:56:48 +0000 (15:56 +0000)]
getteximage: assume texture image is empty for non defined levels

Current code is returning an INVALID_OPERATION when trying to use
getTextureImage() on a level that has not been explicitly defined.

That is, we define a mipmapped Texture2D with 3 levels, and try to use
GetTextureImage() for the 4th levels, and INVALID_OPERATION is returned.

Nevertheless, such case is not listed as an error in OpenGL 4.6 spec,
section 8.11.4 ("Texture Image Queries"), where all the case errors for
this function are defined. So it seems this is a valid operation.

On the other hand, in section 8.22 ("Texture State and Proxy State") it
states:

  "Each initial texture image is null. It has zero width, height, and
   depth, internal format RGBA, or R8 for buffer textures, component
   sizes set to zero and component types set to NONE, the compressed
   flag set to FALSE, a zero compressed size, and the bound buffer
   object name is zero."

We can assume that we are reading this initialized empty image when
calling GetTextureImage() with a non defined level.

With this assumption, we will reach one of the other error cases defined
for the functions. In the end this means that we would end up returning
INVALID_VALUE to the caller.

This fixes arb_get_texture_sub_image piglit tests.

v2: just return INVALID_VALUE if there is no defined level (Iago)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
6 years agogettextureimage: verify cube map is complete
Juan A. Suarez Romero [Thu, 5 Apr 2018 09:00:46 +0000 (09:00 +0000)]
gettextureimage: verify cube map is complete

According to OpenGL 4.6 spec, section 8.11.4 ("Texture Image Queries"),
relative to errors for GetTexImage, GetTextureImage, and GetnTexImage:

  "An INVALID_OPERATION error is generated by GetTextureImage if the
   effective target is TEXTURE_CUBE_MAP or TEXTURE_CUBE_MAP_ARRAY, and
   the texture object is not cube complete or cube array complete,
   respectively."

This fixes arb_get_texture_sub_image piglit tests.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
6 years agogettextsubimage: verify zoffset and depth are correct
Juan A. Suarez Romero [Thu, 5 Apr 2018 08:48:26 +0000 (08:48 +0000)]
gettextsubimage: verify zoffset and depth are correct

According to OpenGL 4.6 spec, section 8.11.4 ("Texture Image Queries"),
relative to errors for GetTextureSubImage() function:

  "An INVALID_VALUE error is generated if the effective target is
   TEXTURE_1D and either yoffset is not zero, or height is not one.

   An INVALID_VALUE error is generated if the effective target is
   TEXTURE_1D, TEXTURE_1D_ARRAY, TEXTURE_2D or TEXTURE_RECTANGLE, and
   either zoffset is not zero, or depth is not one."

The commit fixes the check for height and depth.

This fixes arb_get_texture_sub_image piglit tests.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
6 years agomesa: free debug messages when destroying the debug state
Timothy Arceri [Fri, 13 Apr 2018 05:23:57 +0000 (15:23 +1000)]
mesa: free debug messages when destroying the debug state

Fixes: 04a8baad3721 "mesa: refactor _mesa_PopDebugGroup and _mesa_free_errors_data"
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98281

6 years agomesa: fix x86 builds
Timothy Arceri [Fri, 13 Apr 2018 12:11:13 +0000 (22:11 +1000)]
mesa: fix x86 builds

Fixes: 43d66c8c2d4d "mesa: include mtypes.h less"
6 years agoFix make check
Marek Olšák [Fri, 13 Apr 2018 00:03:12 +0000 (20:03 -0400)]
Fix make check

6 years agoFix scons build
Marek Olšák [Thu, 12 Apr 2018 23:54:36 +0000 (19:54 -0400)]
Fix scons build

6 years agomesa: include mtypes.h less
Marek Olšák [Sun, 8 Apr 2018 17:13:08 +0000 (13:13 -0400)]
mesa: include mtypes.h less

- remove mtypes.h from most header files
- add main/menums.h for often used definitions
- remove main/core.h

v2: fix radv build

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agomesa: include dispatch.h less
Marek Olšák [Sun, 8 Apr 2018 19:24:26 +0000 (15:24 -0400)]
mesa: include dispatch.h less

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agoradv: Implement VK_EXT_vertex_attribute_divisor.
Bas Nieuwenhuizen [Sun, 8 Apr 2018 08:15:21 +0000 (10:15 +0200)]
radv: Implement VK_EXT_vertex_attribute_divisor.

Pretty straight forward, just pass the divisors through the shader
key and then do a LLVM divide.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agoac/surface: Allow S swizzle for displayable surfaces.
Bas Nieuwenhuizen [Wed, 11 Apr 2018 00:10:29 +0000 (02:10 +0200)]
ac/surface: Allow S swizzle for displayable surfaces.

For dcn1 && < 64 bpp displayable surfaces, addrlib only accepts
S swizzles.

At the same time addrlib prefers D swizzles is allowed, so we can
just allow S swizzles as fallback.

Fixes: b64b712558 "ac/surface/gfx9: request desired micro tile mode explicitly"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agobroadcom/vc5: Fix a stray '`' in a comment.
Eric Anholt [Wed, 11 Apr 2018 23:28:07 +0000 (16:28 -0700)]
broadcom/vc5: Fix a stray '`' in a comment.

6 years agobroadcom/vc5: Update the UABI for in/out syncobjs
Eric Anholt [Wed, 4 Apr 2018 16:59:18 +0000 (09:59 -0700)]
broadcom/vc5: Update the UABI for in/out syncobjs

This is the ABI I'm hoping to stabilize for merging the driver.  seqnos
are eliminated, which allows for the GPU scheduler to task-switch between
DRM fds even after submission to the kernel.  In/out sync objects are
introduced, to allow the Android fencing extension (not yet implemented,
but should be trivial), and to also allow the driver to tell the kernel to
not start a bin until a previous render is complete.

6 years agobroadcom/vc5: Drop the finished_seqno optimization.
Eric Anholt [Wed, 4 Apr 2018 16:58:23 +0000 (09:58 -0700)]
broadcom/vc5: Drop the finished_seqno optimization.

With the DRM scheduler changes, I'm about to remove all seqnos from the
UABI.

6 years agobroadcom/vc5: Drop the throttling code.
Eric Anholt [Wed, 4 Apr 2018 16:57:51 +0000 (09:57 -0700)]
broadcom/vc5: Drop the throttling code.

Since I'll be using the DRM scheduler, we won't run into the problem of a
runaway client starving other clients of GPU time.

6 years agobroadcom/vc5: Move flush_last_load into load_general, like for stores.
Eric Anholt [Fri, 30 Mar 2018 23:50:23 +0000 (16:50 -0700)]
broadcom/vc5: Move flush_last_load into load_general, like for stores.

This should avoid mistakes with not flushing as we change the series of
loads.  Already, it fixes a hopefully unreachable case where we were
emitting just the TILE_COORDINATES and not the dummy store that needs to
go with it.

6 years agobroadcom/vc5: Rename read_but_not_cleared to loads_pending.
Eric Anholt [Fri, 30 Mar 2018 23:53:39 +0000 (16:53 -0700)]
broadcom/vc5: Rename read_but_not_cleared to loads_pending.

This is a more obvious name for what the variable means, and matches what
it's called for stores.

6 years agobroadcom/vc5: Refactor the implicit coords/stores_pending logic.
Eric Anholt [Fri, 30 Mar 2018 23:43:51 +0000 (16:43 -0700)]
broadcom/vc5: Refactor the implicit coords/stores_pending logic.

Since I just fixed a bug due to forgetting to do these right, do it once
in the helper func.

6 years agobroadcom/vc5: Emit missing TILE_COORDINATES_IMPLICIT in separate z/s stores.
Eric Anholt [Fri, 30 Mar 2018 23:39:14 +0000 (16:39 -0700)]
broadcom/vc5: Emit missing TILE_COORDINATES_IMPLICIT in separate z/s stores.

Fixes a simulator assertion failure in
KHR-GLES3.packed_depth_stencil.blit.depth32f_stencil8

6 years agobroadcom/vc5: Add checks that we don't try to do raw Z+S load/stores.
Eric Anholt [Fri, 30 Mar 2018 23:31:07 +0000 (16:31 -0700)]
broadcom/vc5: Add checks that we don't try to do raw Z+S load/stores.

This was dying in the simulator on
GTF-GLES3.gtf.GL3Tests.packed_depth_stencil.packed_depth_stencil_blit.
We'll need to do basically the same thing as Z32F/S8 does in the MSAA
Z24S8 case.

6 years agobroadcom/vc5: Fix MSAA depth/stencil size setup.
Eric Anholt [Fri, 30 Mar 2018 23:14:29 +0000 (16:14 -0700)]
broadcom/vc5: Fix MSAA depth/stencil size setup.

The v3dX(get_internal_type_bpp_for_output_format)() call only handles
color output formats (which overlap in enum numbers with depth output
formats), so for depth we just need to take the normal cpp times the
number of samples.

6 years agost/va: add VP9 config to enable profile2
Leo Liu [Wed, 14 Mar 2018 21:13:46 +0000 (17:13 -0400)]
st/va: add VP9 config to enable profile2

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeonsi: use PIPE_FORMAT_P016 format for VP9 profile2
Leo Liu [Wed, 14 Mar 2018 21:09:46 +0000 (17:09 -0400)]
radeonsi: use PIPE_FORMAT_P016 format for VP9 profile2

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add VP9 profile2 support
Leo Liu [Thu, 15 Mar 2018 15:55:27 +0000 (11:55 -0400)]
radeon/vcn: add VP9 profile2 support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agovl: add VP9 profile2 support
Leo Liu [Wed, 14 Mar 2018 20:59:20 +0000 (16:59 -0400)]
vl: add VP9 profile2 support

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add VP9 config to enable profile0
Leo Liu [Wed, 14 Mar 2018 20:56:25 +0000 (16:56 -0400)]
st/va: add VP9 config to enable profile0

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: parse VP9 uncompressed frame header
Leo Liu [Wed, 14 Mar 2018 20:47:26 +0000 (16:47 -0400)]
st/va: parse VP9 uncompressed frame header

To get some of UVD required parameters.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add slice parameter handling for VP9
Leo Liu [Wed, 14 Mar 2018 20:27:18 +0000 (16:27 -0400)]
st/va: add slice parameter handling for VP9

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add picture parameter handling for VP9
Leo Liu [Wed, 14 Mar 2018 19:57:48 +0000 (15:57 -0400)]
st/va: add picture parameter handling for VP9

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add handles for VP9 buffers
Leo Liu [Wed, 14 Mar 2018 19:55:00 +0000 (15:55 -0400)]
st/va: add handles for VP9 buffers

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agost/va: add VP9 picture to context
Leo Liu [Wed, 14 Mar 2018 19:31:04 +0000 (15:31 -0400)]
st/va: add VP9 picture to context

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeonsi: cap VP9 support to progressive buffer
Leo Liu [Wed, 14 Mar 2018 19:29:04 +0000 (15:29 -0400)]
radeonsi: cap VP9 support to progressive buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeonsi: cap VP9 support to Raven
Leo Liu [Wed, 14 Mar 2018 19:27:01 +0000 (15:27 -0400)]
radeonsi: cap VP9 support to Raven

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add VP9 context buffer
Leo Liu [Wed, 14 Mar 2018 19:09:07 +0000 (15:09 -0400)]
radeon/vcn: add VP9 context buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: get VP9 msg buffer
Leo Liu [Thu, 15 Mar 2018 17:14:58 +0000 (13:14 -0400)]
radeon/vcn: get VP9 msg buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: fill probability table to prob buffers
Leo Liu [Thu, 15 Mar 2018 17:10:46 +0000 (13:10 -0400)]
radeon/vcn: fill probability table to prob buffers

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add VP9 message buffer interface
Leo Liu [Wed, 14 Mar 2018 17:25:11 +0000 (13:25 -0400)]
radeon/vcn: add VP9 message buffer interface

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add VP9 prob table buffer
Leo Liu [Wed, 14 Mar 2018 16:48:22 +0000 (12:48 -0400)]
radeon/vcn: add VP9 prob table buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agovl: add VP9 probability tables
Leo Liu [Tue, 13 Mar 2018 18:35:40 +0000 (14:35 -0400)]
vl: add VP9 probability tables

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add VP9 dpb buffer size
Leo Liu [Tue, 13 Mar 2018 13:42:57 +0000 (09:42 -0400)]
radeon/vcn: add VP9 dpb buffer size

The current FW has restricted the size to the worse case,
and the new dynamic dpb buffer support is on the way from
firmware side, we will change accordingly.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradeon/vcn: add VP9 stream type for decoder
Leo Liu [Tue, 13 Mar 2018 13:40:15 +0000 (09:40 -0400)]
radeon/vcn: add VP9 stream type for decoder

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agovl: add VP9 picture description
Leo Liu [Tue, 13 Mar 2018 13:39:20 +0000 (09:39 -0400)]
vl: add VP9 picture description

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agovl: add VP9 profile0 and format
Leo Liu [Tue, 13 Mar 2018 13:06:17 +0000 (09:06 -0400)]
vl: add VP9 profile0 and format

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
6 years agoradv: fix radv_layout_dcc_compressed() when image doesn't have DCC
Samuel Pitoiset [Wed, 11 Apr 2018 19:34:43 +0000 (21:34 +0200)]
radv: fix radv_layout_dcc_compressed() when image doesn't have DCC

num_dcc_levels means that DCC is supported, but this doesn't
mean that it's enabled by the driver. Instead, we should rely
on radv_image_has_dcc().

This fixes some multisample regressions since 0babc8e5d66
("radv: fix picking the method for resolve subpass") on Vega.
This is because the resolve method changed from HW to FS, but
those fails are totally unexpected, so there might some
differences between Polaris and Vega here.

Fixes: 44fcf587445 ("radv: Disable DCC for GENERAL layout and compute transfer dest.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: add radv_decompress_resolve_{subpass}_src() helpers
Samuel Pitoiset [Wed, 11 Apr 2018 12:09:16 +0000 (14:09 +0200)]
radv: add radv_decompress_resolve_{subpass}_src() helpers

This helper shares common code before resolving using either
a fragment or a compute shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: add radv_init_dcc_control_reg() helper
Samuel Pitoiset [Wed, 11 Apr 2018 12:09:15 +0000 (14:09 +0200)]
radv: add radv_init_dcc_control_reg() helper

And add some comments.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoglsl: fix compat shaders in GLSL 1.40
Timothy Arceri [Wed, 11 Apr 2018 23:23:02 +0000 (09:23 +1000)]
glsl: fix compat shaders in GLSL 1.40

The compatibility and core tokens were not added until GLSL 1.50,
for GLSL 1.40 just assume all shaders built with a compat profile
are compat shaders.

Fixes rendering issues in Dawn of War II on radeonsi which has
enabled OpenGL 3.1 compat support.

Fixes: a0c8b49284ef "mesa: enable OpenGL 3.1 with ARB_compatibility"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105807

6 years agomesa: Silence remaining unused parameter warnings in teximage.c
Ian Romanick [Tue, 27 Feb 2018 19:34:43 +0000 (11:34 -0800)]
mesa: Silence remaining unused parameter warnings in teximage.c

src/mesa/main/teximage.c: In function ‘_mesa_test_proxy_teximage’:
src/mesa/main/teximage.c:1301:51: warning: unused parameter ‘level’ [-Wunused-parameter]
                           GLuint numLevels, GLint level,
                                                   ^~~~~
src/mesa/main/teximage.c: In function ‘texsubimage_error_check’:
src/mesa/main/teximage.c:2186:30: warning: unused parameter ‘dsa’ [-Wunused-parameter]
                         bool dsa, const char *callerName)
                              ^~~
src/mesa/main/teximage.c: In function ‘copytexture_error_check’:
src/mesa/main/teximage.c:2297:32: warning: unused parameter ‘width’ [-Wunused-parameter]
                          GLint width, GLint height, GLint border )
                                ^~~~~
src/mesa/main/teximage.c:2297:45: warning: unused parameter ‘height’ [-Wunused-parameter]
                          GLint width, GLint height, GLint border )
                                             ^~~~~~
src/mesa/main/teximage.c: In function ‘check_rtt_cb’:
src/mesa/main/teximage.c:2679:21: warning: unused parameter ‘key’ [-Wunused-parameter]
 check_rtt_cb(GLuint key, void *data, void *userData)
                     ^~~
src/mesa/main/teximage.c: In function ‘override_internal_format’:
src/mesa/main/teximage.c:2756:55: warning: unused parameter ‘width’ [-Wunused-parameter]
 override_internal_format(GLenum internalFormat, GLint width, GLint height)
                                                       ^~~~~
src/mesa/main/teximage.c:2756:68: warning: unused parameter ‘height’ [-Wunused-parameter]
 override_internal_format(GLenum internalFormat, GLint width, GLint height)
                                                                    ^~~~~~
src/mesa/main/teximage.c: In function ‘texture_sub_image’:
src/mesa/main/teximage.c:3293:24: warning: unused parameter ‘dsa’ [-Wunused-parameter]
                   bool dsa)
                        ^~~
src/mesa/main/teximage.c: In function ‘can_avoid_reallocation’:
src/mesa/main/teximage.c:3788:53: warning: unused parameter ‘x’ [-Wunused-parameter]
                        mesa_format texFormat, GLint x, GLint y, GLsizei width,
                                                     ^
src/mesa/main/teximage.c:3788:62: warning: unused parameter ‘y’ [-Wunused-parameter]
                        mesa_format texFormat, GLint x, GLint y, GLsizei width,
                                                              ^
src/mesa/main/teximage.c: In function ‘valid_texstorage_ms_parameters’:
src/mesa/main/teximage.c:5987:40: warning: unused parameter ‘samples’ [-Wunused-parameter]
                                GLsizei samples, unsigned dims)
                                        ^~~~~~~

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agomesa: Silence unused parameter warning in compressedteximage_only_format
Ian Romanick [Tue, 27 Feb 2018 19:24:44 +0000 (11:24 -0800)]
mesa: Silence unused parameter warning in compressedteximage_only_format

Passing ctx to compressedteximage_only_format was the only use of the
ctx parameter in _mesa_format_no_online_compression, so that parameter
had to go too.

../../SOURCE/master/src/mesa/main/teximage.c: In function ‘compressedteximage_only_format’:
../../SOURCE/master/src/mesa/main/teximage.c:1355:57: warning: unused parameter ‘ctx’ [-Wunused-parameter]
 compressedteximage_only_format(const struct gl_context *ctx, GLenum format)
                                                         ^~~

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agoblorp: Silence unused function warnings
Nanley Chery [Tue, 10 Apr 2018 22:05:31 +0000 (15:05 -0700)]
blorp: Silence unused function warnings

vulkan/genX_blorp_exec.c:69:1: warning: ‘blorp_get_surface_base_address’ defined but not used [-Wunused-function]
 blorp_get_surface_base_address(struct blorp_batch *batch)
 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from vulkan/genX_blorp_exec.c:35:0:
./blorp/blorp_genX_exec.h:1249:1: warning: ‘blorp_emit_memcpy’ defined but not used [-Wunused-function]
 blorp_emit_memcpy(struct blorp_batch *batch,
 ^~~~~~~~~~~~~~~~~
genX_blorp_exec.c:99:1: warning: ‘blorp_get_surface_base_address’ defined but not used [-Wunused-function]
 blorp_get_surface_base_address(struct blorp_batch *batch)
 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from genX_blorp_exec.c:33:0:
../../../../../src/intel/blorp/blorp_genX_exec.h:1249:1: warning: ‘blorp_emit_memcpy’ defined but not used [-Wunused-function]
 blorp_emit_memcpy(struct blorp_batch *batch,
 ^~~~~~~~~~~~~~~~~

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agonir/vars_to_ssa: Simplify node matching code
Caio Marcelo de Oliveira Filho [Wed, 11 Apr 2018 06:13:40 +0000 (23:13 -0700)]
nir/vars_to_ssa: Simplify node matching code

The matching code doesn't make real use of the return value. The main
function return value is ignored, and while the worker function
propagate its return value, the actual callback never returns false.

v2: Style fixes. (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agonir/vars_to_ssa: Remove an unnecessary deref_arry_type check
Caio Marcelo de Oliveira Filho [Wed, 11 Apr 2018 06:13:39 +0000 (23:13 -0700)]
nir/vars_to_ssa: Remove an unnecessary deref_arry_type check

Only fully-qualified direct derefs, collected in direct_deref_nodes,
are checked for aliasing, so it is already known up front that they
have only array derefs of type direct.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agonir/vars_to_ssa: Rework register_variable_uses()
Caio Marcelo de Oliveira Filho [Wed, 11 Apr 2018 06:13:38 +0000 (23:13 -0700)]
nir/vars_to_ssa: Rework register_variable_uses()

The return value was needed to make use of the old nir_foreach_block
helper, but not needed anymore with the macro version. Then go one
step further and move the foreach directly into the register variable
uses function.

v2: Move foreach to register_variable_uses(). (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agonir: Use nir_builder in lower_io_to_temporaries
Jason Ekstrand [Mon, 26 Mar 2018 22:38:49 +0000 (15:38 -0700)]
nir: Use nir_builder in lower_io_to_temporaries

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
6 years agoradv: Enable RB+ on Raven.
Bas Nieuwenhuizen [Tue, 10 Apr 2018 23:35:38 +0000 (01:35 +0200)]
radv: Enable RB+ on Raven.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agovulkan: fix build issue on android (both anv/radv)
Tapani Pälli [Wed, 11 Apr 2018 07:23:11 +0000 (10:23 +0300)]
vulkan: fix build issue on android (both anv/radv)

Fixes linking errors against:

   anv_GetPhysicalDeviceImageFormatProperties2KHR
   radv_GetPhysicalDeviceImageFormatProperties2KHR

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradeonsi: correctly parse disassembly with labels
Nicolai Hähnle [Thu, 18 Jan 2018 15:05:21 +0000 (16:05 +0100)]
radeonsi: correctly parse disassembly with labels

LLVM now emits labels as part of the disassembly string, which is very
useful but breaks the old parsing approach.

Use the semicolon to detect the boundary of instructions instead of going
by line breaks.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradeonsi: pass -O halt_waves to umr for hang debugging
Nicolai Hähnle [Thu, 18 Jan 2018 15:04:15 +0000 (16:04 +0100)]
radeonsi: pass -O halt_waves to umr for hang debugging

This will give us meaningful wave information in the case of a hang where
shaders are still running in an infinite loop.

Note that we call umr multiple times for different sections of the ddebug
hang dump, and so the wave information will not necessarily match up
between sections.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agovulkan: Drop vk_android_native_buffer.xml
Jason Ekstrand [Tue, 10 Apr 2018 05:01:14 +0000 (22:01 -0700)]
vulkan: Drop vk_android_native_buffer.xml

All the information in vk_android_native_buffer.xml is now in vk.xml.
The only exception is the extension type attribute which we can work
around in the generators while we wait for the XML to be fixed.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agonir/lower_atomics: Rework the main walker loop a bit
Jason Ekstrand [Tue, 20 Mar 2018 22:44:16 +0000 (15:44 -0700)]
nir/lower_atomics: Rework the main walker loop a bit

This replaces some "if (...} { }" with "if (...) continue;" to reduce
nesting depth and makes nir_metadata_preserve conditional on progress
for the given impl.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
6 years agoradv: Enable RB+ where possible.
Bas Nieuwenhuizen [Mon, 9 Apr 2018 09:23:21 +0000 (11:23 +0200)]
radv: Enable RB+ where possible.

According to Marek, not enabling it on Stoney has a significant
negative performance impact. (And I guess this might impact
performance on Raven as well)

The register settings are pretty much copied from radeonsi. I did
not put this in the pipeline as that would make the pipeline more
dependent on the format which mean we would have to have more
pipelines for the meta shaders.

v2: Don't clear RB+ regs if not enabled as the CLEAR_STATE packet
    does already.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agonir: Check if u_vector_init() succeeds
Topi Pohjolainen [Thu, 5 Apr 2018 07:21:01 +0000 (10:21 +0300)]
nir: Check if u_vector_init() succeeds

However, it only fails when running out of memory. Now, if we
are about to check that, we should be consistent and check
the allocation of the worklist as well.

CID: 1433512
Fixes: edb18564c7 nir: Initial implementation of a nir_instr_worklist
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
6 years agomesa: Assert base format before truncating to unsigned short
Topi Pohjolainen [Fri, 6 Apr 2018 07:41:26 +0000 (10:41 +0300)]
mesa: Assert base format before truncating to unsigned short

CID: 1433709
Fixes: ca721b3d8: mesa: use GLenum16 in a few more places
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
6 years agointel/dev: Assert the number of slices is not zero
Topi Pohjolainen [Thu, 5 Apr 2018 07:38:46 +0000 (10:38 +0300)]
intel/dev: Assert the number of slices is not zero

Fixes: c1900f5b intel: devinfo: add helper functions to fill...
CID: 1433511
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
6 years agoi965: Remove brw_bo_alloc_tiled_2d from intel_detect_swizzling.
Kenneth Graunke [Tue, 10 Apr 2018 05:45:43 +0000 (22:45 -0700)]
i965: Remove brw_bo_alloc_tiled_2d from intel_detect_swizzling.

I'd like to drop this pre-isl function.  This drops one of the two uses.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
6 years agomesa: fix glsl version mismatch in compat profile
Timothy Arceri [Tue, 10 Apr 2018 11:40:11 +0000 (21:40 +1000)]
mesa: fix glsl version mismatch in compat profile

Drivers that only support compat 3.0 were reporting GLSL 1.40
support. This fixes issues with the menu of Dawn of War II.

Fixes: a0c8b49284ef "mesa: enable OpenGL 3.1 with ARB_compatibility"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105807

6 years agoradv: fix picking the method for resolve subpass
Samuel Pitoiset [Tue, 10 Apr 2018 14:00:56 +0000 (16:00 +0200)]
radv: fix picking the method for resolve subpass

The source and destination image parameters were swapped.

No CTS changes on Polaris10, but I suspect this might
fix something.

Fixes: 2a04f5481df ("radv/meta: select resolve paths")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: add shader BOs to the list at pipeline bind time
Samuel Pitoiset [Tue, 10 Apr 2018 12:09:04 +0000 (14:09 +0200)]
radv: add shader BOs to the list at pipeline bind time

Otherwise, the shader BOs are not added to the list on SI because
prefetching isn't supported. Calling radv_cs_add_buffer() in the
prefetch codepath was a bad idea.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105952
Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Turo Lamminen <turo@alternativegames.net>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoac/surface: don't set the display flag for obviously unsupported cases (v2)
Marek Olšák [Mon, 2 Apr 2018 16:51:14 +0000 (12:51 -0400)]
ac/surface: don't set the display flag for obviously unsupported cases (v2)

This enables the tile swizzle for some cases of the displayable micro mode,
and it also fixes an addrlib assertion failure on Vega.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agoradeonsi: add shader binary padding for UMR
Marek Olšák [Thu, 5 Apr 2018 18:48:37 +0000 (14:48 -0400)]
radeonsi: add shader binary padding for UMR

6 years agoac/surface/gfx9: request desired micro tile mode explicitly
Marek Olšák [Mon, 2 Apr 2018 16:54:52 +0000 (12:54 -0400)]
ac/surface/gfx9: request desired micro tile mode explicitly

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agodocs/release-calendar: update to include 18.1 and 18.2
Emil Velikov [Mon, 9 Apr 2018 16:45:52 +0000 (17:45 +0100)]
docs/release-calendar: update to include 18.1 and 18.2

Dylan has kindly stepped up to help with 18.1.0, while I've taken the
liberty to nominate Andres for 18.2.0 ;-)

As always, people are welcome to swap/adjust where needed.

v2: Add Juan for 18.0.x (Juan)

Cc: Andres Gomez <agomez@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com> (v1)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoglsl: remove unreachable assert()
Emil Velikov [Wed, 28 Mar 2018 17:21:59 +0000 (18:21 +0100)]
glsl: remove unreachable assert()

Earlier commit enforced that we'll bail out if the number of terminators
is different than 2. With that in mind, the assert() will never trigger.

Fixes: 56b867395de ("glsl: fix infinite loop caused by bug in loop
unrolling pass")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
6 years agospirv: autotools: add vtn_gather_types_c.py in distribution tarball
Juan A. Suarez Romero [Mon, 9 Apr 2018 11:50:46 +0000 (13:50 +0200)]
spirv: autotools: add vtn_gather_types_c.py in distribution tarball

Fixes: 042ee4bea26 "(spirv: Move SPIR-V building to Makefile.spirv.am and
spirv/meson.build")

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoradeonsi: autotools: add si_build_pm4.h in dist tarball
Juan A. Suarez Romero [Mon, 9 Apr 2018 12:07:34 +0000 (14:07 +0200)]
radeonsi: autotools: add si_build_pm4.h in dist tarball

Fixes: 5777488406c ("radeonsi: move r600_cs.h contents into si_pipe.h,
si_build_pm4.h")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoac/nir: Use an array instead of hashtable for SSA defs.
Bas Nieuwenhuizen [Tue, 10 Apr 2018 07:31:24 +0000 (09:31 +0200)]
ac/nir: Use an array instead of hashtable for SSA defs.

Saves about 2% of compile time for F1 2017, as well as reduce code
size of an optimized libvulkan_radeon.so by about 1 KiB.

This still keeps the hashtable, as we also stored blocks in there.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agost/mesa: finalise tcs/tes/geom NIR before storing it to the cache
Timothy Arceri [Thu, 5 Apr 2018 06:36:09 +0000 (16:36 +1000)]
st/mesa: finalise tcs/tes/geom NIR before storing it to the cache

We don't create variants of the NIR so here we finalise it before
caching to avoid unnecessary processing when restoring it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agost/mesa: exit st_translate_fragment_program() earlier for NIR path
Timothy Arceri [Thu, 5 Apr 2018 06:20:23 +0000 (16:20 +1000)]
st/mesa: exit st_translate_fragment_program() earlier for NIR path

This avoids a bunch of scanning that is only used by the TGSI path.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradeonsi/nir: tidy up si_nir_load_sampler_desc()
Timothy Arceri [Thu, 22 Mar 2018 00:55:20 +0000 (11:55 +1100)]
radeonsi/nir: tidy up si_nir_load_sampler_desc()

This makes it easier to follow the code, and also initialises
dynamic_index which will be useful for adding bindless textures
support.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradeonsi/nir: set uses_bindless_images for images
Timothy Arceri [Sun, 18 Feb 2018 21:44:50 +0000 (08:44 +1100)]
radeonsi/nir: set uses_bindless_images for images

V2: add missing intrinsics (Spotted-by: Samuel Pitoiset)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agonir: dont lower bindless samplers
Timothy Arceri [Thu, 22 Mar 2018 03:28:22 +0000 (14:28 +1100)]
nir: dont lower bindless samplers

We neeed to skip the var if its not a uniform here as well as checking
the bindless flag since UBOs can contain bindless samplers.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agost/glsl_to_nir: set paramater value offset as driver location for packed uniforms
Timothy Arceri [Thu, 22 Mar 2018 00:52:19 +0000 (11:52 +1100)]
st/glsl_to_nir: set paramater value offset as driver location for packed uniforms

This allows us to simplify the code and will also be useful for supporting
bindless textures.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoradeonsi/nir: don't add bindless samplers/images to declared bitmasks
Timothy Arceri [Wed, 28 Mar 2018 01:31:01 +0000 (12:31 +1100)]
radeonsi/nir: don't add bindless samplers/images to declared bitmasks

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agost/mesa: stop calling _mesa_init_shader_object_functions()
Timothy Arceri [Wed, 4 Apr 2018 06:29:59 +0000 (16:29 +1000)]
st/mesa: stop calling _mesa_init_shader_object_functions()

This sets the LinkShader function for the driver, but for the st we
set it properly with the following call to st_init_program_functions().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoanv/pipeline: Lower more constant initializers earlier
Jason Ekstrand [Fri, 23 Mar 2018 01:37:42 +0000 (18:37 -0700)]
anv/pipeline: Lower more constant initializers earlier

Once we've gotten rid of everything but the main entrypoint, there's no
reason why we should go ahead and lower them all.  This is what radv
does and it will make future work easier.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
6 years agospirv: Use the LOCAL_GROUP_SIZE system value
Jason Ekstrand [Thu, 22 Mar 2018 00:20:00 +0000 (17:20 -0700)]
spirv: Use the LOCAL_GROUP_SIZE system value

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
6 years agonir/lower_system_values: Support SYSTEM_VALUE_LOCAL_GROUP_SIZE
Jason Ekstrand [Thu, 22 Mar 2018 00:18:05 +0000 (17:18 -0700)]
nir/lower_system_values: Support SYSTEM_VALUE_LOCAL_GROUP_SIZE

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
6 years agointel: aubinator: print out addresses of invalid instructions
Lionel Landwerlin [Sat, 7 Apr 2018 00:15:55 +0000 (01:15 +0100)]
intel: aubinator: print out addresses of invalid instructions

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Scott D Phillips <scott.d.phillips@intel.com>
6 years agoradv: Always reset draw user SGPRs after secondary command buffer.
Bas Nieuwenhuizen [Mon, 9 Apr 2018 14:54:55 +0000 (16:54 +0200)]
radv: Always reset draw user SGPRs after secondary command buffer.

As we sometimes reset them to -1, -1 does not mean that they are
not written by the secondary command buffer.

Fixes: ad11fc3571 "radv: don't emit unneeded vertex state."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>