Jason Ekstrand [Tue, 10 Jan 2017 18:24:55 +0000 (10:24 -0800)]
nir/search: Only allow matching SSA values
This is more correct and should also be a tiny bit faster since we're
just comparing pointers instead of calling nir_src_equal.
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Derek Foreman [Tue, 10 Jan 2017 21:21:47 +0000 (15:21 -0600)]
egl/dri2: add image_loader_extension back into loader extensions for wayland
before commit
f871946594129500a67c05a6d9fe99db54b4bb64
image_loader_extension was always present in dri2_dpy->extensions,
after that commit it is only present for render nodes.
Its removal broke partial render based on buffer age on (at least)
raspberry pi.
Fixes: f8719465941 "egl/dri2: rework dri2_egl_display::extensions storage"
Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Li Qiang [Tue, 10 Jan 2017 08:56:31 +0000 (03:56 -0500)]
gallium/tgsi: fix overflow in parse property
In parse_identifier, it doesn't stop copying '*pcur'
untill encounter the NULL. As the 'ret' has a
fixed-size buffer, if the '*pcur' has a long string,
there will be a buffer overflow. This patch avoid this.
Signed-off-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Mauro Rossi [Tue, 10 Jan 2017 00:52:58 +0000 (01:52 +0100)]
st/dri: remove trailing whitespace
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Mauro Rossi [Tue, 10 Jan 2017 00:52:57 +0000 (01:52 +0100)]
android: st/mesa: fix building error in libmesa_st_mesa
Fixes building error due to dependency on nir generated headers
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Dave Airlie [Tue, 10 Jan 2017 04:50:34 +0000 (14:50 +1000)]
radv: fix multi-viewport emission
This set context req seq was in the wrong place.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tapani Pälli [Tue, 10 Jan 2017 08:14:03 +0000 (10:14 +0200)]
nir: change asserts to unreachable in nir_type_conversion_op
this is to avoid following compilation error on Android:
error: control may reach end of non-void function [-Werror,-Wreturn-type]
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Iago Toral Quiroga [Mon, 9 Jan 2017 11:31:53 +0000 (12:31 +0100)]
spirv: gl_PrimitiveID in the fragment shader is handled as an input
Geometry and Tessellation stages do handle this as a system value instead.
Fixes:
dEQP-VK.geometry.basic.primitive_id
Reviewed-by: Dave Airlie <ailried@redhat.com>
Rob Clark [Mon, 2 Jan 2017 22:22:13 +0000 (17:22 -0500)]
freedreno: add "nogrow" debug param
Sometimes it is useful to disable the "growable" cmdstream buffers for
debugging. (See
419a154d in libdrm)
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Fri, 6 Jan 2017 18:50:59 +0000 (13:50 -0500)]
freedreno/a5xx: remove hack for glamor
Now that issues glamor was hitting w/ glsl>=130 (aka missing INSTANCED
bit in vertex attribute state) is fixed, remove hack.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Tue, 10 Jan 2017 16:43:12 +0000 (11:43 -0500)]
freedreno/a5xx: fixed instanced
Add missing bit, now that we know where it is.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 9 Jan 2017 21:12:59 +0000 (16:12 -0500)]
freedreno/a5xx: use the non-_ZERO_BASE for vertexid
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 9 Jan 2017 16:21:23 +0000 (11:21 -0500)]
freedreno/a5xx: add texture MIPLVLS
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 2 Jan 2017 17:25:08 +0000 (12:25 -0500)]
freedreno/a5xx: fix fragcoord related hangs
Signed-off-by: Rob Clark <robdclark@gmail.com>
Rob Clark [Mon, 2 Jan 2017 17:18:59 +0000 (12:18 -0500)]
freedreno: update generated headers
Signed-off-by: Rob Clark <robdclark@gmail.com>
Kenneth Graunke [Sun, 25 Sep 2016 22:33:03 +0000 (15:33 -0700)]
anv: Enable tessellation shaders.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Fri, 30 Sep 2016 01:11:21 +0000 (18:11 -0700)]
anv: Initialize physical device limits for tessellation
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 29 Sep 2016 18:53:17 +0000 (11:53 -0700)]
anv: Clamp depth buffer dimensions to be at least 1.
When there are no framebuffer attachments, fb->width and fb->height will
be 0. Subtracting 1 results in
4294967295 which is too large for the
field, causing genxml assertions when trying to create the packet.
In this case, we can just program it to 1.
Caught by dEQP-VK.tessellation.tesscoord.triangles_equal_spacing.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 26 Sep 2016 00:43:06 +0000 (17:43 -0700)]
anv: Compile TCS/TES shaders.
v2: Merge more TCS/TES info.
v3: Fix caching keys.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 21 Nov 2016 08:45:57 +0000 (00:45 -0800)]
anv: Emit 3DSTATE_HS/TE/DS packets.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Sun, 25 Sep 2016 22:29:16 +0000 (15:29 -0700)]
anv: Handle patch primitives.
v2: Use anv_pipeline_has_stage rather than tess_info != NULL.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Sat, 1 Oct 2016 19:34:36 +0000 (12:34 -0700)]
nir: Add a pass to lower TES patch_vertices intrinsics to a constant.
In Vulkan, we always have both the TCS and TES available in the same
pipeline, so we can simply use the TCS OutputVertices execution mode
value as the TES PatchVertices built-in.
For GLSL, we handle this in the linker. But we could use this pass
in the case when both TCS and TES are linked together, if we wanted.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Sun, 25 Sep 2016 21:23:55 +0000 (14:23 -0700)]
spirv: Silence unsupported tessellation capability warnings.
...when the capability bit is set.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 10 Jan 2017 05:48:55 +0000 (21:48 -0800)]
spirv: Tidy some repeated if checks by using a switch statement.
Iago suggested tidying this.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Sun, 25 Sep 2016 21:23:55 +0000 (14:23 -0700)]
spirv: Add tessellation varying and built-in support.
We need to:
- handle the extra array level for per-vertex varyings
- handle the patch qualifier correctly
- assign varying locations
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Sun, 25 Sep 2016 21:23:55 +0000 (14:23 -0700)]
spirv: Handle tessellation execution modes.
v2: Use info->tess.
v3: Handle more things in either TCS/TES.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dave Airlie <airlied@redhat.com> [v1]
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 9 Jan 2017 19:37:21 +0000 (11:37 -0800)]
compiler: Merge shader_info's tcs and tes structs.
Annoyingly, SPIR-V lets you specify all of these fields in either the
TCS or TES, which means that we need to be able to store all of them
for either shader stage. Putting them in a union won't work.
Combining both is an easy solution, and given that the TCS struct only
had a single field, it's pretty inexpensive.
This patch renames the combined struct to "tess" to indicate that it's
for tessellation in general, not one of the two stages.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 10 Jan 2017 00:36:12 +0000 (16:36 -0800)]
genxml: Rename 3DSTATE_HS::Enable to "Function Enable".
"Function Enable" is what the other stages use.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Tue, 10 Jan 2017 12:46:25 +0000 (12:46 +0000)]
anv: set input_slots_valid on brw_wm_prog_key
With shaders using a lot of inputs/outputs, like this (from Gtk+) :
layout(location = 0) in vec2 inPos;
layout(location = 1) in float inGradientPos;
layout(location = 2) in flat int inRepeating;
layout(location = 3) in flat int inStopCount;
layout(location = 4) in flat vec4 inClipBounds;
layout(location = 5) in flat vec4 inClipWidths;
layout(location = 6) in flat ColorStop inStops[8];
layout(location = 0) out vec4 outColor;
we're missing the programming of the input_slots_valid field leading
to an assert further down the backend code.
v2: Use valid slots of the geometry or vertex stage (Jason)
v3: Use helper to find correct vue map (Jason)
v4: Set the valid slots off the previous stages (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Tue, 10 Jan 2017 12:46:25 +0000 (12:46 +0000)]
anv: add helper to get vue map for fragment shader
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Tue, 10 Jan 2017 17:21:40 +0000 (17:21 +0000)]
anv: add get_.*_prog_data for tesselation stages
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Lionel Landwerlin [Tue, 10 Jan 2017 17:21:18 +0000 (17:21 +0000)]
anv: make get_.*_prog_data take a const pipeline
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Vinson Lee [Sun, 8 Jan 2017 17:02:38 +0000 (09:02 -0800)]
nir: Fix anonymous union initialization with older GCC.
Fix this build error with GCC 4.4.7.
CC nir/nir_opt_copy_prop_vars.lo
nir/nir_opt_copy_prop_vars.c: In function ‘copy_prop_vars_block’:
nir/nir_opt_copy_prop_vars.c:765: error: unknown field ‘deref’ specified in initializer
nir/nir_opt_copy_prop_vars.c:765: warning: missing braces around initializer
nir/nir_opt_copy_prop_vars.c:765: warning: (near initialization for ‘(anonymous).<anonymous>’)
nir/nir_opt_copy_prop_vars.c:765: warning: initialization from incompatible pointer type
Fixes: 62332d139c8f ("nir: Add a local variable-based copy propagation pass")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 9 Jan 2017 10:35:31 +0000 (11:35 +0100)]
docs: add Vulkan Float64 capability support for anv driver
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Dave Airlie [Fri, 30 Dec 2016 04:24:10 +0000 (14:24 +1000)]
radv/ac: add support for multi sample image coords
This just adds the nir->llvm support, enabling
the extension causes some failures on llvm 3.9 at least,
but this code seems fine.
NIR passes the sampler in src[1].x, and we LLVM/SI requires
it as the last parameters in the coords (coord[2] for 2D,
coord[3] for 2DArray).
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Boyan Ding [Mon, 31 Oct 2016 06:45:48 +0000 (14:45 +0800)]
glsl: Do not allow scalar types in vector relational functions
According to OpenGL Shading Language 4.50 spec, Section 8.7 "Vector
Relational Functions", functions of this type do not operate on scalar
types, so remove scalar types from signature definitions to make the
behavior consistent with glslangValidator and other drivers.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
Thomas Hindoe Paaboel Andersen [Mon, 9 Jan 2017 21:45:57 +0000 (22:45 +0100)]
nir: remove duplicated foreach loop
The foreach loop was called both in the else case and right after. The
indentation seems to indicate that the extra call was from a previous
version with an else section with out curly brackets.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 29 Nov 2016 00:59:45 +0000 (16:59 -0800)]
i965: Fix number of slots in SSO mode when there are no user varyings.
We want vue_map->num_slots to be one more than the final slot.
When assigning fixed slots, built-in slots, and non-SSO user varyings,
we do slot++. This leaves "slot" as one past the most recently assigned
slot. But for SSO user varyings, we computed slot based on the varying
location value...and left it at that slot value.
To work around this inconsistency, I made num_slots be "slot + 1" if
separate and "slot" otherwise. The problem is...if there are no user
varyings in SSO mode...then we would have done slot++ when assigning
built-ins, so it would be off by one. This resulted in loops from 0
to vue_map->num_slots hitting a bonus BRW_VARYING_SLOT_PAD at the end.
This used to break the SIMD8 VS/TES backends, but I fixed that in
commit
480d6c1653713dcae617ac523b2ca5deee01c845. It's probably safe
at this point, but we should fix it anyway.
To fix this, do slot++ in all cases. For SSO mode, we overwrite slot
for every varying, so this increment only matters on the last varying.
Because we process varyings in order, this will set slot to 1 more
than the highest assigned slot.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Mon, 9 Jan 2017 07:03:25 +0000 (23:03 -0800)]
spirv: Move cursor before calling vtn_ssa_value() in phi 2nd pass.
vtn_ssa_value() can produce variable loads, and the cursor might
be after a return statement, causing nir_builder assert failures
about not inserting instructions after a jump.
This fixes:
dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_if
dEQP-VK.spirv_assembly.instruction.graphics.barrier.in_switch
Cc: "13.0 12.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Marek Olšák [Sat, 7 Jan 2017 14:36:45 +0000 (15:36 +0100)]
mesa: set GLSL 1.20 for the fixed-function fragment shader
This fixes broken depth texturing after:
commit
22639a6e19f95902aef23474ad672bf489231ea7
Author: Timothy Arceri <timothy.arceri@collabora.com>
Date: Mon Nov 21 00:29:29 2016 +1100
st/mesa: get Version from gl_program rather than gl_shader_program
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Bas Nieuwenhuizen [Mon, 2 Jan 2017 17:57:02 +0000 (18:57 +0100)]
radv: Create single RADV_DEBUG env var.
Also changed RADV_SHOW_QUEUES to a no compute queue option. That
would make more sense later when the compute queue is established,
but the transfer queue still experimental.
v2: Don't include the trace flag.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 1 Jan 2017 15:47:12 +0000 (16:47 +0100)]
ac/debug: Dump indirect buffers.
This is for handling chained command buffers and secondary command
buffers. It doesn't handle the trace id for secondary command buffers
yet, but I don't think that is possible in general with just writes,
as we could call a secondary command buffer multiple times.
I think this is good enough for now, as the most useful case is the
chaining when we grow an IB.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Fri, 23 Dec 2016 22:51:18 +0000 (23:51 +0100)]
radv: Dump command buffer on hang.
v2:
- Now use the filename specified by RADV_TRACE_FILE env var.
- Use the same var to enable tracing.
I thought we could as well always set the filename explicitly
instead of having some arbitrary defaults, and at that point
we don't need a separate feature enable.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sat, 24 Dec 2016 12:08:00 +0000 (13:08 +0100)]
ac/debug: Move IB decode to common code.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sat, 24 Dec 2016 10:53:41 +0000 (11:53 +0100)]
ac/debug: Move sid_tables.h generation to common code.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Jason Ekstrand [Sun, 8 Jan 2017 04:29:49 +0000 (20:29 -0800)]
relnotes: Claim OpenGL 4.5 rather than 4.4
Acked-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Sun, 8 Jan 2017 04:26:12 +0000 (20:26 -0800)]
mesa: Bump the version to 17.0
Acked-by: Matt Turner <mattst88@gmail.com>
Marek Olšák [Tue, 3 Jan 2017 19:12:28 +0000 (20:12 +0100)]
radeonsi: fix the Witcher 2 black transitions
v2: do it properly
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98238
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 3 Jan 2017 19:03:37 +0000 (20:03 +0100)]
radeonsi: set si_shader_context::input_decls for ranged decls correctly
This has no effect because no code uses those members with ranged decls.
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 3 Jan 2017 13:19:37 +0000 (14:19 +0100)]
radeonsi: cleanly communicate whether si_shader_dump should check R600_DEBUG
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Iago Toral Quiroga [Fri, 6 Jan 2017 11:29:45 +0000 (12:29 +0100)]
isl: render target cube maps should be handled as 2D images, not cubes
This fixes layered rendering Vulkan CTS tests with cube (arrays). We
also do this in the GL driver, see this code from gen8_depth_state.c
for example:
case GL_TEXTURE_CUBE_MAP_ARRAY:
case GL_TEXTURE_CUBE_MAP:
/* The PRM claims that we should use BRW_SURFACE_CUBE for this
* situation, but experiments show that gl_Layer doesn't work when we do
* this. So we use BRW_SURFACE_2D, since for rendering purposes this is
* equivalent.
*/
surftype = BRW_SURFACE_2D;
depth *= 6;
break;
So I guess we simply forgot to port this workaround to Vulkan.
v2: tweak the conditions so the special case is cube texture sampling
rather than anything else (Jason)
Fixes:
dEQP-VK.geometry.layered.cube*
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Iago Toral Quiroga [Thu, 5 Jan 2017 12:17:53 +0000 (13:17 +0100)]
anv: don't skip the VUE header if we are reading gl_Layer in a fragment shader
This is the same we do in the GL driver: the hardware provides gl_Layer
in the VUE header, so when the fragment shader reads it we can't skip it.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Thu, 10 Nov 2016 09:06:48 +0000 (10:06 +0100)]
anv: enable shaderFloat64 feature
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Wed, 4 Jan 2017 12:11:35 +0000 (13:11 +0100)]
anv: enable float64 feature on supported platforms
v2:
- Remove image_ms_array initialization (Jason)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Wed, 4 Jan 2017 08:35:36 +0000 (09:35 +0100)]
spirv: enable SpvCapabilityFloat64 only to supported platforms
v2 (Jason):
- Use nir_spirv_supported_extensions to check if the feature is enabled.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Juan A. Suarez Romero [Fri, 16 Dec 2016 09:24:43 +0000 (10:24 +0100)]
nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributes
So far, input_reads was a bitmap tracking which vertex input locations
were being used.
In OpenGL, an attribute bigger than a vec4 (like a dvec3 or dvec4)
consumes just one location, any other small attribute. So we mark the
proper bit in inputs_read, and also the same bit in double_inputs_read
if the attribute is a dvec3/dvec4.
But in Vulkan, this is slightly different: a dvec3/dvec4 attribute
consumes two locations, not just one. And hence two bits would be marked
in inputs_read for the same vertex input attribute.
To avoid handling two different situations in NIR, we just choose the
latest one: in OpenGL, when creating NIR from GLSL/IR, any dvec3/dvec4
vertex input attribute is marked with two bits in the inputs_read bitmap
(and also in the double_inputs_read), and following attributes are
adjusted accordingly.
As example, if in our GLSL/IR shader we have three attributes:
layout(location = 0) vec3 attr0;
layout(location = 1) dvec4 attr1;
layout(location = 2) dvec3 attr2;
then in our NIR shader we put attr0 in location 0, attr1 in locations 1
and 2, and attr2 in location 3 and 4.
Checking carefully, basically we are using slots rather than locations
in NIR.
When emitting the vertices, we do a inverse map to know the
corresponding location for each slot.
v2 (Jason):
- use two slots from inputs_read for dvec3/dvec4 NIR from GLSL/IR.
v3 (Jason):
- Fix commit log error.
- Use ladder ifs and fix braces.
- elements_double is divisible by 2, don't need DIV_ROUND_UP().
- Use if ladder instead of a switch.
- Add comment about hardware restriction in 64bit vertex attributes.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Tue, 15 Nov 2016 11:49:38 +0000 (12:49 +0100)]
isl: fix VA64 support for double and dvecN vertex attributes
We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits
to avoid conversions. From the BDW PRM, Volume 2d, page 586
(VERTEX_ELEMENT_STATE):
"When SourceElementFormat is set to one of the *64*_PASSTHRU
formats, 64-bit components are stored in the URB without any
conversion. In this case, vertex elements must be written as 128
or 256 bits, with VFCOMP_STORE_0 being used to pad the output
as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red
component into the URB, Component 1 must be specified as
VFCOMP_STORE_0 (with Components 2,3 set to VFCOMP_NOSTORE)
in order to output a 128-bit vertex element, or Components 1-3 must
be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
element. Likewise, use of R64G64B64_PASSTHRU requires Component 3
to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
element."
v2,v3 (Jason):
- Don't delete unused formats.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Juan A. Suarez Romero [Tue, 15 Nov 2016 16:57:30 +0000 (16:57 +0000)]
anv/pipeline: get map for double input attributes
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 14 Nov 2016 11:08:32 +0000 (12:08 +0100)]
spirv: add support for doubles to OpSpecConstant
v2 (Jason):
- Fix indent in radv change
- Add vtn_u64_literal() helper to take 64 bits (Jason)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Thu, 10 Nov 2016 09:37:40 +0000 (10:37 +0100)]
spirv/nir: add (un)packDouble2x32() translation
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Wed, 7 Dec 2016 07:10:16 +0000 (08:10 +0100)]
spirv/nir: implement DF conversions
SPIR-V does not have special opcodes for DF conversions. We need to identify
them by checking the bit size of the operand and the result.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Wed, 7 Dec 2016 07:34:42 +0000 (08:34 +0100)]
nir: add nir_type_conversion_op()
This function returns the nir_op corresponding to the conversion between
the given nir_alu_type arguments.
This function lacks support for integer-based types with bit_size != 32
and for float16 conversion ops.
v2:
- Improve readiness of the code and delete cases that don't happen now (Jason)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Wed, 7 Dec 2016 07:34:02 +0000 (08:34 +0100)]
nir: add nir_get_nir_type_for_glsl_type()
v2 (Jason):
- Refactor nir_get_nir_type_for_glsl_type() to avoid using unneeded helpers (Jason)
v3:
- Use return directly (Jason)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Thu, 10 Nov 2016 11:11:03 +0000 (12:11 +0100)]
spirv: add support for doubles on OpComposite{Insert,Extract}
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Thu, 10 Nov 2016 11:07:53 +0000 (12:07 +0100)]
spirv: Enable double floating points when copying variables in _vtn_variable_copy()
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Thu, 10 Nov 2016 09:07:09 +0000 (10:07 +0100)]
spirv: add double support to _vtn_block_load_store()
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Tue, 8 Nov 2016 15:55:46 +0000 (16:55 +0100)]
spirv: add double support to _vtn_variable_load_store
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 21 Nov 2016 15:19:13 +0000 (16:19 +0100)]
spirv: add double support to SpvOpCompositeExtract
v2 (Jason):
- Add asserts.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 21 Nov 2016 15:13:46 +0000 (16:13 +0100)]
spirv: fix SpvOpSpecConstantOp with SpvOpVectorShuffle working with double-based vecs
We need to pick two 32-bit values per component to perform the right shuffle operation.
v2 (Jason):
- Add assert to check matching bit sizes (Jason)
- Simplify the code to pick components (Jason)
v3:
- Switch on bit_size once (Jason)
- Add comment to explain the constant value for unused components (Erik)
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 21 Nov 2016 15:33:08 +0000 (16:33 +0100)]
spirv: add DF support to SpvOp*ConstantComposite
v2 (Jason):
- Add assert.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 21 Nov 2016 15:32:24 +0000 (16:32 +0100)]
spirv: add DF support to vtn_const_ssa_value()
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 21 Nov 2016 15:30:47 +0000 (16:30 +0100)]
spirv: add support for loading DF constants
v2 (Jason):
- Add assert.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Tue, 8 Nov 2016 15:45:37 +0000 (16:45 +0100)]
spirv: add definition of double based data types
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Iglesias Gonsálvez [Mon, 14 Nov 2016 09:04:48 +0000 (10:04 +0100)]
spirv: fix typo in spec_constant_decoration_cb()
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Dave Airlie [Tue, 13 Dec 2016 03:55:04 +0000 (13:55 +1000)]
radv: drop unused fields in physical device.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Tapani Pälli [Thu, 5 Jan 2017 11:40:35 +0000 (13:40 +0200)]
i965: call intel_prepare_render always when reading pixels
Currently we do this only in the fallback code (when tiled memcpy
version failed) but it needs to be done always so that we have
correct read and write buffer in place. No regressions seen in CI.
Fixes:
dEQP-EGL.functional.buffer_age.*
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98330
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Timothy Arceri [Wed, 9 Nov 2016 03:00:22 +0000 (14:00 +1100)]
st/mesa: pass gl_program to st_bind_ubos()
We no longer need anything from gl_linked_shader.
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Wed, 9 Nov 2016 02:41:50 +0000 (13:41 +1100)]
st/mesa: pass gl_program to st_bind_images()
We no longer need anything from gl_linked_shader.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 9 Nov 2016 02:37:39 +0000 (13:37 +1100)]
st/mesa: stop passing gl_linked_shader to set_affected_state_flags()
We now get everything we need from the gl_program param.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 9 Nov 2016 02:35:11 +0000 (13:35 +1100)]
st/mesa/glsl: set num_images directly in shader_info
This change also removes the now duplicate NumImages field.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 9 Nov 2016 00:57:33 +0000 (11:57 +1100)]
st/mesa: pass gl_program to st_bind_ssbos()
We no longer need to pass gl_shader_program.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 4 Jan 2017 05:21:34 +0000 (16:21 +1100)]
nir: add another comparison simplification
On BDW:
total instructions in shared programs:
13061877 ->
13060965 (-0.01%)
instructions in affected programs: 133569 -> 132657 (-0.68%)
helped: 566
HURT: 0
total cycles in shared programs:
256611784 ->
256599536 (-0.00%)
cycles in affected programs: 861016 -> 848768 (-1.42%)
helped: 379
HURT: 73
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 9 Aug 2016 08:44:38 +0000 (01:44 -0700)]
nir: Turn bcsel of +/- 1.0 and 0.0 into b2f sequences.
On BDW:
total instructions in shared programs:
13074882 ->
13068703 (-0.05%)
instructions in affected programs:
1823116 ->
1816937 (-0.34%)
helped: 4187
HURT: 537
total cycles in shared programs:
256622718 ->
256425382 (-0.08%)
cycles in affected programs:
123790120 ->
123592784 (-0.16%)
helped: 3823
HURT: 2037
total spills in shared programs: 15276 -> 14929 (-2.27%)
spills in affected programs: 9446 -> 9099 (-3.67%)
helped: 352
HURT: 1
total fills in shared programs: 20496 -> 20144 (-1.72%)
fills in affected programs: 13040 -> 12688 (-2.70%)
helped: 352
HURT: 1
LOST: 2
GAINED: 21
v2: Rely on 'a' being a well-formed boolean (Connor, Eric).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 9 Aug 2016 00:05:18 +0000 (17:05 -0700)]
nir: Convert ineg(b2i(a)) to a if it's a boolean.
On BDW:
total instructions in shared programs:
13071119 ->
13070371 (-0.01%)
instructions in affected programs: 83424 -> 82676 (-0.90%)
helped: 505
HURT: 45 (all TCS, all hurt by a single instruction)
total cycles in shared programs:
256601322 ->
256588932 (-0.00%)
cycles in affected programs: 819410 -> 807020 (-1.51%)
helped: 450
HURT: 57
total loops in shared programs: 2950 -> 2942 (-0.27%)
loops in affected programs: 8 -> 0
helped: 7
HURT: 0
v2: Drop unnecessary 'a@bool' annotation (Connor, Eric).
Add a comment explaining the rule (Ian).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> [v1]
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Mon, 7 Mar 2016 23:46:47 +0000 (15:46 -0800)]
i965: Move TES input VUE map calculation out a layer.
In Vulkan, we'll compile the TCS and TES at the same time, so I can just
pass the TCS output VUE map to brw_compile_tes as the TES input VUE map.
So, we only need to do this in GL. Move it to the GL-specific layer.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 25 Feb 2016 19:55:23 +0000 (11:55 -0800)]
i965: Pass NULL for gl_program when compiling TES.
This isn't needed, and Vulkan doesn't have one.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 26 Sep 2016 00:59:42 +0000 (17:59 -0700)]
i965: Move TES spacing/domain/topology setup to brw_compile_tes().
Moving this down a layer lets us share code between Vulkan and GL.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 15 Nov 2016 06:17:44 +0000 (22:17 -0800)]
i965: Access TES shader info via NIR.
NIR exists in both GL and Vulkan, but gl_program is GL specific.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Sun, 25 Sep 2016 00:59:55 +0000 (17:59 -0700)]
mesa: Introduce a compiler enum for tessellation spacing.
It feels weird using GL_* enums in a Vulkan driver.
v2: Fix the TESS_SPACING -> PIPE_TESS_SPACING conversion.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 22 Nov 2016 22:43:57 +0000 (14:43 -0800)]
compiler: Change shader_info->tes.vertex_order into a ccw boolean.
The vertex order is either clockwise or counterclockwise. We can just
store a "ccw" boolean rather than GLenum values. I don't want to use
GLenums in a Vulkan driver, and even in GL a simple boolean works fine.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Sat, 7 Jan 2017 01:22:56 +0000 (17:22 -0800)]
anv/pipeline: Call NIR passes using NIR_PASS_V
This lets us get validation without having to do it manually.
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Jason Ekstrand [Sat, 7 Jan 2017 01:25:35 +0000 (17:25 -0800)]
anv/pipeline: Only call remove_dead_variables once
It can handle multiple modes at a time now so there's no reason to call
it repeatedly.
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Kenneth Graunke [Sat, 7 Jan 2017 21:58:42 +0000 (13:58 -0800)]
Revert recent GLSL slot counting fiasco.
I apparently broke mark_whole_variable in ir_set_program_inouts.
It was passing a type that wasn't var->type, so the wrapper didn't
work out. It's all broken, revert it and start over.
Fixes all kinds of things on other drivers.
Revert "glsl: Make is_fixed_function_array actually check for varyings."
This reverts commit
42699e12711668a142b7acf11c168cf4301c1295.
Revert "glsl: Mark whole variable used for ClipDistance and TessLevel*."
This reverts commit
5c580e64cc206ab160e1767c42e4d6c81f67da4d.
Revert "glsl: Override the # of varying slots for ClipDistance and TessLevel*."
This reverts commit
8b5749f65ac434961308ccb579fb8a816e4f29d5.
Revert "glsl: Create and use a new ir_variable::count_attribute_slots() wrapper."
This reverts commit
6aa5cb34d03765b7be8611aa516bc201bd337f73.
Kenneth Graunke [Sat, 7 Jan 2017 20:55:17 +0000 (12:55 -0800)]
glsl: Make is_fixed_function_array actually check for varyings.
We can't check VARYING_SLOT_* locations until we've determined that
the variable is actually a varying.
Fixes assert failures in drivers which actually use this path,
such as radeonsi and i915.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99314
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Kai Wasserbäch [Sat, 7 Jan 2017 13:38:23 +0000 (14:38 +0100)]
drirc: Allow extension midshader for Divinity: Original Sin (EE)
See also <https://bugs.freedesktop.org/show_bug.cgi?id=93551#c27> where
this was first observed as a requirement.
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 5 Jan 2017 23:26:24 +0000 (10:26 +1100)]
glsl: fix opt_minmax redundancy checks against baserange
Marking operations as redundant if they are equal to the base
range is fine when the tree structure is something like this:
max
/ \
max b
/ \
3 max
/ \
3 a
But the opt falls apart with a tree like this:
max
/ \
max max
/ \ / \
3 a b 3
The problem is that both branches are treated the same: descending in
the left branch will prune the constant, and then descending the right
branch will prune the constant there as well, because limits[0] wasn't
updated to take the change on the left branch into account, and so we
still get [3,\infty) as baserange.
In order to fix the bug we just disable the marking of redundant expressions
when they match the baserange.
NIR algebraic opt will clean up the first tree for anyway, hopefully
other backends are smart enough to do this also.
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Jason Ekstrand [Sat, 10 Dec 2016 06:32:08 +0000 (22:32 -0800)]
i965/compiler: Use the new nir_opt_copy_prop_vars pass
We run this after nir_lower_vars_to_ssa so that as many load/store_var
intrinsics as possible before copy_prop_vars executes. This is because the
pass isn't particularly efficient (it does a lot of linear walks of a
linked list) so we'd like as much of the work as possible to be done before
copy_prop_vars runs.
Shader DB results on Sky Lake:
total instructions in shared programs:
12020290 ->
12013627 (-0.06%)
instructions in affected programs: 26033 -> 19370 (-25.59%)
helped: 16
HURT: 13
total cycles in shared programs:
137772848 ->
137549012 (-0.16%)
cycles in affected programs:
6955660 ->
6731824 (-3.22%)
helped: 217
HURT: 237
total loops in shared programs: 3208 -> 3208 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0
total spills in shared programs: 4112 -> 4057 (-1.34%)
spills in affected programs: 483 -> 428 (-11.39%)
helped: 2
HURT: 0
total fills in shared programs: 5519 -> 5102 (-7.56%)
fills in affected programs: 993 -> 576 (-41.99%)
helped: 2
HURT: 0
LOST: 0
GAINED: 0
Broadwell had similar results. On older hardware, the impact isn't as
large because they don't advertise GL 4.5. Of the hurt programs, all but
one are hurt by a single instruction and the one is hurt by 3 instructions.
All of the helped programs, on the other hand, are helped by at least 3
instructions and one kerbal space program shader is helped by 44.59%.
The real star of the show, however, is the Gl43CSDof synmark2 benchmark
which has two shaders which are cut by 28% and 40% and the over-all runtime
performance of the benchmark on my Sky Lake laptop is improved by around
25-30% (it's a bit hard to be exact due to thermal throttling).
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Jason Ekstrand [Sat, 10 Dec 2016 06:31:26 +0000 (22:31 -0800)]
nir: Add a local variable-based copy propagation pass
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Jason Ekstrand [Sat, 10 Dec 2016 20:00:12 +0000 (12:00 -0800)]
nir/builder: Add a helper for getting the most recently added instruction
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Jason Ekstrand [Sat, 10 Dec 2016 19:32:29 +0000 (11:32 -0800)]
nir/builder: Add a load_deref_var helper
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>